#include <MSXCPU.hh>

Inheritance diagram for openmsx::MSXCPU:

Collaboration diagram for openmsx::MSXCPU:

Public Types
enum	CPUType { CPU_Z80 , CPU_R800 }

Public Member Functions
	MSXCPU (MSXMotherBoard &motherboard)

	~MSXCPU ()

void	doReset (EmuTime::param time)
	Reset CPU. More...

void	setActiveCPU (CPUType cpu)
	Switch between Z80/R800. More...

void	setDRAMmode (bool dram)
	Sets DRAM or ROM mode (influences memory access speed for R800). More...

void	updateVisiblePage (byte page, byte primarySlot, byte secondarySlot)
	Inform CPU of bank switch. More...

void	invalidateAllSlotsRWCache (word start, unsigned size)
	Invalidate the CPU its cache for the interval [start, start + size) For example MSXMemoryMapper and MSXGameCartridge need to call this method when a 'memory switch' occurs. More...

void	invalidateRWCache (unsigned start, unsigned size, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
	Similar to the method above, but only invalidates one specific slot. More...

void	invalidateRCache (unsigned start, unsigned size, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)

void	invalidateWCache (unsigned start, unsigned size, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)

void	fillRWCache (unsigned start, unsigned size, const byte rData, byte wData, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
	Fill the read and write cache lines for a specific slot with the specified value. More...

void	fillRCache (unsigned start, unsigned size, const byte *rData, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)

void	fillWCache (unsigned start, unsigned size, byte *wData, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)

void	raiseIRQ ()
	This method raises a maskable interrupt. More...

void	lowerIRQ ()
	This methods lowers the maskable interrupt again. More...

void	raiseNMI ()
	This method raises a non-maskable interrupt. More...

void	lowerNMI ()
	This methods lowers the non-maskable interrupt again. More...

bool	isM1Cycle (unsigned address) const
	Should only be used from within a MSXDevice::readMem() method. More...

void	exitCPULoopSync ()
	See CPUCore::exitCPULoopSync() More...

void	exitCPULoopAsync ()
	See CPUCore::exitCPULoopAsync() More...

bool	isR800Active () const
	Is the R800 currently active? More...

void	setZ80Freq (unsigned freq)
	Switch the Z80 clock freq. More...

void	setInterface (MSXCPUInterface *interface)

void	disasmCommand (Interpreter &interp, std::span< const TclObject > tokens, TclObject &result) const

void	setPaused (bool paused)
	(un)pause CPU. More...

void	setNextSyncPoint (EmuTime::param time)

void	wait (EmuTime::param time)

EmuTime	waitCyclesZ80 (EmuTime::param time, unsigned cycles)

EmuTime	waitCyclesR800 (EmuTime::param time, unsigned cycles)

CPURegs &	getRegisters ()

template<typename Archive >
void	serialize (Archive &ar, unsigned version)

Friends
class	MSXMotherBoard

Detailed Description

Definition at line 29 of file MSXCPU.hh.

Member Enumeration Documentation

◆ CPUType

enum openmsx::MSXCPU::CPUType

Enumerator
CPU_Z80
CPU_R800

Definition at line 32 of file MSXCPU.hh.

Constructor & Destructor Documentation

◆ MSXCPU()

openmsx::MSXCPU::MSXCPU ( MSXMotherBoard & motherboard )

explicit

Definition at line 21 of file MSXCPU.cc.

References openmsx::Subject< T >::attach(), openmsx::MSXMotherBoard::getDebugger(), openmsx::MSXMotherBoard::getScheduler(), openmsx::Debugger::setCPU(), and openmsx::Scheduler::setCPU().

◆ ~MSXCPU()

openmsx::MSXCPU::~MSXCPU ( )

Definition at line 60 of file MSXCPU.cc.

References openmsx::Subject< T >::detach(), openmsx::MSXMotherBoard::getDebugger(), openmsx::MSXMotherBoard::getScheduler(), openmsx::Debugger::setCPU(), and openmsx::Scheduler::setCPU().

Member Function Documentation

◆ disasmCommand()

void openmsx::MSXCPU::disasmCommand	(	Interpreter &	interp,
		std::span< const TclObject >	tokens,
		TclObject &	result
	)		const

Definition at line 357 of file MSXCPU.cc.

◆ doReset()

void openmsx::MSXCPU::doReset ( EmuTime::param time )

Reset CPU.

Requires CPU is not in the middle of an instruction, so exitCPULoop was called and execute() method returned.

Definition at line 80 of file MSXCPU.cc.

References invalidateAllSlotsRWCache().

Referenced by openmsx::MSXMotherBoard::doReset(), and openmsx::MSXMotherBoard::powerUp().

◆ exitCPULoopAsync()

void openmsx::MSXCPU::exitCPULoopAsync ( )

See CPUCore::exitCPULoopAsync()

Definition at line 131 of file MSXCPU.cc.

Referenced by openmsx::MSXMotherBoard::exitCPULoopAsync().

◆ exitCPULoopSync()

void openmsx::MSXCPU::exitCPULoopSync ( )

See CPUCore::exitCPULoopSync()

Definition at line 126 of file MSXCPU.cc.

Referenced by openmsx::MSXCPUInterface::doBreak(), openmsx::MSXMotherBoard::exitCPULoopSync(), and setActiveCPU().

◆ fillRCache()

void openmsx::MSXCPU::fillRCache	(	unsigned	start,
		unsigned	size,
		const byte *	rData,
		int	ps,
		int	ss,
		std::span< const byte, 256 >	disallowRead,
		std::span< const byte, 256 >	disallowWrite
	)

Definition at line 276 of file MSXCPU.cc.

References utf8::unchecked::size().

Referenced by openmsx::MSXCPUInterface::fillRCache().

◆ fillRWCache()

void openmsx::MSXCPU::fillRWCache	(	unsigned	start,
		unsigned	size,
		const byte *	rData,
		byte *	wData,
		int	ps,
		int	ss,
		std::span< const byte, 256 >	disallowRead,
		std::span< const byte, 256 >	disallowWrite
	)

Fill the read and write cache lines for a specific slot with the specified value.

Except for the lines where the corresponding 'disallow{Read,Write}' array is non-zero, those lines are marked non-cacheable. This is useful on e.g. a memory mapper bank switch because:

Marking the lines 'unknown' (as done by invalidateMemCache) is as much work as directly setting the correct value.
Directly setting the correct value saves work later on.

Definition at line 270 of file MSXCPU.cc.

References utf8::unchecked::size().

Referenced by openmsx::MSXCPUInterface::fillRWCache().

◆ fillWCache()

void openmsx::MSXCPU::fillWCache	(	unsigned	start,
		unsigned	size,
		byte *	wData,
		int	ps,
		int	ss,
		std::span< const byte, 256 >	disallowRead,
		std::span< const byte, 256 >	disallowWrite
	)

Definition at line 282 of file MSXCPU.cc.

References utf8::unchecked::size().

Referenced by openmsx::MSXCPUInterface::fillWCache().

◆ getRegisters()

CPURegs & openmsx::MSXCPU::getRegisters ( )

Definition at line 339 of file MSXCPU.cc.

◆ invalidateAllSlotsRWCache()

void openmsx::MSXCPU::invalidateAllSlotsRWCache	(	word	start,
		unsigned	size
	)

Invalidate the CPU its cache for the interval [start, start + size) For example MSXMemoryMapper and MSXGameCartridge need to call this method when a 'memory switch' occurs.

Definition at line 181 of file MSXCPU.cc.

References ranges::fill(), openmsx::InvalidateAllSlots, openmsx::CacheLine::SIZE, utf8::unchecked::size(), subspan(), ProfileCounters< ENABLED, ENUM >::tick(), and xrange().

Referenced by openmsx::MSXCPUInterface::changeExpanded(), doReset(), openmsx::MSXCPUInterface::registerGlobalRead(), openmsx::MSXCPUInterface::registerGlobalWrite(), serialize(), openmsx::PanasonicMemory::setDRAM(), openmsx::MSXCPUInterface::unregisterGlobalRead(), openmsx::MSXCPUInterface::unregisterGlobalWrite(), and openmsx::CheckedRam::write().

◆ invalidateRCache()

void openmsx::MSXCPU::invalidateRCache	(	unsigned	start,
		unsigned	size,
		int	ps,
		int	ss,
		std::span< const byte, 256 >	disallowRead,
		std::span< const byte, 256 >	disallowWrite
	)

Definition at line 255 of file MSXCPU.cc.

Referenced by openmsx::MSXCPUInterface::invalidateRCache().

◆ invalidateRWCache()

void openmsx::MSXCPU::invalidateRWCache	(	unsigned	start,
		unsigned	size,
		int	ps,
		int	ss,
		std::span< const byte, 256 >	disallowRead,
		std::span< const byte, 256 >	disallowWrite
	)

Similar to the method above, but only invalidates one specific slot.

One small tweak: lines that are in 'disallowRead/Write' are immediately marked as 'non-cacheable' instead of (first) as 'unknown'.

Definition at line 247 of file MSXCPU.cc.

Referenced by openmsx::MSXCPUInterface::invalidateRWCache().

◆ invalidateWCache()

void openmsx::MSXCPU::invalidateWCache	(	unsigned	start,
		unsigned	size,
		int	ps,
		int	ss,
		std::span< const byte, 256 >	disallowRead,
		std::span< const byte, 256 >	disallowWrite
	)

Definition at line 262 of file MSXCPU.cc.

Referenced by openmsx::MSXCPUInterface::invalidateWCache().

◆ isM1Cycle()

bool openmsx::MSXCPU::isM1Cycle ( unsigned address ) const

Should only be used from within a MSXDevice::readMem() method.

Returns true if that read was the first byte of an instruction (the Z80 M1 pin is active). This implementation is not 100% accurate, but good enough for now.

Definition at line 310 of file MSXCPU.cc.

Referenced by openmsx::RomRamFile::readMem().

◆ isR800Active()

bool openmsx::MSXCPU::isR800Active ( ) const

inline

Is the R800 currently active?

Definition at line 131 of file MSXCPU.hh.

◆ lowerIRQ()

void openmsx::MSXCPU::lowerIRQ ( )

This methods lowers the maskable interrupt again.

A device may never call this method more often than it called the method raiseIRQ(). Before using this method take a look at IRQHelper.

Definition at line 294 of file MSXCPU.cc.

Referenced by openmsx::IRQSource::lower(), and openmsx::OptionalIRQ::lower().

◆ lowerNMI()

void openmsx::MSXCPU::lowerNMI ( )

This methods lowers the non-maskable interrupt again.

A device may never call this method more often than it called the method raiseNMI(). Before using this method take a look at IRQHelper.

Definition at line 304 of file MSXCPU.cc.

Referenced by openmsx::OptionalIRQ::lower().

◆ raiseIRQ()

void openmsx::MSXCPU::raiseIRQ ( )

This method raises a maskable interrupt.

A device may call this method more than once. If the device wants to lower the interrupt again it must call the lowerIRQ() method exactly as many times. Before using this method take a look at IRQHelper.

Definition at line 289 of file MSXCPU.cc.

Referenced by openmsx::IRQSource::raise(), and openmsx::OptionalIRQ::raise().

◆ raiseNMI()

void openmsx::MSXCPU::raiseNMI ( )

This method raises a non-maskable interrupt.

A device may call this method more than once. If the device wants to lower the interrupt again it must call the lowerNMI() method exactly as many times. Before using this method take a look at IRQHelper.

Definition at line 299 of file MSXCPU.cc.

Referenced by openmsx::OptionalIRQ::raise().

◆ serialize()

template<typename Archive >

void openmsx::MSXCPU::serialize	(	Archive &	ar,
		unsigned	version
	)

Definition at line 532 of file MSXCPU.cc.

References invalidateAllSlotsRWCache().

◆ setActiveCPU()

void openmsx::MSXCPU::setActiveCPU ( CPUType cpu )

Switch between Z80/R800.

Definition at line 90 of file MSXCPU.cc.

References CPU_R800, CPU_Z80, and exitCPULoopSync().

◆ setDRAMmode()

void openmsx::MSXCPU::setDRAMmode ( bool dram )

Sets DRAM or ROM mode (influences memory access speed for R800).

Definition at line 101 of file MSXCPU.cc.

◆ setInterface()

void openmsx::MSXCPU::setInterface ( MSXCPUInterface * interface )

Definition at line 73 of file MSXCPU.cc.

Referenced by openmsx::MSXCPUInterface::MSXCPUInterface(), and openmsx::MSXCPUInterface::~MSXCPUInterface().

◆ setNextSyncPoint()

void openmsx::MSXCPU::setNextSyncPoint ( EmuTime::param time )

Definition at line 143 of file MSXCPU.cc.

◆ setPaused()

void openmsx::MSXCPU::setPaused ( bool paused )

(un)pause CPU.

During pause the CPU executes NOP instructions continuously (just like during HALT). Used by turbor hw pause.

Definition at line 365 of file MSXCPU.cc.

Referenced by openmsx::MSXMotherBoard::pause(), and openmsx::MSXMotherBoard::unpause().

◆ setZ80Freq()

void openmsx::MSXCPU::setZ80Freq ( unsigned freq )

Switch the Z80 clock freq.

Definition at line 316 of file MSXCPU.cc.

Referenced by openmsx::MSXCielTurbo::writeIO(), and openmsx::MSXMatsushita::writeSwitchedIO().

◆ updateVisiblePage()

void openmsx::MSXCPU::updateVisiblePage	(	byte	page,
		byte	primarySlot,
		byte	secondarySlot
	)

Inform CPU of bank switch.

This will invalidate memory cache and update memory timings on R800.

Definition at line 160 of file MSXCPU.cc.

References openmsx::CacheLine::SIZE.

◆ wait()

void openmsx::MSXCPU::wait ( EmuTime::param time )

Definition at line 321 of file MSXCPU.cc.

◆ waitCyclesR800()

EmuTime openmsx::MSXCPU::waitCyclesR800	(	EmuTime::param	time,
		unsigned	cycles
	)

Definition at line 333 of file MSXCPU.cc.

Referenced by openmsx::TurboRFDC::readMem(), and openmsx::TurboRFDC::writeMem().

◆ waitCyclesZ80()

EmuTime openmsx::MSXCPU::waitCyclesZ80	(	EmuTime::param	time,
		unsigned	cycles
	)

Definition at line 327 of file MSXCPU.cc.

Referenced by openmsx::VDP::writeIO().

Friends And Related Function Documentation

◆ MSXMotherBoard

friend class MSXMotherBoard

friend

Definition at line 162 of file MSXCPU.hh.

The documentation for this class was generated from the following files:

Public Types

Public Member Functions

Friends

Detailed Description

Member Enumeration Documentation

◆ CPUType

Constructor & Destructor Documentation

◆ MSXCPU()

◆ ~MSXCPU()

Member Function Documentation

◆ disasmCommand()

◆ doReset()

◆ exitCPULoopAsync()

◆ exitCPULoopSync()

◆ fillRCache()

◆ fillRWCache()

◆ fillWCache()

◆ getRegisters()

◆ invalidateAllSlotsRWCache()

◆ invalidateRCache()

◆ invalidateRWCache()

◆ invalidateWCache()

◆ isM1Cycle()

◆ isR800Active()

◆ lowerIRQ()

◆ lowerNMI()

◆ raiseIRQ()

◆ raiseNMI()

◆ serialize()

◆ setActiveCPU()

◆ setDRAMmode()

◆ setInterface()

◆ setNextSyncPoint()

◆ setPaused()

◆ setZ80Freq()

◆ updateVisiblePage()

◆ wait()

◆ waitCyclesR800()

◆ waitCyclesZ80()

Friends And Related Function Documentation

◆ MSXMotherBoard