15 : ram(config, name, description,
size)
16 , msxcpu(config.getMotherBoard().getCPU())
17 , umrCallback(config.getGlobalSettings().getUMRCallBackSetting())
31 if (!completely_initialized_cacheline[line]) [[unlikely]] {
42 ? &ram[addr] :
nullptr;
48 ?
const_cast<byte*
>(&ram[addr]) :
nullptr;
56 for (
auto i :
xrange(num)) {
57 if (!completely_initialized_cacheline[first + i]) {
61 return const_cast<byte*
>(&ram[addr]);
67 if (!completely_initialized_cacheline[line]) [[unlikely]] {
69 if (uninitialized[line].none()) [[unlikely]] {
70 completely_initialized_cacheline[line] =
true;
91void CheckedRam::init()
97 completely_initialized_cacheline.assign(lines,
true);
101 completely_initialized_cacheline.assign(lines,
false);
103 std::bitset<CacheLine::SIZE> allTrue;
105 uninitialized.assign(lines, allTrue);
110void CheckedRam::update(
const Setting&
setting)
noexcept
112 assert(&
setting == &umrCallback.getSetting());
byte * getRWCacheLines(size_t addr, size_t size) const
byte * getWriteCacheLine(size_t addr) const
void write(size_t addr, byte value)
const byte * getReadCacheLine(size_t addr) const
CheckedRam(const DeviceConfig &config, const std::string &name, static_string_view description, size_t size)
void invalidateAllSlotsRWCache(word start, unsigned size)
Invalidate the CPU its cache for the interval [start, start + size) For example MSXMemoryMapper and M...
const std::string & getName() const
void detach(Observer< T > &observer)
void attach(Observer< T > &observer)
TclObject getValue() const
TclObject execute() const
StringSetting & getSetting() const
This file implemented 3 utility functions:
size_t size(std::string_view utf8)
constexpr auto xrange(T e)