25template<
typename T>
class CPUCore;
41 void doReset(EmuTime::param time);
64 std::span<const byte, 256> disallowRead,
65 std::span<const byte, 256> disallowWrite);
67 std::span<const byte, 256> disallowRead,
68 std::span<const byte, 256> disallowWrite);
70 std::span<const byte, 256> disallowRead,
71 std::span<const byte, 256> disallowWrite);
82 void fillRWCache(
unsigned start,
unsigned size,
const byte* rData,
byte* wData,
int ps,
int ss,
83 std::span<const byte, 256> disallowRead,
84 std::span<const byte, 256> disallowWrite);
85 void fillRCache (
unsigned start,
unsigned size,
const byte* rData,
int ps,
int ss,
86 std::span<const byte, 256> disallowRead,
87 std::span<const byte, 256> disallowWrite);
88 void fillWCache (
unsigned start,
unsigned size,
byte* wData,
int ps,
int ss,
89 std::span<const byte, 256> disallowRead,
90 std::span<const byte, 256> disallowWrite);
123 [[nodiscard]]
bool isM1Cycle(
unsigned address)
const;
139 std::span<const TclObject> tokens,
148 void wait(EmuTime::param time);
154 [[nodiscard]]
auto*
getZ80() {
return z80.get(); }
155 [[nodiscard]]
auto*
getR800() {
return r800.get(); }
157 template<
typename Archive>
158 void serialize(Archive& ar,
unsigned version);
161 void invalidateMemCacheSlot();
164 void execute(
bool fastForward);
172 EmuTime::param getCurrentTime()
const;
177 template<
bool READ,
bool WRITE,
bool SUB_START>
178 void setRWCache(
unsigned start,
unsigned size,
const byte* rData,
byte* wData,
int ps,
int ss,
179 std::span<const byte, 256> disallowRead, std::span<const byte, 256> disallowWrite);
185 const std::unique_ptr<CPUCore<Z80TYPE>> z80;
186 const std::unique_ptr<CPUCore<R800TYPE>> r800;
188 std::array<std::array<const byte*, CacheLine::NUM>, 16> slotReadLines;
189 std::array<std::array< byte*, CacheLine::NUM>, 16> slotWriteLines;
190 std::array<byte, 4> slots;
193 explicit TimeInfoTopic(
InfoCommand& machineInfoCommand);
194 void execute(std::span<const TclObject> tokens,
196 [[nodiscard]] std::string help(std::span<const TclObject> tokens)
const override;
199 class CPUFreqInfoTopic final :
public InfoTopic {
202 const std::string& name,
CPUClock& clock);
203 void execute(std::span<const TclObject> tokens,
205 [[nodiscard]] std::string help(std::span<const TclObject> tokens)
const override;
209 CPUFreqInfoTopic z80FreqInfo;
210 const std::unique_ptr<CPUFreqInfoTopic> r800FreqInfo;
212 struct Debuggable final : SimpleDebuggable {
214 [[nodiscard]]
byte read(
unsigned address)
override;
215 void write(
unsigned address,
byte value)
override;
218 EmuTime reference{EmuTime::zero()};
219 bool z80Active{
true};
220 bool newZ80Active{
true};
void setZ80Freq(unsigned freq)
Switch the Z80 clock freq.
bool isM1Cycle(unsigned address) const
Should only be used from within a MSXDevice::readMem() method.
void lowerNMI()
This methods lowers the non-maskable interrupt again.
void serialize(Archive &ar, unsigned version)
void invalidateAllSlotsRWCache(word start, unsigned size)
Invalidate the CPU its cache for the interval [start, start + size) For example MSXMemoryMapper and M...
void fillWCache(unsigned start, unsigned size, byte *wData, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
void updateVisiblePage(byte page, byte primarySlot, byte secondarySlot)
Inform CPU of bank switch.
void fillRCache(unsigned start, unsigned size, const byte *rData, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
bool isR800Active() const
Is the R800 currently active?
void fillRWCache(unsigned start, unsigned size, const byte *rData, byte *wData, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
Fill the read and write cache lines for a specific slot with the specified value.
void invalidateRCache(unsigned start, unsigned size, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
EmuTime waitCyclesR800(EmuTime::param time, unsigned cycles)
void exitCPULoopSync()
See CPUCore::exitCPULoopSync()
void disasmCommand(Interpreter &interp, std::span< const TclObject > tokens, TclObject &result) const
void setNextSyncPoint(EmuTime::param time)
EmuTime waitCyclesZ80(EmuTime::param time, unsigned cycles)
void raiseIRQ()
This method raises a maskable interrupt.
void raiseNMI()
This method raises a non-maskable interrupt.
void wait(EmuTime::param time)
void doReset(EmuTime::param time)
Reset CPU.
void setActiveCPU(Type cpu)
Switch between Z80/R800.
void invalidateRWCache(unsigned start, unsigned size, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
Similar to the method above, but only invalidates one specific slot.
void setPaused(bool paused)
(un)pause CPU.
void setInterface(MSXCPUInterface *interface)
void exitCPULoopAsync()
See CPUCore::exitCPULoopAsync()
friend class MSXMotherBoard
void setDRAMmode(bool dram)
Sets DRAM or ROM mode (influences memory access speed for R800).
void lowerIRQ()
This methods lowers the maskable interrupt again.
void invalidateWCache(unsigned start, unsigned size, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
Generic Gang-of-Four Observer class, templatized edition.
This file implemented 3 utility functions:
uint16_t word
16 bit unsigned integer