RomRamFile.cc

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#include "RomRamFile.hh"
#include "MSXCPU.hh"
#include "serialize.hh"
#include <memory>
 
namespace openmsx {
 
RomRamFile::RomRamFile(const DeviceConfig& config, Rom&& rom_)
        : MSXRom(config, std::move(rom_))
        , cpu(getCPU())
{
        sram = std::make_unique<SRAM>(getName() + " SRAM", 0x4000, config);
        reset(EmuTime::dummy());
}
 
void RomRamFile::reset(EmuTime::param /*time*/)
{
        shiftValue = 0;
}
 
byte RomRamFile::readMem(word address, EmuTime::param /*time*/)
{
        if ((0x4000 <= address) && (address < 0x8000)) {
                byte result = rom[address & 0x1fff];
                if (cpu.isM1Cycle(address)) {
                        bool tmp = (result & 0x44) == 0x44;
                        shiftValue = (shiftValue << 1) | byte(tmp);
                }
                return result;
        } else if ((0x8000 <= address) && (address < 0xC000)) {
                return (*sram)[address & 0x3fff];
        } else {
                return 0xff;
        }
}
 
byte RomRamFile::peekMem(word address, EmuTime::param /*time*/) const
{
        if ((0x4000 <= address) && (address < 0x8000)) {
                return rom[address & 0x1fff];
        } else if ((0x8000 <= address) && (address < 0xC000)) {
                return (*sram)[address & 0x3fff];
        } else {
                return 0xff;
        }
}
 
const byte* RomRamFile::getReadCacheLine(word address) const
{
        if ((0x4000 <= address) && (address < 0x8000)) {
                // reads from ROM are not cacheable because of the M1 stuff
                return nullptr;
        } else if ((0x8000 <= address) && (address < 0xC000)) {
                return &(*sram)[address & 0x3fff];
        } else {
                return unmappedRead;
        }
}
 
void RomRamFile::writeMem(word address, byte value, EmuTime::param /*time*/)
{
        if ((0x8000 <= address) && (address < 0xC000) &&
            ((shiftValue & 0x31) == 0x11)) {
                sram->write(address & 0x3fff, value);
        }
}
 
byte* RomRamFile::getWriteCacheLine(word address) const
{
        if ((0x8000 <= address) && (address < 0xC000)) {
                // writes to SRAM are not cacheable because of sync-to-disk
                return nullptr;
        } else {
                return unmappedWrite;
        }
}
 
template<typename Archive>
void RomRamFile::serialize(Archive& ar, unsigned /*version*/)
{
        // skip MSXRom base class
        ar.template serializeBase<MSXDevice>(*this);
        ar.serialize("shiftValue", shiftValue);
}
INSTANTIATE_SERIALIZE_METHODS(RomRamFile);
REGISTER_MSXDEVICE(RomRamFile, "RomRamFile");
 
} // namespace openmsx