50 std::span<const byte*, CacheLine::NUM>
read;
51 std::span< byte*, CacheLine::NUM>
write;
54template<
typename CPU_POLICY>
67 void doReset(EmuTime::param time);
83 void warp(EmuTime::param time);
85 void wait(EmuTime::param time);
86 EmuTime
waitCycles(EmuTime::param time,
unsigned cycles);
89 return {readCacheLine, writeCacheLine};
91 [[nodiscard]]
bool isM1Cycle(
unsigned address)
const;
94 std::span<const TclObject> tokens,
129 template<
typename Archive>
130 void serialize(Archive& ar,
unsigned version);
133 void execute2(
bool fastForward);
134 [[nodiscard]]
bool needExitCPULoop();
135 void setSlowInstructions();
143 std::array<const byte*, CacheLine::NUM> readCacheLine;
144 std::array< byte*, CacheLine::NUM> writeCacheLine;
162 int slowInstructions;
170 bool nmiEdge =
false;
172 std::atomic<bool> exitLoop =
false;
181 inline void cpuTracePre();
182 inline void cpuTracePost();
183 void cpuTracePost_slow();
185 inline byte READ_PORT(
word port,
unsigned cc);
186 inline void WRITE_PORT(
word port,
byte value,
unsigned cc);
188 template<
bool PRE_PB,
bool POST_PB>
189 byte RDMEMslow(
unsigned address,
unsigned cc);
190 template<
bool PRE_PB,
bool POST_PB>
191 inline byte RDMEM_impl2(
unsigned address,
unsigned cc);
192 template<
bool PRE_PB,
bool POST_PB>
193 inline byte RDMEM_impl (
unsigned address,
unsigned cc);
194 template<
unsigned PC_OFFSET>
195 inline byte RDMEM_OPCODE(
unsigned cc);
196 inline byte RDMEM(
unsigned address,
unsigned cc);
198 template<
bool PRE_PB,
bool POST_PB>
199 word RD_WORD_slow(
unsigned address,
unsigned cc);
200 template<
bool PRE_PB,
bool POST_PB>
201 inline word RD_WORD_impl2(
unsigned address,
unsigned cc);
202 template<
bool PRE_PB,
bool POST_PB>
203 inline word RD_WORD_impl (
unsigned address,
unsigned cc);
204 template<
unsigned PC_OFFSET>
205 inline word RD_WORD_PC(
unsigned cc);
206 inline word RD_WORD(
unsigned address,
unsigned cc);
208 template<
bool PRE_PB,
bool POST_PB>
209 void WRMEMslow(
unsigned address,
byte value,
unsigned cc);
210 template<
bool PRE_PB,
bool POST_PB>
211 inline void WRMEM_impl2(
unsigned address,
byte value,
unsigned cc);
212 template<
bool PRE_PB,
bool POST_PB>
213 inline void WRMEM_impl (
unsigned address,
byte value,
unsigned cc);
214 inline void WRMEM(
unsigned address,
byte value,
unsigned cc);
216 void WR_WORD_slow(
unsigned address,
word value,
unsigned cc);
217 inline void WR_WORD(
unsigned address,
word value,
unsigned cc);
219 template<
bool PRE_PB,
bool POST_PB>
220 void WR_WORD_rev_slow(
unsigned address,
word value,
unsigned cc);
221 template<
bool PRE_PB,
bool POST_PB>
222 inline void WR_WORD_rev2(
unsigned address,
word value,
unsigned cc);
223 template<
bool PRE_PB,
bool POST_PB>
224 inline void WR_WORD_rev (
unsigned address,
word value,
unsigned cc);
226 void executeInstructions();
231 [[nodiscard]]
ExecIRQ getExecIRQ()
const;
232 void executeSlow(
ExecIRQ execIRQ);
234 template<Reg8> [[nodiscard]]
inline byte get8()
const;
235 template<Reg16> [[nodiscard]]
inline word get16()
const;
236 template<Reg8>
inline void set8 (
byte x);
237 template<Reg16>
inline void set16(
word x);
239 template<Reg8 DST, Reg8 SRC,
int EE>
inline II ld_R_R();
240 template<Reg16 REG,
int EE>
inline II ld_sp_SS();
241 template<Reg16 REG>
inline II ld_SS_a();
242 template<Reg8 SRC>
inline II ld_xhl_R();
243 template<Reg16 IXY, Reg8 SRC>
inline II ld_xix_R();
245 inline II ld_xhl_byte();
246 template<Reg16 IXY>
inline II ld_xix_byte();
248 template<
int EE>
inline II WR_NN_Y(
word reg);
249 template<Reg16 REG,
int EE>
inline II ld_xword_SS();
250 template<Reg16 REG>
inline II ld_xword_SS_ED();
251 template<Reg16 REG>
inline II ld_a_SS();
253 inline II ld_xbyte_a();
254 inline II ld_a_xbyte();
256 template<Reg8 DST,
int EE>
inline II ld_R_byte();
257 template<Reg8 DST>
inline II ld_R_xhl();
258 template<Reg8 DST, Reg16 IXY>
inline II ld_R_xix();
260 template<
int EE>
inline word RD_P_XX();
261 template<Reg16 REG,
int EE>
inline II ld_SS_xword();
262 template<Reg16 REG>
inline II ld_SS_xword_ED();
264 template<Reg16 REG,
int EE>
inline II ld_SS_word();
266 inline void ADC(
byte reg);
268 template<Reg8 SRC,
int EE>
inline II adc_a_R();
269 inline II adc_a_byte();
270 inline II adc_a_xhl();
271 template<Reg16 IXY>
inline II adc_a_xix();
273 inline void ADD(
byte reg);
275 template<Reg8 SRC,
int EE>
inline II add_a_R();
276 inline II add_a_byte();
277 inline II add_a_xhl();
278 template<Reg16 IXY>
inline II add_a_xix();
280 inline void AND(
byte reg);
282 template<Reg8 SRC,
int EE>
inline II and_R();
283 inline II and_byte();
285 template<Reg16 IXY>
inline II and_xix();
287 inline void CP(
byte reg);
289 template<Reg8 SRC,
int EE>
inline II cp_R();
292 template<Reg16 IXY>
inline II cp_xix();
294 inline void OR(
byte reg);
296 template<Reg8 SRC,
int EE>
inline II or_R();
299 template<Reg16 IXY>
inline II or_xix();
301 inline void SBC(
byte reg);
303 template<Reg8 SRC,
int EE>
inline II sbc_a_R();
304 inline II sbc_a_byte();
305 inline II sbc_a_xhl();
306 template<Reg16 IXY>
inline II sbc_a_xix();
308 inline void SUB(
byte reg);
310 template<Reg8 SRC,
int EE>
inline II sub_R();
311 inline II sub_byte();
313 template<Reg16 IXY>
inline II sub_xix();
315 inline void XOR(
byte reg);
317 template<Reg8 SRC,
int EE>
inline II xor_R();
318 inline II xor_byte();
320 template<Reg16 IXY>
inline II xor_xix();
322 inline byte DEC(
byte reg);
323 template<Reg8 REG,
int EE>
inline II dec_R();
324 template<
int EE>
inline void DEC_X(
unsigned x);
326 template<Reg16 IXY>
inline II dec_xix();
328 inline byte INC(
byte reg);
329 template<Reg8 REG,
int EE>
inline II inc_R();
330 template<
int EE>
inline void INC_X(
unsigned x);
332 template<Reg16 IXY>
inline II inc_xix();
334 template<Reg16 REG>
inline II adc_hl_SS();
335 inline II adc_hl_hl();
336 template<Reg16 REG1, Reg16 REG2,
int EE>
inline II add_SS_TT();
337 template<Reg16 REG,
int EE>
inline II add_SS_SS();
338 template<Reg16 REG>
inline II sbc_hl_SS();
339 inline II sbc_hl_hl();
341 template<Reg16 REG,
int EE>
inline II dec_SS();
342 template<Reg16 REG,
int EE>
inline II inc_SS();
344 template<
unsigned N, Reg8 REG>
inline II bit_N_R();
345 template<
unsigned N>
inline II bit_N_xhl();
346 template<
unsigned N>
inline II bit_N_xix(
unsigned a);
348 template<
unsigned N, Reg8 REG>
inline II res_N_R();
349 template<
int EE>
inline byte RES_X(
unsigned bit,
unsigned addr);
350 template<
unsigned N>
inline II res_N_xhl();
351 template<
unsigned N, Reg8 REG>
inline II res_N_xix_R(
unsigned a);
353 template<
unsigned N, Reg8 REG>
inline II set_N_R();
354 template<
int EE>
inline byte SET_X(
unsigned bit,
unsigned addr);
355 template<
unsigned N>
inline II set_N_xhl();
356 template<
unsigned N, Reg8 REG>
inline II set_N_xix_R(
unsigned a);
358 inline byte RL(
byte reg);
359 template<
int EE>
inline byte RL_X(
unsigned x);
360 template<Reg8 REG>
inline II rl_R();
362 template<Reg8 REG>
inline II rl_xix_R(
unsigned a);
364 inline byte RLC(
byte reg);
365 template<
int EE>
inline byte RLC_X(
unsigned x);
366 template<Reg8 REG>
inline II rlc_R();
368 template<Reg8 REG>
inline II rlc_xix_R(
unsigned a);
370 inline byte RR(
byte reg);
371 template<
int EE>
inline byte RR_X(
unsigned x);
372 template<Reg8 REG>
inline II rr_R();
374 template<Reg8 REG>
inline II rr_xix_R(
unsigned a);
376 inline byte RRC(
byte reg);
377 template<
int EE>
inline byte RRC_X(
unsigned x);
378 template<Reg8 REG>
inline II rrc_R();
380 template<Reg8 REG>
inline II rrc_xix_R(
unsigned a);
382 inline byte SLA(
byte reg);
383 template<
int EE>
inline byte SLA_X(
unsigned x);
384 template<Reg8 REG>
inline II sla_R();
386 template<Reg8 REG>
inline II sla_xix_R(
unsigned a);
388 inline byte SLL(
byte reg);
389 template<
int EE>
inline byte SLL_X(
unsigned x);
390 template<Reg8 REG>
inline II sll_R();
392 template<Reg8 REG>
inline II sll_xix_R(
unsigned a);
395 inline byte SRA(
byte reg);
396 template<
int EE>
inline byte SRA_X(
unsigned x);
397 template<Reg8 REG>
inline II sra_R();
399 template<Reg8 REG>
inline II sra_xix_R(
unsigned a);
401 inline byte SRL(
byte reg);
402 template<
int EE>
inline byte SRL_X(
unsigned x);
403 template<Reg8 REG>
inline II srl_R();
405 template<Reg8 REG>
inline II srl_xix_R(
unsigned a);
415 template<
int EE>
inline void PUSH(
word reg);
416 template<Reg16 REG,
int EE>
inline II push_SS();
417 template<
int EE>
inline word POP();
418 template<Reg16 REG,
int EE>
inline II pop_SS();
420 template<
typename COND>
inline II call(COND cond);
421 template<
unsigned ADDR>
inline II rst();
423 template<
int EE,
typename COND>
inline II RET(COND cond);
424 template<
typename COND>
inline II ret(COND cond);
428 template<Reg16 REG,
int EE>
inline II jp_SS();
429 template<
typename COND>
inline II jp(COND cond);
430 template<
typename COND>
inline II jr(COND cond);
433 template<Reg16 REG,
int EE>
inline II ex_xsp_SS();
435 template<Reg8 REG>
inline II in_R_c();
436 inline II in_a_byte();
437 template<Reg8 REG>
inline II out_c_R();
439 inline II out_byte_a();
441 inline II BLOCK_CP(
int increase,
bool repeat);
447 inline II BLOCK_LD(
int increase,
bool repeat);
453 inline II BLOCK_IN(
int increase,
bool repeat);
459 inline II BLOCK_OUT(
int increase,
bool repeat);
465 template<
int EE = 0>
inline II nop();
471 inline II ex_af_af();
472 inline II ex_de_hl();
477 template<
unsigned N>
inline II im_N();
479 template<Reg8 REG>
inline II ld_a_IR();
483 template<Reg8 REG>
inline II mulub_a_R();
484 template<Reg16 REG>
inline II muluw_hl_SS();
void setInterface(MSXCPUInterface *interface_)
void lowerIRQ()
Lowers the maskable interrupt count.
void setNextSyncPoint(EmuTime::param time)
void disasmCommand(Interpreter &interp, std::span< const TclObject > tokens, TclObject &result) const
void setFreq(unsigned freq)
Change the clock freq.
void execute(bool fastForward)
void warp(EmuTime::param time)
CPUCore(MSXMotherBoard &motherboard, const std::string &name, const BooleanSetting &traceSetting, TclCallback &diHaltCallback, EmuTime::param time)
void lowerNMI()
Lowers the non-maskable interrupt count.
void exitCPULoopSync()
Request to exit the main CPU emulation loop.
EmuTime::param getCurrentTime() const
void exitCPULoopAsync()
Similar to exitCPULoopSync(), but this method may be called from any thread.
void raiseNMI()
Raises the non-maskable interrupt count.
BooleanSetting & getFreqLockedSetting()
void serialize(Archive &ar, unsigned version)
void doReset(EmuTime::param time)
Reset the CPU.
IntegerSetting & getFreqValueSetting()
void wait(EmuTime::param time)
EmuTime waitCycles(EmuTime::param time, unsigned cycles)
bool isM1Cycle(unsigned address) const
CacheLines getCacheLines()
void raiseIRQ()
Raises the maskable interrupt count.
A Setting with an integer value.
This file implemented 3 utility functions:
uint16_t word
16 bit unsigned integer
SERIALIZE_CLASS_VERSION(CassettePlayer, 2)
std::span< const byte *, CacheLine::NUM > read
std::span< byte *, CacheLine::NUM > write
constexpr void repeat(T n, Op op)
Repeat the given operation 'op' 'n' times.