49 std::span<const byte*, CacheLine::NUM>
read;
50 std::span< byte*, CacheLine::NUM>
write;
53template<
typename CPU_POLICY>
66 void doReset(EmuTime::param time);
82 void warp(EmuTime::param time);
84 void wait(EmuTime::param time);
85 EmuTime
waitCycles(EmuTime::param time,
unsigned cycles);
88 return {readCacheLine, writeCacheLine};
90 [[nodiscard]]
bool isM1Cycle(
unsigned address)
const;
124 template<
typename Archive>
125 void serialize(Archive& ar,
unsigned version);
128 void execute2(
bool fastForward);
129 [[nodiscard]]
bool needExitCPULoop();
130 void setSlowInstructions();
138 std::array<const byte*, CacheLine::NUM> readCacheLine;
139 std::array< byte*, CacheLine::NUM> writeCacheLine;
157 int slowInstructions;
165 bool nmiEdge =
false;
167 std::atomic<bool> exitLoop =
false;
176 inline void cpuTracePre();
177 inline void cpuTracePost();
178 void cpuTracePost_slow();
180 inline byte READ_PORT(
word port,
unsigned cc);
181 inline void WRITE_PORT(
word port,
byte value,
unsigned cc);
183 template<
bool PRE_PB,
bool POST_PB>
184 byte RDMEMslow(
unsigned address,
unsigned cc);
185 template<
bool PRE_PB,
bool POST_PB>
186 inline byte RDMEM_impl2(
unsigned address,
unsigned cc);
187 template<
bool PRE_PB,
bool POST_PB>
188 inline byte RDMEM_impl (
unsigned address,
unsigned cc);
189 template<
unsigned PC_OFFSET>
190 inline byte RDMEM_OPCODE(
unsigned cc);
191 inline byte RDMEM(
unsigned address,
unsigned cc);
193 template<
bool PRE_PB,
bool POST_PB>
194 word RD_WORD_slow(
unsigned address,
unsigned cc);
195 template<
bool PRE_PB,
bool POST_PB>
196 inline word RD_WORD_impl2(
unsigned address,
unsigned cc);
197 template<
bool PRE_PB,
bool POST_PB>
198 inline word RD_WORD_impl (
unsigned address,
unsigned cc);
199 template<
unsigned PC_OFFSET>
200 inline word RD_WORD_PC(
unsigned cc);
201 inline word RD_WORD(
unsigned address,
unsigned cc);
203 template<
bool PRE_PB,
bool POST_PB>
204 void WRMEMslow(
unsigned address,
byte value,
unsigned cc);
205 template<
bool PRE_PB,
bool POST_PB>
206 inline void WRMEM_impl2(
unsigned address,
byte value,
unsigned cc);
207 template<
bool PRE_PB,
bool POST_PB>
208 inline void WRMEM_impl (
unsigned address,
byte value,
unsigned cc);
209 inline void WRMEM(
unsigned address,
byte value,
unsigned cc);
211 void WR_WORD_slow(
unsigned address,
word value,
unsigned cc);
212 inline void WR_WORD(
unsigned address,
word value,
unsigned cc);
214 template<
bool PRE_PB,
bool POST_PB>
215 void WR_WORD_rev_slow(
unsigned address,
word value,
unsigned cc);
216 template<
bool PRE_PB,
bool POST_PB>
217 inline void WR_WORD_rev2(
unsigned address,
word value,
unsigned cc);
218 template<
bool PRE_PB,
bool POST_PB>
219 inline void WR_WORD_rev (
unsigned address,
word value,
unsigned cc);
221 void executeInstructions();
226 [[nodiscard]]
ExecIRQ getExecIRQ()
const;
227 void executeSlow(
ExecIRQ execIRQ);
229 template<Reg8> [[nodiscard]]
inline byte get8()
const;
230 template<Reg16> [[nodiscard]]
inline word get16()
const;
231 template<Reg8>
inline void set8 (
byte x);
232 template<Reg16>
inline void set16(
word x);
234 template<Reg8 DST, Reg8 SRC,
int EE>
inline II ld_R_R();
235 template<Reg16 REG,
int EE>
inline II ld_sp_SS();
236 template<Reg16 REG>
inline II ld_SS_a();
237 template<Reg8 SRC>
inline II ld_xhl_R();
238 template<Reg16 IXY, Reg8 SRC>
inline II ld_xix_R();
240 inline II ld_xhl_byte();
241 template<Reg16 IXY>
inline II ld_xix_byte();
243 template<
int EE>
inline II WR_NN_Y(
word reg);
244 template<Reg16 REG,
int EE>
inline II ld_xword_SS();
245 template<Reg16 REG>
inline II ld_xword_SS_ED();
246 template<Reg16 REG>
inline II ld_a_SS();
248 inline II ld_xbyte_a();
249 inline II ld_a_xbyte();
251 template<Reg8 DST,
int EE>
inline II ld_R_byte();
252 template<Reg8 DST>
inline II ld_R_xhl();
253 template<Reg8 DST, Reg16 IXY>
inline II ld_R_xix();
255 template<
int EE>
inline word RD_P_XX();
256 template<Reg16 REG,
int EE>
inline II ld_SS_xword();
257 template<Reg16 REG>
inline II ld_SS_xword_ED();
259 template<Reg16 REG,
int EE>
inline II ld_SS_word();
261 inline void ADC(
byte reg);
263 template<Reg8 SRC,
int EE>
inline II adc_a_R();
264 inline II adc_a_byte();
265 inline II adc_a_xhl();
266 template<Reg16 IXY>
inline II adc_a_xix();
268 inline void ADD(
byte reg);
270 template<Reg8 SRC,
int EE>
inline II add_a_R();
271 inline II add_a_byte();
272 inline II add_a_xhl();
273 template<Reg16 IXY>
inline II add_a_xix();
275 inline void AND(
byte reg);
277 template<Reg8 SRC,
int EE>
inline II and_R();
278 inline II and_byte();
280 template<Reg16 IXY>
inline II and_xix();
282 inline void CP(
byte reg);
284 template<Reg8 SRC,
int EE>
inline II cp_R();
287 template<Reg16 IXY>
inline II cp_xix();
289 inline void OR(
byte reg);
291 template<Reg8 SRC,
int EE>
inline II or_R();
294 template<Reg16 IXY>
inline II or_xix();
296 inline void SBC(
byte reg);
298 template<Reg8 SRC,
int EE>
inline II sbc_a_R();
299 inline II sbc_a_byte();
300 inline II sbc_a_xhl();
301 template<Reg16 IXY>
inline II sbc_a_xix();
303 inline void SUB(
byte reg);
305 template<Reg8 SRC,
int EE>
inline II sub_R();
306 inline II sub_byte();
308 template<Reg16 IXY>
inline II sub_xix();
310 inline void XOR(
byte reg);
312 template<Reg8 SRC,
int EE>
inline II xor_R();
313 inline II xor_byte();
315 template<Reg16 IXY>
inline II xor_xix();
317 inline byte DEC(
byte reg);
318 template<Reg8 REG,
int EE>
inline II dec_R();
319 template<
int EE>
inline void DEC_X(
unsigned x);
321 template<Reg16 IXY>
inline II dec_xix();
323 inline byte INC(
byte reg);
324 template<Reg8 REG,
int EE>
inline II inc_R();
325 template<
int EE>
inline void INC_X(
unsigned x);
327 template<Reg16 IXY>
inline II inc_xix();
329 template<Reg16 REG>
inline II adc_hl_SS();
330 inline II adc_hl_hl();
331 template<Reg16 REG1, Reg16 REG2,
int EE>
inline II add_SS_TT();
332 template<Reg16 REG,
int EE>
inline II add_SS_SS();
333 template<Reg16 REG>
inline II sbc_hl_SS();
334 inline II sbc_hl_hl();
336 template<Reg16 REG,
int EE>
inline II dec_SS();
337 template<Reg16 REG,
int EE>
inline II inc_SS();
339 template<
unsigned N, Reg8 REG>
inline II bit_N_R();
340 template<
unsigned N>
inline II bit_N_xhl();
341 template<
unsigned N>
inline II bit_N_xix(
unsigned a);
343 template<
unsigned N, Reg8 REG>
inline II res_N_R();
344 template<
int EE>
inline byte RES_X(
unsigned bit,
unsigned addr);
345 template<
unsigned N>
inline II res_N_xhl();
346 template<
unsigned N, Reg8 REG>
inline II res_N_xix_R(
unsigned a);
348 template<
unsigned N, Reg8 REG>
inline II set_N_R();
349 template<
int EE>
inline byte SET_X(
unsigned bit,
unsigned addr);
350 template<
unsigned N>
inline II set_N_xhl();
351 template<
unsigned N, Reg8 REG>
inline II set_N_xix_R(
unsigned a);
353 inline byte RL(
byte reg);
354 template<
int EE>
inline byte RL_X(
unsigned x);
355 template<Reg8 REG>
inline II rl_R();
357 template<Reg8 REG>
inline II rl_xix_R(
unsigned a);
359 inline byte RLC(
byte reg);
360 template<
int EE>
inline byte RLC_X(
unsigned x);
361 template<Reg8 REG>
inline II rlc_R();
363 template<Reg8 REG>
inline II rlc_xix_R(
unsigned a);
365 inline byte RR(
byte reg);
366 template<
int EE>
inline byte RR_X(
unsigned x);
367 template<Reg8 REG>
inline II rr_R();
369 template<Reg8 REG>
inline II rr_xix_R(
unsigned a);
371 inline byte RRC(
byte reg);
372 template<
int EE>
inline byte RRC_X(
unsigned x);
373 template<Reg8 REG>
inline II rrc_R();
375 template<Reg8 REG>
inline II rrc_xix_R(
unsigned a);
377 inline byte SLA(
byte reg);
378 template<
int EE>
inline byte SLA_X(
unsigned x);
379 template<Reg8 REG>
inline II sla_R();
381 template<Reg8 REG>
inline II sla_xix_R(
unsigned a);
383 inline byte SLL(
byte reg);
384 template<
int EE>
inline byte SLL_X(
unsigned x);
385 template<Reg8 REG>
inline II sll_R();
387 template<Reg8 REG>
inline II sll_xix_R(
unsigned a);
390 inline byte SRA(
byte reg);
391 template<
int EE>
inline byte SRA_X(
unsigned x);
392 template<Reg8 REG>
inline II sra_R();
394 template<Reg8 REG>
inline II sra_xix_R(
unsigned a);
396 inline byte SRL(
byte reg);
397 template<
int EE>
inline byte SRL_X(
unsigned x);
398 template<Reg8 REG>
inline II srl_R();
400 template<Reg8 REG>
inline II srl_xix_R(
unsigned a);
410 template<
int EE>
inline void PUSH(
word reg);
411 template<Reg16 REG,
int EE>
inline II push_SS();
412 template<
int EE>
inline word POP();
413 template<Reg16 REG,
int EE>
inline II pop_SS();
415 template<
typename COND>
inline II call(COND cond);
416 template<
unsigned ADDR>
inline II rst();
418 template<
int EE,
typename COND>
inline II RET(COND cond);
419 template<
typename COND>
inline II ret(COND cond);
423 template<Reg16 REG,
int EE>
inline II jp_SS();
424 template<
typename COND>
inline II jp(COND cond);
425 template<
typename COND>
inline II jr(COND cond);
428 template<Reg16 REG,
int EE>
inline II ex_xsp_SS();
430 template<Reg8 REG>
inline II in_R_c();
431 inline II in_a_byte();
432 template<Reg8 REG>
inline II out_c_R();
434 inline II out_byte_a();
436 inline II BLOCK_CP(
int increase,
bool repeat);
442 inline II BLOCK_LD(
int increase,
bool repeat);
448 inline II BLOCK_IN(
int increase,
bool repeat);
454 inline II BLOCK_OUT(
int increase,
bool repeat);
460 template<
int EE = 0>
inline II nop();
466 inline II ex_af_af();
467 inline II ex_de_hl();
472 template<
unsigned N>
inline II im_N();
474 template<Reg8 REG>
inline II ld_a_IR();
478 template<Reg8 REG>
inline II mulub_a_R();
479 template<Reg16 REG>
inline II muluw_hl_SS();
void setInterface(MSXCPUInterface *interface_)
void lowerIRQ()
Lowers the maskable interrupt count.
void setNextSyncPoint(EmuTime::param time)
void setFreq(unsigned freq)
Change the clock freq.
void execute(bool fastForward)
void warp(EmuTime::param time)
void lowerNMI()
Lowers the non-maskable interrupt count.
void exitCPULoopSync()
Request to exit the main CPU emulation loop.
EmuTime::param getCurrentTime() const
void exitCPULoopAsync()
Similar to exitCPULoopSync(), but this method may be called from any thread.
void raiseNMI()
Raises the non-maskable interrupt count.
BooleanSetting & getFreqLockedSetting()
void serialize(Archive &ar, unsigned version)
void doReset(EmuTime::param time)
Reset the CPU.
IntegerSetting & getFreqValueSetting()
void wait(EmuTime::param time)
EmuTime waitCycles(EmuTime::param time, unsigned cycles)
bool isM1Cycle(unsigned address) const
CacheLines getCacheLines()
void raiseIRQ()
Raises the maskable interrupt count.
A Setting with an integer value.
This file implemented 3 utility functions:
uint16_t word
16 bit unsigned integer
std::span< const byte *, CacheLine::NUM > read
std::span< byte *, CacheLine::NUM > write
constexpr void repeat(T n, Op op)
Repeat the given operation 'op' 'n' times.