openMSX
MSXCPU.hh
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1#ifndef MSXCPU_HH
2#define MSXCPU_HH
3
4#include "InfoTopic.hh"
5#include "SimpleDebuggable.hh"
6#include "Observer.hh"
7#include "BooleanSetting.hh"
8#include "CacheLine.hh"
9#include "EmuTime.hh"
10#include "TclCallback.hh"
11#include "serialize_meta.hh"
12#include "openmsx.hh"
13#include <array>
14#include <memory>
15#include <span>
16
17namespace openmsx {
18
19class MSXMotherBoard;
20class MSXCPUInterface;
21class CPUClock;
22class CPURegs;
23class Z80TYPE;
24class R800TYPE;
25template<typename T> class CPUCore;
26class TclObject;
27class Interpreter;
28
29class MSXCPU final : private Observer<Setting>
30{
31public:
33
34 explicit MSXCPU(MSXMotherBoard& motherboard);
35 ~MSXCPU();
36
41 void doReset(EmuTime::param time);
42
44 void setActiveCPU(CPUType cpu);
45
47 void setDRAMmode(bool dram);
48
51 void updateVisiblePage(byte page, byte primarySlot, byte secondarySlot);
52
56 void invalidateAllSlotsRWCache(word start, unsigned size);
57
63 void invalidateRWCache(unsigned start, unsigned size, int ps, int ss,
64 std::span<const byte, 256> disallowRead,
65 std::span<const byte, 256> disallowWrite);
66 void invalidateRCache (unsigned start, unsigned size, int ps, int ss,
67 std::span<const byte, 256> disallowRead,
68 std::span<const byte, 256> disallowWrite);
69 void invalidateWCache (unsigned start, unsigned size, int ps, int ss,
70 std::span<const byte, 256> disallowRead,
71 std::span<const byte, 256> disallowWrite);
72
82 void fillRWCache(unsigned start, unsigned size, const byte* rData, byte* wData, int ps, int ss,
83 std::span<const byte, 256> disallowRead,
84 std::span<const byte, 256> disallowWrite);
85 void fillRCache (unsigned start, unsigned size, const byte* rData, int ps, int ss,
86 std::span<const byte, 256> disallowRead,
87 std::span<const byte, 256> disallowWrite);
88 void fillWCache (unsigned start, unsigned size, byte* wData, int ps, int ss,
89 std::span<const byte, 256> disallowRead,
90 std::span<const byte, 256> disallowWrite);
91
97 void raiseIRQ();
98
103 void lowerIRQ();
104
110 void raiseNMI();
111
116 void lowerNMI();
117
123 [[nodiscard]] bool isM1Cycle(unsigned address) const;
124
126 void exitCPULoopSync();
128 void exitCPULoopAsync();
129
131 [[nodiscard]] bool isR800Active() const { return !z80Active; }
132
134 void setZ80Freq(unsigned freq);
135
136 void setInterface(MSXCPUInterface* interface);
137
138 void disasmCommand(Interpreter& interp,
139 std::span<const TclObject> tokens,
140 TclObject& result) const;
141
144 void setPaused(bool paused);
145
146 void setNextSyncPoint(EmuTime::param time);
147
148 void wait(EmuTime::param time);
149 EmuTime waitCyclesZ80(EmuTime::param time, unsigned cycles);
150 EmuTime waitCyclesR800(EmuTime::param time, unsigned cycles);
151
152 [[nodiscard]] CPURegs& getRegisters();
153
154 [[nodiscard]] auto* getZ80() { return z80.get(); }
155 [[nodiscard]] auto* getR800() { return r800.get(); }
156
157 template<typename Archive>
158 void serialize(Archive& ar, unsigned version);
159
160private:
161 void invalidateMemCacheSlot();
162
163 // only for MSXMotherBoard
164 void execute(bool fastForward);
165 friend class MSXMotherBoard;
166
172 EmuTime::param getCurrentTime() const;
173
174 // Observer<Setting>
175 void update(const Setting& setting) noexcept override;
176
177 template<bool READ, bool WRITE, bool SUB_START>
178 void setRWCache(unsigned start, unsigned size, const byte* rData, byte* wData, int ps, int ss,
179 std::span<const byte, 256> disallowRead, std::span<const byte, 256> disallowWrite);
180
181private:
182 MSXMotherBoard& motherboard;
183 BooleanSetting traceSetting;
184 TclCallback diHaltCallback;
185 const std::unique_ptr<CPUCore<Z80TYPE>> z80;
186 const std::unique_ptr<CPUCore<R800TYPE>> r800; // can be nullptr
187
188 std::array<std::array<const byte*, CacheLine::NUM>, 16> slotReadLines;
189 std::array<std::array< byte*, CacheLine::NUM>, 16> slotWriteLines;
190 std::array<byte, 4> slots; // active slot for page (= 4 * primSlot + secSlot)
191
192 struct TimeInfoTopic final : InfoTopic {
193 explicit TimeInfoTopic(InfoCommand& machineInfoCommand);
194 void execute(std::span<const TclObject> tokens,
195 TclObject& result) const override;
196 [[nodiscard]] std::string help(std::span<const TclObject> tokens) const override;
197 } timeInfo;
198
199 class CPUFreqInfoTopic final : public InfoTopic {
200 public:
201 CPUFreqInfoTopic(InfoCommand& machineInfoCommand,
202 const std::string& name, CPUClock& clock);
203 void execute(std::span<const TclObject> tokens,
204 TclObject& result) const override;
205 [[nodiscard]] std::string help(std::span<const TclObject> tokens) const override;
206 private:
207 CPUClock& clock;
208 };
209 CPUFreqInfoTopic z80FreqInfo; // always present
210 const std::unique_ptr<CPUFreqInfoTopic> r800FreqInfo; // can be nullptr
211
212 struct Debuggable final : SimpleDebuggable {
213 explicit Debuggable(MSXMotherBoard& motherboard);
214 [[nodiscard]] byte read(unsigned address) override;
215 void write(unsigned address, byte value) override;
216 } debuggable;
217
218 EmuTime reference{EmuTime::zero()};
219 bool z80Active{true};
220 bool newZ80Active{true};
221
222 MSXCPUInterface* interface{nullptr}; // only used for debug
223};
225
226} // namespace openmsx
227
228#endif
BaseSetting * setting
void setZ80Freq(unsigned freq)
Switch the Z80 clock freq.
Definition MSXCPU.cc:316
bool isM1Cycle(unsigned address) const
Should only be used from within a MSXDevice::readMem() method.
Definition MSXCPU.cc:310
void lowerNMI()
This methods lowers the non-maskable interrupt again.
Definition MSXCPU.cc:304
void serialize(Archive &ar, unsigned version)
Definition MSXCPU.cc:532
void setActiveCPU(CPUType cpu)
Switch between Z80/R800.
Definition MSXCPU.cc:90
void invalidateAllSlotsRWCache(word start, unsigned size)
Invalidate the CPU its cache for the interval [start, start + size) For example MSXMemoryMapper and M...
Definition MSXCPU.cc:181
void fillWCache(unsigned start, unsigned size, byte *wData, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
Definition MSXCPU.cc:282
void updateVisiblePage(byte page, byte primarySlot, byte secondarySlot)
Inform CPU of bank switch.
Definition MSXCPU.cc:160
void fillRCache(unsigned start, unsigned size, const byte *rData, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
Definition MSXCPU.cc:276
CPURegs & getRegisters()
Definition MSXCPU.cc:339
bool isR800Active() const
Is the R800 currently active?
Definition MSXCPU.hh:131
auto * getR800()
Definition MSXCPU.hh:155
void fillRWCache(unsigned start, unsigned size, const byte *rData, byte *wData, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
Fill the read and write cache lines for a specific slot with the specified value.
Definition MSXCPU.cc:270
void invalidateRCache(unsigned start, unsigned size, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
Definition MSXCPU.cc:255
EmuTime waitCyclesR800(EmuTime::param time, unsigned cycles)
Definition MSXCPU.cc:333
void exitCPULoopSync()
See CPUCore::exitCPULoopSync()
Definition MSXCPU.cc:126
void disasmCommand(Interpreter &interp, std::span< const TclObject > tokens, TclObject &result) const
Definition MSXCPU.cc:357
void setNextSyncPoint(EmuTime::param time)
Definition MSXCPU.cc:143
EmuTime waitCyclesZ80(EmuTime::param time, unsigned cycles)
Definition MSXCPU.cc:327
void raiseIRQ()
This method raises a maskable interrupt.
Definition MSXCPU.cc:289
void raiseNMI()
This method raises a non-maskable interrupt.
Definition MSXCPU.cc:299
void wait(EmuTime::param time)
Definition MSXCPU.cc:321
void doReset(EmuTime::param time)
Reset CPU.
Definition MSXCPU.cc:80
auto * getZ80()
Definition MSXCPU.hh:154
void invalidateRWCache(unsigned start, unsigned size, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
Similar to the method above, but only invalidates one specific slot.
Definition MSXCPU.cc:247
void setPaused(bool paused)
(un)pause CPU.
Definition MSXCPU.cc:365
void setInterface(MSXCPUInterface *interface)
Definition MSXCPU.cc:73
void exitCPULoopAsync()
See CPUCore::exitCPULoopAsync()
Definition MSXCPU.cc:131
friend class MSXMotherBoard
Definition MSXCPU.hh:165
void setDRAMmode(bool dram)
Sets DRAM or ROM mode (influences memory access speed for R800).
Definition MSXCPU.cc:101
void lowerIRQ()
This methods lowers the maskable interrupt again.
Definition MSXCPU.cc:294
void invalidateWCache(unsigned start, unsigned size, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
Definition MSXCPU.cc:262
Generic Gang-of-Four Observer class, templatized edition.
Definition Observer.hh:10
This file implemented 3 utility functions:
Definition Autofire.cc:9
uint16_t word
16 bit unsigned integer
Definition openmsx.hh:29
#define SERIALIZE_CLASS_VERSION(CLASS, VERSION)