25template<
typename T>
class CPUCore;
41 void doReset(EmuTime::param time);
64 std::span<const byte, 256> disallowRead,
65 std::span<const byte, 256> disallowWrite);
67 std::span<const byte, 256> disallowRead,
68 std::span<const byte, 256> disallowWrite);
70 std::span<const byte, 256> disallowRead,
71 std::span<const byte, 256> disallowWrite);
82 void fillRWCache(
unsigned start,
unsigned size,
const byte* rData,
byte* wData,
int ps,
int ss,
83 std::span<const byte, 256> disallowRead,
84 std::span<const byte, 256> disallowWrite);
85 void fillRCache (
unsigned start,
unsigned size,
const byte* rData,
int ps,
int ss,
86 std::span<const byte, 256> disallowRead,
87 std::span<const byte, 256> disallowWrite);
88 void fillWCache (
unsigned start,
unsigned size,
byte* wData,
int ps,
int ss,
89 std::span<const byte, 256> disallowRead,
90 std::span<const byte, 256> disallowWrite);
123 [[nodiscard]]
bool isM1Cycle(
unsigned address)
const;
139 std::span<const TclObject> tokens,
148 void wait(EmuTime::param time);
154 template<
typename Archive>
155 void serialize(Archive& ar,
unsigned version);
158 void invalidateMemCacheSlot();
161 void execute(
bool fastForward);
169 EmuTime::param getCurrentTime()
const;
174 template<
bool READ,
bool WRITE,
bool SUB_START>
175 void setRWCache(
unsigned start,
unsigned size,
const byte* rData,
byte* wData,
int ps,
int ss,
176 std::span<const byte, 256> disallowRead, std::span<const byte, 256> disallowWrite);
182 const std::unique_ptr<CPUCore<Z80TYPE>> z80;
183 const std::unique_ptr<CPUCore<R800TYPE>> r800;
185 std::array<std::array<const byte*, CacheLine::NUM>, 16> slotReadLines;
186 std::array<std::array< byte*, CacheLine::NUM>, 16> slotWriteLines;
187 std::array<byte, 4> slots;
190 explicit TimeInfoTopic(
InfoCommand& machineInfoCommand);
191 void execute(std::span<const TclObject> tokens,
193 [[nodiscard]] std::string help(std::span<const TclObject> tokens)
const override;
196 class CPUFreqInfoTopic final :
public InfoTopic {
199 const std::string& name,
CPUClock& clock);
200 void execute(std::span<const TclObject> tokens,
202 [[nodiscard]] std::string help(std::span<const TclObject> tokens)
const override;
206 CPUFreqInfoTopic z80FreqInfo;
207 const std::unique_ptr<CPUFreqInfoTopic> r800FreqInfo;
209 struct Debuggable final : SimpleDebuggable {
211 [[nodiscard]]
byte read(
unsigned address)
override;
212 void write(
unsigned address,
byte value)
override;
215 EmuTime reference{EmuTime::zero()};
216 bool z80Active{
true};
217 bool newZ80Active{
true};
void setZ80Freq(unsigned freq)
Switch the Z80 clock freq.
bool isM1Cycle(unsigned address) const
Should only be used from within a MSXDevice::readMem() method.
void lowerNMI()
This methods lowers the non-maskable interrupt again.
void serialize(Archive &ar, unsigned version)
void setActiveCPU(CPUType cpu)
Switch between Z80/R800.
void invalidateAllSlotsRWCache(word start, unsigned size)
Invalidate the CPU its cache for the interval [start, start + size) For example MSXMemoryMapper and M...
void fillWCache(unsigned start, unsigned size, byte *wData, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
void updateVisiblePage(byte page, byte primarySlot, byte secondarySlot)
Inform CPU of bank switch.
void fillRCache(unsigned start, unsigned size, const byte *rData, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
bool isR800Active() const
Is the R800 currently active?
void fillRWCache(unsigned start, unsigned size, const byte *rData, byte *wData, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
Fill the read and write cache lines for a specific slot with the specified value.
void invalidateRCache(unsigned start, unsigned size, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
EmuTime waitCyclesR800(EmuTime::param time, unsigned cycles)
void exitCPULoopSync()
See CPUCore::exitCPULoopSync()
void disasmCommand(Interpreter &interp, std::span< const TclObject > tokens, TclObject &result) const
void setNextSyncPoint(EmuTime::param time)
EmuTime waitCyclesZ80(EmuTime::param time, unsigned cycles)
void raiseIRQ()
This method raises a maskable interrupt.
void raiseNMI()
This method raises a non-maskable interrupt.
void wait(EmuTime::param time)
void doReset(EmuTime::param time)
Reset CPU.
void invalidateRWCache(unsigned start, unsigned size, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
Similar to the method above, but only invalidates one specific slot.
void setPaused(bool paused)
(un)pause CPU.
void setInterface(MSXCPUInterface *interface)
void exitCPULoopAsync()
See CPUCore::exitCPULoopAsync()
friend class MSXMotherBoard
void setDRAMmode(bool dram)
Sets DRAM or ROM mode (influences memory access speed for R800).
void lowerIRQ()
This methods lowers the maskable interrupt again.
MSXCPU(MSXMotherBoard &motherboard)
void invalidateWCache(unsigned start, unsigned size, int ps, int ss, std::span< const byte, 256 > disallowRead, std::span< const byte, 256 > disallowWrite)
Generic Gang-of-Four Observer class, templatized edition.
This file implemented 3 utility functions:
uint16_t word
16 bit unsigned integer
SERIALIZE_CLASS_VERSION(CassettePlayer, 2)
size_t size(std::string_view utf8)