179#include <type_traits>
204 #define MAYBE_UNUSED_LABEL [[maybe_unused]]
206 #pragma warning(disable : 4102)
207 #define MAYBE_UNUSED_LABEL
213enum Reg8 :
int {
A,
F,
B,
C,
D,
E,
H,
L,
IXH,
IXL,
IYH,
IYL,
REG_I,
REG_R,
DUMMY };
217static constexpr byte S_FLAG = 0x80;
218static constexpr byte Z_FLAG = 0x40;
219static constexpr byte Y_FLAG = 0x20;
220static constexpr byte H_FLAG = 0x10;
221static constexpr byte X_FLAG = 0x08;
222static constexpr byte V_FLAG = 0x04;
223static constexpr byte P_FLAG = V_FLAG;
224static constexpr byte N_FLAG = 0x02;
225static constexpr byte C_FLAG = 0x01;
229 std::array<byte, 256>
ZS;
231 std::array<byte, 256>
ZSP;
236static constexpr byte ZS0 = Z_FLAG;
237static constexpr byte ZSXY0 = Z_FLAG;
238static constexpr byte ZSP0 = Z_FLAG | V_FLAG;
239static constexpr byte ZSPXY0 = Z_FLAG | V_FLAG;
240static constexpr byte ZS255 = S_FLAG;
241static constexpr byte ZSXY255 = S_FLAG | X_FLAG | Y_FLAG;
243static constexpr Table initTables()
247 for (
auto i_ :
xrange(256)) {
248 auto i = narrow_cast<byte>(i_);
249 byte zFlag = (i == 0) ? Z_FLAG : 0;
250 byte sFlag = i & S_FLAG;
251 byte xFlag = i & X_FLAG;
252 byte yFlag = i & Y_FLAG;
254 for (
int v = 128; v != 0; v >>= 1) {
255 if (i & v) vFlag ^= V_FLAG;
257 table.
ZS [i] = zFlag | sFlag;
258 table.
ZSXY [i] = zFlag | sFlag | xFlag | yFlag;
259 table.
ZSP [i] = zFlag | sFlag | vFlag;
260 table.
ZSPXY[i] = zFlag | sFlag | xFlag | yFlag | vFlag;
261 table.
ZSPH [i] = zFlag | sFlag | vFlag | H_FLAG;
263 assert(table.
ZS [ 0] == ZS0);
264 assert(table.
ZSXY [ 0] == ZSXY0);
265 assert(table.
ZSP [ 0] == ZSP0);
266 assert(table.
ZSPXY[ 0] == ZSPXY0);
267 assert(table.
ZS [255] == ZS255);
268 assert(table.
ZSXY [255] == ZSXY255);
273static constexpr Table table = initTables();
297 , T(time, motherboard_.getScheduler())
298 , motherboard(motherboard_)
299 , scheduler(motherboard.getScheduler())
300 , traceSetting(traceSetting_)
301 , diHaltCallback(diHaltCallback_)
302 , IRQStatus(motherboard.getDebugger(), name +
".pendingIRQ",
303 "Non-zero if there are pending IRQs (thus CPU would enter "
304 "interrupt routine in EI mode).",
306 , IRQAccept(motherboard.getDebugger(), name +
".acceptIRQ",
307 "This probe is only useful to set a breakpoint on (the value "
308 "return by read is meaningless). The breakpoint gets triggered "
309 "right after the CPU accepted an IRQ.")
311 motherboard.getCommandController(),
tmpStrCat(name,
"_freq_locked"),
312 "real (locked) or custom (unlocked) CPU frequency",
315 motherboard.getCommandController(),
tmpStrCat(name,
"_freq"),
316 "custom CPU frequency (only valid when unlocked)",
317 T::CLOCK_FREQ, 1000000, 1000000000)
318 , freq(T::CLOCK_FREQ)
319 , tracingEnabled(traceSetting.getBoolean())
320 , isCMOS(motherboard.hasToshibaEngine())
322 static_assert(!std::is_polymorphic_v<CPUCore<T>>,
323 "keep CPUCore non-virtual to keep PC at offset 0");
330 assert(T::getTimeFast() <= time);
363 T::setMemPtr(0xFFFF);
393 assert(NMIStatus == 0);
394 assert(IRQStatus == 0);
416 if (exitLoop) [[unlikely]] {
431template<
typename T>
void CPUCore<T>::setSlowInstructions()
433 slowInstructions = 2;
439 assert(IRQStatus >= 0);
440 if (IRQStatus == 0) {
441 setSlowInstructions();
443 IRQStatus = IRQStatus + 1;
448 IRQStatus = IRQStatus - 1;
449 assert(IRQStatus >= 0);
454 assert(NMIStatus >= 0);
455 if (NMIStatus == 0) {
457 setSlowInstructions();
465 assert(NMIStatus >= 0);
481 return address == getPC();
486 assert(time >= getCurrentTime());
487 scheduler.schedule(time);
488 T::advanceTime(time);
494 EmuTime time2 = T::calcTime(time, cycles);
497 scheduler.schedule(time2);
507static constexpr char toHex(
byte x)
509 return narrow<char>((x < 10) ? (x +
'0') : (x - 10 +
'A'));
511static constexpr void toHex(
byte x, std::span<char, 3> buf)
513 buf[0] = toHex(x / 16);
514 buf[1] = toHex(x & 15);
520 word address = (tokens.size() < 3) ? getPC() :
word(tokens[2].getInt(interp));
521 std::array<byte, 4> outBuf;
522 std::string dasmOutput;
523 unsigned len =
dasm(*interface, address, outBuf, dasmOutput,
525 dasmOutput.resize(19,
' ');
527 std::array<char, 3> tmp; tmp[2] = 0;
528 for (
auto i :
xrange(len)) {
529 toHex(outBuf[i], tmp);
538 }
else if (&
setting == &freqValue) {
540 }
else if (&
setting == &traceSetting) {
541 tracingEnabled = traceSetting.getBoolean();
553 if (freqLocked.getBoolean()) {
558 T::setFreq(freqValue.getInt());
563template<
typename T>
inline byte CPUCore<T>::READ_PORT(
word port,
unsigned cc)
565 EmuTime time = T::getTimeFast(cc);
566 scheduler.schedule(time);
567 byte result = interface->readIO(port, time);
572template<
typename T>
inline void CPUCore<T>::WRITE_PORT(
word port,
byte value,
unsigned cc)
574 EmuTime time = T::getTimeFast(cc);
575 scheduler.schedule(time);
576 interface->writeIO(port, value, time);
580template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
586 if (readCacheLine[high] ==
nullptr) {
589 if (
const byte* line = interface->getReadCacheLine(addrBase)) {
591 T::template PRE_MEM<PRE_PB, POST_PB>(address);
592 T::template POST_MEM< POST_PB>(address);
593 readCacheLine[high] = line - addrBase;
594 return readCacheLine[high][address];
598 readCacheLine[high] =
reinterpret_cast<const byte*
>(1);
599 T::template PRE_MEM<PRE_PB, POST_PB>(address);
600 EmuTime time = T::getTimeFast(cc);
601 scheduler.schedule(time);
602 byte result = interface->readMem(narrow_cast<word>(address), time);
603 T::template POST_MEM<POST_PB>(address);
606template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
610 if (uintptr_t(line) > 1) [[likely]] {
612 T::template PRE_MEM<PRE_PB, POST_PB>(address);
613 T::template POST_MEM< POST_PB>(address);
614 return line[address];
616 return RDMEMslow<PRE_PB, POST_PB>(address, cc);
619template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
622 constexpr bool PRE = T::template Normalize<PRE_PB >::value;
623 constexpr bool POST = T::template Normalize<POST_PB>::value;
624 return RDMEM_impl2<PRE, POST>(address, cc);
637 unsigned address = narrow_cast<word>(getPC() + PC_OFFSET);
638 return RDMEM_impl<false, false>(address, cc);
642 return RDMEM_impl<true, true>(address, cc);
645template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
648 auto res =
word(RDMEM_impl<PRE_PB, false>(address, cc));
649 res |=
word(RDMEM_impl<false, POST_PB>(narrow_cast<word>(address + 1), cc + T::CC_RDMEM) << 8);
652template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
658 T::template PRE_WORD<PRE_PB, POST_PB>(address);
659 T::template POST_WORD< POST_PB>(address);
663 return RD_WORD_slow<PRE_PB, POST_PB>(address, cc);
666template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
669 constexpr bool PRE = T::template Normalize<PRE_PB >::value;
670 constexpr bool POST = T::template Normalize<POST_PB>::value;
671 return RD_WORD_impl2<PRE, POST>(address, cc);
675 unsigned addr = narrow_cast<word>(getPC() + PC_OFFSET);
676 return RD_WORD_impl<false, false>(addr, cc);
679 unsigned address,
unsigned cc)
681 return RD_WORD_impl<true, true>(address, cc);
684template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
690 if (writeCacheLine[high] ==
nullptr) {
693 if (
byte* line = interface->getWriteCacheLine(addrBase)) {
695 T::template PRE_MEM<PRE_PB, POST_PB>(address);
696 T::template POST_MEM< POST_PB>(address);
697 writeCacheLine[high] = line - addrBase;
698 writeCacheLine[high][address] = value;
703 writeCacheLine[high] =
reinterpret_cast<byte*
>(1);
704 T::template PRE_MEM<PRE_PB, POST_PB>(address);
705 EmuTime time = T::getTimeFast(cc);
706 scheduler.schedule(time);
707 interface->writeMem(narrow_cast<word>(address), value, time);
708 T::template POST_MEM<POST_PB>(address);
710template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
712 unsigned address,
byte value,
unsigned cc)
715 if (uintptr_t(line) > 1) [[likely]] {
717 T::template PRE_MEM<PRE_PB, POST_PB>(address);
718 T::template POST_MEM< POST_PB>(address);
719 line[address] = value;
721 WRMEMslow<PRE_PB, POST_PB>(address, value, cc);
724template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
726 unsigned address,
byte value,
unsigned cc)
728 constexpr bool PRE = T::template Normalize<PRE_PB >::value;
729 constexpr bool POST = T::template Normalize<POST_PB>::value;
730 WRMEM_impl2<PRE, POST>(address, value, cc);
733 unsigned address,
byte value,
unsigned cc)
735 WRMEM_impl<true, true>(address, value, cc);
738template<
typename T>
NEVER_INLINE void CPUCore<T>::WR_WORD_slow(
739 unsigned address,
word value,
unsigned cc)
741 WRMEM_impl<true, false>( address,
byte(value & 255), cc);
742 WRMEM_impl<false, true>(narrow_cast<word>(address + 1),
byte(value >> 8), cc + T::CC_WRMEM);
745 unsigned address,
word value,
unsigned cc)
750 T::template PRE_WORD<true, true>(address);
751 T::template POST_WORD< true>(address);
755 WR_WORD_slow(address, value, cc);
760template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
762 unsigned address,
word value,
unsigned cc)
764 WRMEM_impl<PRE_PB, false>(narrow_cast<word>(address + 1),
byte(value >> 8), cc);
765 WRMEM_impl<false, POST_PB>( address,
byte(value & 255), cc + T::CC_WRMEM);
767template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
769 unsigned address,
word value,
unsigned cc)
774 T::template PRE_WORD<PRE_PB, POST_PB>(address);
775 T::template POST_WORD< POST_PB>(address);
779 WR_WORD_rev_slow<PRE_PB, POST_PB>(address, value, cc);
782template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
784 unsigned address,
word value,
unsigned cc)
786 constexpr bool PRE = T::template Normalize<PRE_PB >::value;
787 constexpr bool POST = T::template Normalize<POST_PB>::value;
788 WR_WORD_rev2<PRE, POST>(address, value, cc);
798 PUSH<T::EE_NMI_1>(getPC());
804template<
typename T>
inline void CPUCore<T>::irq0()
808 assert(interface->readIRQVector() == 0xFF);
813 PUSH<T::EE_IRQ0_1>(getPC());
815 T::setMemPtr(getPC());
820template<
typename T>
inline void CPUCore<T>::irq1()
826 PUSH<T::EE_IRQ1_1>(getPC());
828 T::setMemPtr(getPC());
833template<
typename T>
inline void CPUCore<T>::irq2()
839 PUSH<T::EE_IRQ2_1>(getPC());
840 unsigned x = interface->readIRQVector() | (getI() << 8);
841 setPC(RD_WORD(x, T::CC_IRQ2_2));
842 T::setMemPtr(getPC());
847void CPUCore<T>::executeInstructions()
849 checkNoCurrentFlags();
850#ifdef USE_COMPUTED_GOTO
853 static void* opcodeTable[256] = {
854 &&op00, &&op01, &&op02, &&op03, &&op04, &&op05, &&op06, &&op07,
855 &&op08, &&op09, &&op0A, &&op0B, &&op0C, &&op0D, &&op0E, &&op0F,
856 &&op10, &&op11, &&op12, &&op13, &&op14, &&op15, &&op16, &&op17,
857 &&op18, &&op19, &&op1A, &&op1B, &&op1C, &&op1D, &&op1E, &&op1F,
858 &&op20, &&op21, &&op22, &&op23, &&op24, &&op25, &&op26, &&op27,
859 &&op28, &&op29, &&op2A, &&op2B, &&op2C, &&op2D, &&op2E, &&op2F,
860 &&op30, &&op31, &&op32, &&op33, &&op34, &&op35, &&op36, &&op37,
861 &&op38, &&op39, &&op3A, &&op3B, &&op3C, &&op3D, &&op3E, &&op3F,
862 &&op00, &&op41, &&op42, &&op43, &&op44, &&op45, &&op46, &&op47,
863 &&op48, &&op00, &&op4A, &&op4B, &&op4C, &&op4D, &&op4E, &&op4F,
864 &&op50, &&op51, &&op00, &&op53, &&op54, &&op55, &&op56, &&op57,
865 &&op58, &&op59, &&op5A, &&op00, &&op5C, &&op5D, &&op5E, &&op5F,
866 &&op60, &&op61, &&op62, &&op63, &&op00, &&op65, &&op66, &&op67,
867 &&op68, &&op69, &&op6A, &&op6B, &&op6C, &&op00, &&op6E, &&op6F,
868 &&op70, &&op71, &&op72, &&op73, &&op74, &&op75, &&op76, &&op77,
869 &&op78, &&op79, &&op7A, &&op7B, &&op7C, &&op7D, &&op7E, &&op00,
870 &&op80, &&op81, &&op82, &&op83, &&op84, &&op85, &&op86, &&op87,
871 &&op88, &&op89, &&op8A, &&op8B, &&op8C, &&op8D, &&op8E, &&op8F,
872 &&op90, &&op91, &&op92, &&op93, &&op94, &&op95, &&op96, &&op97,
873 &&op98, &&op99, &&op9A, &&op9B, &&op9C, &&op9D, &&op9E, &&op9F,
874 &&opA0, &&opA1, &&opA2, &&opA3, &&opA4, &&opA5, &&opA6, &&opA7,
875 &&opA8, &&opA9, &&opAA, &&opAB, &&opAC, &&opAD, &&opAE, &&opAF,
876 &&opB0, &&opB1, &&opB2, &&opB3, &&opB4, &&opB5, &&opB6, &&opB7,
877 &&opB8, &&opB9, &&opBA, &&opBB, &&opBC, &&opBD, &&opBE, &&opBF,
878 &&opC0, &&opC1, &&opC2, &&opC3, &&opC4, &&opC5, &&opC6, &&opC7,
879 &&opC8, &&opC9, &&opCA, &&opCB, &&opCC, &&opCD, &&opCE, &&opCF,
880 &&opD0, &&opD1, &&opD2, &&opD3, &&opD4, &&opD5, &&opD6, &&opD7,
881 &&opD8, &&opD9, &&opDA, &&opDB, &&opDC, &&opDD, &&opDE, &&opDF,
882 &&opE0, &&opE1, &&opE2, &&opE3, &&opE4, &&opE5, &&opE6, &&opE7,
883 &&opE8, &&opE9, &&opEA, &&opEB, &&opEC, &&opED, &&opEE, &&opEF,
884 &&opF0, &&opF1, &&opF2, &&opF3, &&opF4, &&opF5, &&opF6, &&opF7,
885 &&opF8, &&opF9, &&opFA, &&opFB, &&opFC, &&opFD, &&opFE, &&opFF,
891 setPC(getPC() + ii.length); \
893 T::R800Refresh(*this); \
894 if (!T::limitReached()) [[likely]] { \
896 unsigned address = getPC(); \
897 const byte* line = readCacheLine[address >> CacheLine::BITS]; \
898 if (uintptr_t(line) > 1) [[likely]] { \
899 T::template PRE_MEM<false, false>(address); \
900 T::template POST_MEM< false>(address); \
901 byte op = line[address]; \
902 goto *(opcodeTable[op]); \
911 setPC(getPC() + ii.length); \
913 T::R800Refresh(*this); \
914 assert(T::limitReached()); \
918 setPC(getPC() + ii.length); \
921 assert(T::limitReached()); \
925#define CASE(X) op##X:
930 setPC(getPC() + ii.length); \
932 T::R800Refresh(*this); \
933 if (!T::limitReached()) [[likely]] { \
939 setPC(getPC() + ii.length); \
941 T::R800Refresh(*this); \
942 assert(T::limitReached()); \
946 setPC(getPC() + ii.length); \
949 assert(T::limitReached()); \
952#define CASE(X) case 0x##X:
956#ifndef USE_COMPUTED_GOTO
960 byte opcodeMain = RDMEM_OPCODE<0>(T::CC_MAIN);
962#ifdef USE_COMPUTED_GOTO
963 goto *(opcodeTable[opcodeMain]);
966 unsigned address = getPC();
967 byte opcodeSlow = RDMEMslow<false, false>(address, T::CC_MAIN);
968 goto *(opcodeTable[opcodeSlow]);
972#ifndef USE_COMPUTED_GOTO
974 switch (opcodeMain) {
988CASE(08) { II ii = ex_af_af();
NEXT; }
993CASE(20) { II ii = jr(CondNZ());
NEXT; }
994CASE(28) { II ii = jr(CondZ ());
NEXT; }
995CASE(30) { II ii = jr(CondNC());
NEXT; }
996CASE(38) { II ii = jr(CondC ());
NEXT; }
997CASE(18) { II ii = jr(CondTrue());
NEXT; }
999CASE(32) { II ii = ld_xbyte_a();
NEXT; }
1001CASE(22) { II ii = ld_xword_SS<HL,0>();
NEXT; }
1002CASE(2
A) { II ii = ld_SS_xword<HL,0>();
NEXT; }
1003CASE(02) { II ii = ld_SS_a<BC>();
NEXT; }
1004CASE(12) { II ii = ld_SS_a<DE>();
NEXT; }
1005CASE(1
A) { II ii = ld_a_SS<DE>();
NEXT; }
1006CASE(0
A) { II ii = ld_a_SS<BC>();
NEXT; }
1007CASE(03) { II ii = inc_SS<BC,0>();
NEXT; }
1008CASE(13) { II ii = inc_SS<DE,0>();
NEXT; }
1009CASE(23) { II ii = inc_SS<HL,0>();
NEXT; }
1010CASE(33) { II ii = inc_SS<SP,0>();
NEXT; }
1011CASE(0
B) { II ii = dec_SS<BC,0>();
NEXT; }
1012CASE(1
B) { II ii = dec_SS<DE,0>();
NEXT; }
1013CASE(2
B) { II ii = dec_SS<HL,0>();
NEXT; }
1014CASE(3
B) { II ii = dec_SS<SP,0>();
NEXT; }
1015CASE(09) { II ii = add_SS_TT<HL,BC,0>();
NEXT; }
1016CASE(19) { II ii = add_SS_TT<HL,DE,0>();
NEXT; }
1017CASE(29) { II ii = add_SS_SS<HL ,0>();
NEXT; }
1018CASE(39) { II ii = add_SS_TT<HL,SP,0>();
NEXT; }
1019CASE(01) { II ii = ld_SS_word<BC,0>();
NEXT; }
1020CASE(11) { II ii = ld_SS_word<DE,0>();
NEXT; }
1021CASE(21) { II ii = ld_SS_word<HL,0>();
NEXT; }
1022CASE(31) { II ii = ld_SS_word<SP,0>();
NEXT; }
1023CASE(04) { II ii = inc_R<B,0>();
NEXT; }
1025CASE(14) { II ii = inc_R<D,0>();
NEXT; }
1027CASE(24) { II ii = inc_R<H,0>();
NEXT; }
1030CASE(34) { II ii = inc_xhl();
NEXT; }
1031CASE(05) { II ii = dec_R<B,0>();
NEXT; }
1033CASE(15) { II ii = dec_R<D,0>();
NEXT; }
1035CASE(25) { II ii = dec_R<H,0>();
NEXT; }
1038CASE(35) { II ii = dec_xhl();
NEXT; }
1039CASE(06) { II ii = ld_R_byte<B,0>();
NEXT; }
1040CASE(0
E) { II ii = ld_R_byte<C,0>();
NEXT; }
1041CASE(16) { II ii = ld_R_byte<D,0>();
NEXT; }
1042CASE(1
E) { II ii = ld_R_byte<E,0>();
NEXT; }
1043CASE(26) { II ii = ld_R_byte<H,0>();
NEXT; }
1044CASE(2
E) { II ii = ld_R_byte<L,0>();
NEXT; }
1045CASE(3
E) { II ii = ld_R_byte<A,0>();
NEXT; }
1046CASE(36) { II ii = ld_xhl_byte();
NEXT; }
1048CASE(41) { II ii = ld_R_R<B,C,0>();
NEXT; }
1049CASE(42) { II ii = ld_R_R<B,D,0>();
NEXT; }
1050CASE(43) { II ii = ld_R_R<B,E,0>();
NEXT; }
1051CASE(44) { II ii = ld_R_R<B,H,0>();
NEXT; }
1052CASE(45) { II ii = ld_R_R<B,L,0>();
NEXT; }
1053CASE(47) { II ii = ld_R_R<B,A,0>();
NEXT; }
1054CASE(48) { II ii = ld_R_R<C,B,0>();
NEXT; }
1055CASE(4
A) { II ii = ld_R_R<C,D,0>();
NEXT; }
1056CASE(4
B) { II ii = ld_R_R<C,E,0>();
NEXT; }
1057CASE(4
C) { II ii = ld_R_R<C,H,0>();
NEXT; }
1058CASE(4
D) { II ii = ld_R_R<C,L,0>();
NEXT; }
1059CASE(4
F) { II ii = ld_R_R<C,A,0>();
NEXT; }
1060CASE(50) { II ii = ld_R_R<D,B,0>();
NEXT; }
1061CASE(51) { II ii = ld_R_R<D,C,0>();
NEXT; }
1062CASE(53) { II ii = ld_R_R<D,E,0>();
NEXT; }
1063CASE(54) { II ii = ld_R_R<D,H,0>();
NEXT; }
1064CASE(55) { II ii = ld_R_R<D,L,0>();
NEXT; }
1065CASE(57) { II ii = ld_R_R<D,A,0>();
NEXT; }
1066CASE(58) { II ii = ld_R_R<E,B,0>();
NEXT; }
1067CASE(59) { II ii = ld_R_R<E,C,0>();
NEXT; }
1068CASE(5
A) { II ii = ld_R_R<E,D,0>();
NEXT; }
1069CASE(5
C) { II ii = ld_R_R<E,H,0>();
NEXT; }
1070CASE(5
D) { II ii = ld_R_R<E,L,0>();
NEXT; }
1071CASE(5
F) { II ii = ld_R_R<E,A,0>();
NEXT; }
1072CASE(60) { II ii = ld_R_R<H,B,0>();
NEXT; }
1073CASE(61) { II ii = ld_R_R<H,C,0>();
NEXT; }
1074CASE(62) { II ii = ld_R_R<H,D,0>();
NEXT; }
1075CASE(63) { II ii = ld_R_R<H,E,0>();
NEXT; }
1076CASE(65) { II ii = ld_R_R<H,L,0>();
NEXT; }
1077CASE(67) { II ii = ld_R_R<H,A,0>();
NEXT; }
1078CASE(68) { II ii = ld_R_R<L,B,0>();
NEXT; }
1079CASE(69) { II ii = ld_R_R<L,C,0>();
NEXT; }
1080CASE(6
A) { II ii = ld_R_R<L,D,0>();
NEXT; }
1081CASE(6
B) { II ii = ld_R_R<L,E,0>();
NEXT; }
1082CASE(6
C) { II ii = ld_R_R<L,H,0>();
NEXT; }
1083CASE(6
F) { II ii = ld_R_R<L,A,0>();
NEXT; }
1084CASE(78) { II ii = ld_R_R<A,B,0>();
NEXT; }
1085CASE(79) { II ii = ld_R_R<A,C,0>();
NEXT; }
1086CASE(7
A) { II ii = ld_R_R<A,D,0>();
NEXT; }
1087CASE(7
B) { II ii = ld_R_R<A,E,0>();
NEXT; }
1088CASE(7
C) { II ii = ld_R_R<A,H,0>();
NEXT; }
1089CASE(7
D) { II ii = ld_R_R<A,L,0>();
NEXT; }
1090CASE(70) { II ii = ld_xhl_R<B>();
NEXT; }
1091CASE(71) { II ii = ld_xhl_R<C>();
NEXT; }
1092CASE(72) { II ii = ld_xhl_R<D>();
NEXT; }
1093CASE(73) { II ii = ld_xhl_R<E>();
NEXT; }
1094CASE(74) { II ii = ld_xhl_R<H>();
NEXT; }
1095CASE(75) { II ii = ld_xhl_R<L>();
NEXT; }
1096CASE(77) { II ii = ld_xhl_R<A>();
NEXT; }
1097CASE(46) { II ii = ld_R_xhl<B>();
NEXT; }
1098CASE(4
E) { II ii = ld_R_xhl<C>();
NEXT; }
1099CASE(56) { II ii = ld_R_xhl<D>();
NEXT; }
1100CASE(5
E) { II ii = ld_R_xhl<E>();
NEXT; }
1101CASE(66) { II ii = ld_R_xhl<H>();
NEXT; }
1102CASE(6
E) { II ii = ld_R_xhl<L>();
NEXT; }
1103CASE(7
E) { II ii = ld_R_xhl<A>();
NEXT; }
1106CASE(80) { II ii = add_a_R<B,0>();
NEXT; }
1107CASE(81) { II ii = add_a_R<C,0>();
NEXT; }
1108CASE(82) { II ii = add_a_R<D,0>();
NEXT; }
1109CASE(83) { II ii = add_a_R<E,0>();
NEXT; }
1110CASE(84) { II ii = add_a_R<H,0>();
NEXT; }
1111CASE(85) { II ii = add_a_R<L,0>();
NEXT; }
1112CASE(86) { II ii = add_a_xhl();
NEXT; }
1113CASE(87) { II ii = add_a_a();
NEXT; }
1114CASE(88) { II ii = adc_a_R<B,0>();
NEXT; }
1115CASE(89) { II ii = adc_a_R<C,0>();
NEXT; }
1116CASE(8
A) { II ii = adc_a_R<D,0>();
NEXT; }
1117CASE(8
B) { II ii = adc_a_R<E,0>();
NEXT; }
1118CASE(8
C) { II ii = adc_a_R<H,0>();
NEXT; }
1119CASE(8
D) { II ii = adc_a_R<L,0>();
NEXT; }
1122CASE(90) { II ii = sub_R<B,0>();
NEXT; }
1123CASE(91) { II ii = sub_R<C,0>();
NEXT; }
1124CASE(92) { II ii = sub_R<D,0>();
NEXT; }
1125CASE(93) { II ii = sub_R<E,0>();
NEXT; }
1126CASE(94) { II ii = sub_R<H,0>();
NEXT; }
1127CASE(95) { II ii = sub_R<L,0>();
NEXT; }
1128CASE(96) { II ii = sub_xhl();
NEXT; }
1130CASE(98) { II ii = sbc_a_R<B,0>();
NEXT; }
1131CASE(99) { II ii = sbc_a_R<C,0>();
NEXT; }
1132CASE(9
A) { II ii = sbc_a_R<D,0>();
NEXT; }
1133CASE(9
B) { II ii = sbc_a_R<E,0>();
NEXT; }
1134CASE(9
C) { II ii = sbc_a_R<H,0>();
NEXT; }
1135CASE(9
D) { II ii = sbc_a_R<L,0>();
NEXT; }
1138CASE(A0) { II ii = and_R<B,0>();
NEXT; }
1139CASE(A1) { II ii = and_R<C,0>();
NEXT; }
1141CASE(A3) { II ii = and_R<E,0>();
NEXT; }
1142CASE(A4) { II ii = and_R<H,0>();
NEXT; }
1143CASE(A5) { II ii = and_R<L,0>();
NEXT; }
1144CASE(A6) { II ii = and_xhl();
NEXT; }
1146CASE(A8) { II ii = xor_R<B,0>();
NEXT; }
1147CASE(A9) { II ii = xor_R<C,0>();
NEXT; }
1148CASE(AA) { II ii = xor_R<D,0>();
NEXT; }
1149CASE(AB) { II ii = xor_R<E,0>();
NEXT; }
1150CASE(AC) { II ii = xor_R<H,0>();
NEXT; }
1151CASE(AD) { II ii = xor_R<L,0>();
NEXT; }
1152CASE(AE) { II ii = xor_xhl();
NEXT; }
1162CASE(B8) { II ii = cp_R<B,0>();
NEXT; }
1163CASE(B9) { II ii = cp_R<C,0>();
NEXT; }
1164CASE(BA) { II ii = cp_R<D,0>();
NEXT; }
1165CASE(BB) { II ii = cp_R<E,0>();
NEXT; }
1167CASE(BD) { II ii = cp_R<L,0>();
NEXT; }
1168CASE(BE) { II ii = cp_xhl();
NEXT; }
1171CASE(D3) { II ii = out_byte_a();
NEXT; }
1172CASE(DB) { II ii = in_a_byte();
NEXT; }
1174CASE(E3) { II ii = ex_xsp_SS<HL,0>();
NEXT; }
1175CASE(EB) { II ii = ex_de_hl();
NEXT; }
1176CASE(E9) { II ii = jp_SS<HL,0>();
NEXT; }
1177CASE(F9) { II ii = ld_sp_SS<HL,0>();
NEXT; }
1180CASE(C6) { II ii = add_a_byte();
NEXT; }
1181CASE(CE) { II ii = adc_a_byte();
NEXT; }
1182CASE(D6) { II ii = sub_byte();
NEXT; }
1184CASE(E6) { II ii = and_byte();
NEXT; }
1185CASE(EE) { II ii = xor_byte();
NEXT; }
1186CASE(F6) { II ii = or_byte();
NEXT; }
1187CASE(FE) { II ii = cp_byte();
NEXT; }
1188CASE(C0) { II ii = ret(CondNZ());
NEXT; }
1189CASE(C8) { II ii = ret(CondZ ());
NEXT; }
1190CASE(D0) { II ii = ret(CondNC());
NEXT; }
1191CASE(D8) { II ii = ret(CondC ());
NEXT; }
1192CASE(E0) { II ii = ret(CondPO());
NEXT; }
1193CASE(E8) { II ii = ret(CondPE());
NEXT; }
1194CASE(F0) { II ii = ret(CondP ());
NEXT; }
1195CASE(F8) { II ii = ret(CondM ());
NEXT; }
1197CASE(C2) { II ii = jp(CondNZ());
NEXT; }
1198CASE(CA) { II ii = jp(CondZ ());
NEXT; }
1199CASE(D2) { II ii = jp(CondNC());
NEXT; }
1200CASE(DA) { II ii = jp(CondC ());
NEXT; }
1201CASE(E2) { II ii = jp(CondPO());
NEXT; }
1202CASE(EA) { II ii = jp(CondPE());
NEXT; }
1203CASE(F2) { II ii = jp(CondP ());
NEXT; }
1204CASE(FA) { II ii = jp(CondM ());
NEXT; }
1205CASE(C3) { II ii = jp(CondTrue());
NEXT; }
1206CASE(C4) { II ii = call(CondNZ());
NEXT; }
1207CASE(CC) { II ii = call(CondZ ());
NEXT; }
1208CASE(D4) { II ii = call(CondNC());
NEXT; }
1209CASE(DC) { II ii = call(CondC ());
NEXT; }
1210CASE(E4) { II ii = call(CondPO());
NEXT; }
1211CASE(EC) { II ii = call(CondPE());
NEXT; }
1212CASE(F4) { II ii = call(CondP ());
NEXT; }
1213CASE(FC) { II ii = call(CondM ());
NEXT; }
1214CASE(CD) { II ii = call(CondTrue());
NEXT; }
1215CASE(C1) { II ii = pop_SS <BC,0>();
NEXT; }
1216CASE(D1) { II ii = pop_SS <DE,0>();
NEXT; }
1217CASE(E1) { II ii = pop_SS <HL,0>();
NEXT; }
1218CASE(F1) { II ii = pop_SS <AF,0>();
NEXT; }
1219CASE(C5) { II ii = push_SS<BC,0>();
NEXT; }
1220CASE(D5) { II ii = push_SS<DE,0>();
NEXT; }
1221CASE(E5) { II ii = push_SS<HL,0>();
NEXT; }
1222CASE(F5) { II ii = push_SS<AF,0>();
NEXT; }
1223CASE(C7) { II ii = rst<0x00>();
NEXT; }
1224CASE(CF) { II ii = rst<0x08>();
NEXT; }
1225CASE(D7) { II ii = rst<0x10>();
NEXT; }
1226CASE(DF) { II ii = rst<0x18>();
NEXT; }
1227CASE(E7) { II ii = rst<0x20>();
NEXT; }
1228CASE(EF) { II ii = rst<0x28>();
NEXT; }
1229CASE(F7) { II ii = rst<0x30>();
NEXT; }
1230CASE(FF) { II ii = rst<0x38>();
NEXT; }
1233 byte cb_opcode = RDMEM_OPCODE<0>(T::CC_PREFIX);
1235 switch (cb_opcode) {
1236 case 0x00: { II ii = rlc_R<B>();
NEXT; }
1237 case 0x01: { II ii = rlc_R<C>();
NEXT; }
1238 case 0x02: { II ii = rlc_R<D>();
NEXT; }
1239 case 0x03: { II ii = rlc_R<E>();
NEXT; }
1240 case 0x04: { II ii = rlc_R<H>();
NEXT; }
1241 case 0x05: { II ii = rlc_R<L>();
NEXT; }
1242 case 0x07: { II ii = rlc_R<A>();
NEXT; }
1243 case 0x06: { II ii = rlc_xhl();
NEXT; }
1244 case 0x08: { II ii = rrc_R<B>();
NEXT; }
1245 case 0x09: { II ii = rrc_R<C>();
NEXT; }
1246 case 0x0a: { II ii = rrc_R<D>();
NEXT; }
1247 case 0x0b: { II ii = rrc_R<E>();
NEXT; }
1248 case 0x0c: { II ii = rrc_R<H>();
NEXT; }
1249 case 0x0d: { II ii = rrc_R<L>();
NEXT; }
1250 case 0x0f: { II ii = rrc_R<A>();
NEXT; }
1251 case 0x0e: { II ii = rrc_xhl();
NEXT; }
1252 case 0x10: { II ii = rl_R<B>();
NEXT; }
1253 case 0x11: { II ii = rl_R<C>();
NEXT; }
1254 case 0x12: { II ii = rl_R<D>();
NEXT; }
1255 case 0x13: { II ii = rl_R<E>();
NEXT; }
1256 case 0x14: { II ii = rl_R<H>();
NEXT; }
1257 case 0x15: { II ii = rl_R<L>();
NEXT; }
1258 case 0x17: { II ii = rl_R<A>();
NEXT; }
1259 case 0x16: { II ii = rl_xhl();
NEXT; }
1260 case 0x18: { II ii = rr_R<B>();
NEXT; }
1261 case 0x19: { II ii = rr_R<C>();
NEXT; }
1262 case 0x1a: { II ii = rr_R<D>();
NEXT; }
1263 case 0x1b: { II ii = rr_R<E>();
NEXT; }
1264 case 0x1c: { II ii = rr_R<H>();
NEXT; }
1265 case 0x1d: { II ii = rr_R<L>();
NEXT; }
1266 case 0x1f: { II ii = rr_R<A>();
NEXT; }
1267 case 0x1e: { II ii = rr_xhl();
NEXT; }
1268 case 0x20: { II ii = sla_R<B>();
NEXT; }
1269 case 0x21: { II ii = sla_R<C>();
NEXT; }
1270 case 0x22: { II ii = sla_R<D>();
NEXT; }
1271 case 0x23: { II ii = sla_R<E>();
NEXT; }
1272 case 0x24: { II ii = sla_R<H>();
NEXT; }
1273 case 0x25: { II ii = sla_R<L>();
NEXT; }
1274 case 0x27: { II ii = sla_R<A>();
NEXT; }
1275 case 0x26: { II ii = sla_xhl();
NEXT; }
1276 case 0x28: { II ii = sra_R<B>();
NEXT; }
1277 case 0x29: { II ii = sra_R<C>();
NEXT; }
1278 case 0x2a: { II ii = sra_R<D>();
NEXT; }
1279 case 0x2b: { II ii = sra_R<E>();
NEXT; }
1280 case 0x2c: { II ii = sra_R<H>();
NEXT; }
1281 case 0x2d: { II ii = sra_R<L>();
NEXT; }
1282 case 0x2f: { II ii = sra_R<A>();
NEXT; }
1283 case 0x2e: { II ii = sra_xhl();
NEXT; }
1284 case 0x30: { II ii = T::IS_R800 ? sla_R<B>() : sll_R<
B>();
NEXT; }
1285 case 0x31: { II ii = T::IS_R800 ? sla_R<C>() : sll_R<
C>();
NEXT; }
1286 case 0x32: { II ii = T::IS_R800 ? sla_R<D>() : sll_R<
D>();
NEXT; }
1287 case 0x33: { II ii = T::IS_R800 ? sla_R<E>() : sll_R<
E>();
NEXT; }
1288 case 0x34: { II ii = T::IS_R800 ? sla_R<H>() : sll_R<
H>();
NEXT; }
1289 case 0x35: { II ii = T::IS_R800 ? sla_R<L>() : sll_R<
L>();
NEXT; }
1290 case 0x37: { II ii = T::IS_R800 ? sla_R<A>() : sll_R<
A>();
NEXT; }
1291 case 0x36: { II ii = T::IS_R800 ? sla_xhl() : sll_xhl();
NEXT; }
1292 case 0x38: { II ii = srl_R<B>();
NEXT; }
1293 case 0x39: { II ii = srl_R<C>();
NEXT; }
1294 case 0x3a: { II ii = srl_R<D>();
NEXT; }
1295 case 0x3b: { II ii = srl_R<E>();
NEXT; }
1296 case 0x3c: { II ii = srl_R<H>();
NEXT; }
1297 case 0x3d: { II ii = srl_R<L>();
NEXT; }
1298 case 0x3f: { II ii = srl_R<A>();
NEXT; }
1299 case 0x3e: { II ii = srl_xhl();
NEXT; }
1301 case 0x40: { II ii = bit_N_R<0,B>();
NEXT; }
1302 case 0x41: { II ii = bit_N_R<0,C>();
NEXT; }
1303 case 0x42: { II ii = bit_N_R<0,D>();
NEXT; }
1304 case 0x43: { II ii = bit_N_R<0,E>();
NEXT; }
1305 case 0x44: { II ii = bit_N_R<0,H>();
NEXT; }
1306 case 0x45: { II ii = bit_N_R<0,L>();
NEXT; }
1307 case 0x47: { II ii = bit_N_R<0,A>();
NEXT; }
1308 case 0x48: { II ii = bit_N_R<1,B>();
NEXT; }
1309 case 0x49: { II ii = bit_N_R<1,C>();
NEXT; }
1310 case 0x4a: { II ii = bit_N_R<1,D>();
NEXT; }
1311 case 0x4b: { II ii = bit_N_R<1,E>();
NEXT; }
1312 case 0x4c: { II ii = bit_N_R<1,H>();
NEXT; }
1313 case 0x4d: { II ii = bit_N_R<1,L>();
NEXT; }
1314 case 0x4f: { II ii = bit_N_R<1,A>();
NEXT; }
1315 case 0x50: { II ii = bit_N_R<2,B>();
NEXT; }
1316 case 0x51: { II ii = bit_N_R<2,C>();
NEXT; }
1317 case 0x52: { II ii = bit_N_R<2,D>();
NEXT; }
1318 case 0x53: { II ii = bit_N_R<2,E>();
NEXT; }
1319 case 0x54: { II ii = bit_N_R<2,H>();
NEXT; }
1320 case 0x55: { II ii = bit_N_R<2,L>();
NEXT; }
1321 case 0x57: { II ii = bit_N_R<2,A>();
NEXT; }
1322 case 0x58: { II ii = bit_N_R<3,B>();
NEXT; }
1323 case 0x59: { II ii = bit_N_R<3,C>();
NEXT; }
1324 case 0x5a: { II ii = bit_N_R<3,D>();
NEXT; }
1325 case 0x5b: { II ii = bit_N_R<3,E>();
NEXT; }
1326 case 0x5c: { II ii = bit_N_R<3,H>();
NEXT; }
1327 case 0x5d: { II ii = bit_N_R<3,L>();
NEXT; }
1328 case 0x5f: { II ii = bit_N_R<3,A>();
NEXT; }
1329 case 0x60: { II ii = bit_N_R<4,B>();
NEXT; }
1330 case 0x61: { II ii = bit_N_R<4,C>();
NEXT; }
1331 case 0x62: { II ii = bit_N_R<4,D>();
NEXT; }
1332 case 0x63: { II ii = bit_N_R<4,E>();
NEXT; }
1333 case 0x64: { II ii = bit_N_R<4,H>();
NEXT; }
1334 case 0x65: { II ii = bit_N_R<4,L>();
NEXT; }
1335 case 0x67: { II ii = bit_N_R<4,A>();
NEXT; }
1336 case 0x68: { II ii = bit_N_R<5,B>();
NEXT; }
1337 case 0x69: { II ii = bit_N_R<5,C>();
NEXT; }
1338 case 0x6a: { II ii = bit_N_R<5,D>();
NEXT; }
1339 case 0x6b: { II ii = bit_N_R<5,E>();
NEXT; }
1340 case 0x6c: { II ii = bit_N_R<5,H>();
NEXT; }
1341 case 0x6d: { II ii = bit_N_R<5,L>();
NEXT; }
1342 case 0x6f: { II ii = bit_N_R<5,A>();
NEXT; }
1343 case 0x70: { II ii = bit_N_R<6,B>();
NEXT; }
1344 case 0x71: { II ii = bit_N_R<6,C>();
NEXT; }
1345 case 0x72: { II ii = bit_N_R<6,D>();
NEXT; }
1346 case 0x73: { II ii = bit_N_R<6,E>();
NEXT; }
1347 case 0x74: { II ii = bit_N_R<6,H>();
NEXT; }
1348 case 0x75: { II ii = bit_N_R<6,L>();
NEXT; }
1349 case 0x77: { II ii = bit_N_R<6,A>();
NEXT; }
1350 case 0x78: { II ii = bit_N_R<7,B>();
NEXT; }
1351 case 0x79: { II ii = bit_N_R<7,C>();
NEXT; }
1352 case 0x7a: { II ii = bit_N_R<7,D>();
NEXT; }
1353 case 0x7b: { II ii = bit_N_R<7,E>();
NEXT; }
1354 case 0x7c: { II ii = bit_N_R<7,H>();
NEXT; }
1355 case 0x7d: { II ii = bit_N_R<7,L>();
NEXT; }
1356 case 0x7f: { II ii = bit_N_R<7,A>();
NEXT; }
1357 case 0x46: { II ii = bit_N_xhl<0>();
NEXT; }
1358 case 0x4e: { II ii = bit_N_xhl<1>();
NEXT; }
1359 case 0x56: { II ii = bit_N_xhl<2>();
NEXT; }
1360 case 0x5e: { II ii = bit_N_xhl<3>();
NEXT; }
1361 case 0x66: { II ii = bit_N_xhl<4>();
NEXT; }
1362 case 0x6e: { II ii = bit_N_xhl<5>();
NEXT; }
1363 case 0x76: { II ii = bit_N_xhl<6>();
NEXT; }
1364 case 0x7e: { II ii = bit_N_xhl<7>();
NEXT; }
1366 case 0x80: { II ii = res_N_R<0,B>();
NEXT; }
1367 case 0x81: { II ii = res_N_R<0,C>();
NEXT; }
1368 case 0x82: { II ii = res_N_R<0,D>();
NEXT; }
1369 case 0x83: { II ii = res_N_R<0,E>();
NEXT; }
1370 case 0x84: { II ii = res_N_R<0,H>();
NEXT; }
1371 case 0x85: { II ii = res_N_R<0,L>();
NEXT; }
1372 case 0x87: { II ii = res_N_R<0,A>();
NEXT; }
1373 case 0x88: { II ii = res_N_R<1,B>();
NEXT; }
1374 case 0x89: { II ii = res_N_R<1,C>();
NEXT; }
1375 case 0x8a: { II ii = res_N_R<1,D>();
NEXT; }
1376 case 0x8b: { II ii = res_N_R<1,E>();
NEXT; }
1377 case 0x8c: { II ii = res_N_R<1,H>();
NEXT; }
1378 case 0x8d: { II ii = res_N_R<1,L>();
NEXT; }
1379 case 0x8f: { II ii = res_N_R<1,A>();
NEXT; }
1380 case 0x90: { II ii = res_N_R<2,B>();
NEXT; }
1381 case 0x91: { II ii = res_N_R<2,C>();
NEXT; }
1382 case 0x92: { II ii = res_N_R<2,D>();
NEXT; }
1383 case 0x93: { II ii = res_N_R<2,E>();
NEXT; }
1384 case 0x94: { II ii = res_N_R<2,H>();
NEXT; }
1385 case 0x95: { II ii = res_N_R<2,L>();
NEXT; }
1386 case 0x97: { II ii = res_N_R<2,A>();
NEXT; }
1387 case 0x98: { II ii = res_N_R<3,B>();
NEXT; }
1388 case 0x99: { II ii = res_N_R<3,C>();
NEXT; }
1389 case 0x9a: { II ii = res_N_R<3,D>();
NEXT; }
1390 case 0x9b: { II ii = res_N_R<3,E>();
NEXT; }
1391 case 0x9c: { II ii = res_N_R<3,H>();
NEXT; }
1392 case 0x9d: { II ii = res_N_R<3,L>();
NEXT; }
1393 case 0x9f: { II ii = res_N_R<3,A>();
NEXT; }
1394 case 0xa0: { II ii = res_N_R<4,B>();
NEXT; }
1395 case 0xa1: { II ii = res_N_R<4,C>();
NEXT; }
1396 case 0xa2: { II ii = res_N_R<4,D>();
NEXT; }
1397 case 0xa3: { II ii = res_N_R<4,E>();
NEXT; }
1398 case 0xa4: { II ii = res_N_R<4,H>();
NEXT; }
1399 case 0xa5: { II ii = res_N_R<4,L>();
NEXT; }
1400 case 0xa7: { II ii = res_N_R<4,A>();
NEXT; }
1401 case 0xa8: { II ii = res_N_R<5,B>();
NEXT; }
1402 case 0xa9: { II ii = res_N_R<5,C>();
NEXT; }
1403 case 0xaa: { II ii = res_N_R<5,D>();
NEXT; }
1404 case 0xab: { II ii = res_N_R<5,E>();
NEXT; }
1405 case 0xac: { II ii = res_N_R<5,H>();
NEXT; }
1406 case 0xad: { II ii = res_N_R<5,L>();
NEXT; }
1407 case 0xaf: { II ii = res_N_R<5,A>();
NEXT; }
1408 case 0xb0: { II ii = res_N_R<6,B>();
NEXT; }
1409 case 0xb1: { II ii = res_N_R<6,C>();
NEXT; }
1410 case 0xb2: { II ii = res_N_R<6,D>();
NEXT; }
1411 case 0xb3: { II ii = res_N_R<6,E>();
NEXT; }
1412 case 0xb4: { II ii = res_N_R<6,H>();
NEXT; }
1413 case 0xb5: { II ii = res_N_R<6,L>();
NEXT; }
1414 case 0xb7: { II ii = res_N_R<6,A>();
NEXT; }
1415 case 0xb8: { II ii = res_N_R<7,B>();
NEXT; }
1416 case 0xb9: { II ii = res_N_R<7,C>();
NEXT; }
1417 case 0xba: { II ii = res_N_R<7,D>();
NEXT; }
1418 case 0xbb: { II ii = res_N_R<7,E>();
NEXT; }
1419 case 0xbc: { II ii = res_N_R<7,H>();
NEXT; }
1420 case 0xbd: { II ii = res_N_R<7,L>();
NEXT; }
1421 case 0xbf: { II ii = res_N_R<7,A>();
NEXT; }
1422 case 0x86: { II ii = res_N_xhl<0>();
NEXT; }
1423 case 0x8e: { II ii = res_N_xhl<1>();
NEXT; }
1424 case 0x96: { II ii = res_N_xhl<2>();
NEXT; }
1425 case 0x9e: { II ii = res_N_xhl<3>();
NEXT; }
1426 case 0xa6: { II ii = res_N_xhl<4>();
NEXT; }
1427 case 0xae: { II ii = res_N_xhl<5>();
NEXT; }
1428 case 0xb6: { II ii = res_N_xhl<6>();
NEXT; }
1429 case 0xbe: { II ii = res_N_xhl<7>();
NEXT; }
1431 case 0xc0: { II ii = set_N_R<0,B>();
NEXT; }
1432 case 0xc1: { II ii = set_N_R<0,C>();
NEXT; }
1433 case 0xc2: { II ii = set_N_R<0,D>();
NEXT; }
1434 case 0xc3: { II ii = set_N_R<0,E>();
NEXT; }
1435 case 0xc4: { II ii = set_N_R<0,H>();
NEXT; }
1436 case 0xc5: { II ii = set_N_R<0,L>();
NEXT; }
1437 case 0xc7: { II ii = set_N_R<0,A>();
NEXT; }
1438 case 0xc8: { II ii = set_N_R<1,B>();
NEXT; }
1439 case 0xc9: { II ii = set_N_R<1,C>();
NEXT; }
1440 case 0xca: { II ii = set_N_R<1,D>();
NEXT; }
1441 case 0xcb: { II ii = set_N_R<1,E>();
NEXT; }
1442 case 0xcc: { II ii = set_N_R<1,H>();
NEXT; }
1443 case 0xcd: { II ii = set_N_R<1,L>();
NEXT; }
1444 case 0xcf: { II ii = set_N_R<1,A>();
NEXT; }
1445 case 0xd0: { II ii = set_N_R<2,B>();
NEXT; }
1446 case 0xd1: { II ii = set_N_R<2,C>();
NEXT; }
1447 case 0xd2: { II ii = set_N_R<2,D>();
NEXT; }
1448 case 0xd3: { II ii = set_N_R<2,E>();
NEXT; }
1449 case 0xd4: { II ii = set_N_R<2,H>();
NEXT; }
1450 case 0xd5: { II ii = set_N_R<2,L>();
NEXT; }
1451 case 0xd7: { II ii = set_N_R<2,A>();
NEXT; }
1452 case 0xd8: { II ii = set_N_R<3,B>();
NEXT; }
1453 case 0xd9: { II ii = set_N_R<3,C>();
NEXT; }
1454 case 0xda: { II ii = set_N_R<3,D>();
NEXT; }
1455 case 0xdb: { II ii = set_N_R<3,E>();
NEXT; }
1456 case 0xdc: { II ii = set_N_R<3,H>();
NEXT; }
1457 case 0xdd: { II ii = set_N_R<3,L>();
NEXT; }
1458 case 0xdf: { II ii = set_N_R<3,A>();
NEXT; }
1459 case 0xe0: { II ii = set_N_R<4,B>();
NEXT; }
1460 case 0xe1: { II ii = set_N_R<4,C>();
NEXT; }
1461 case 0xe2: { II ii = set_N_R<4,D>();
NEXT; }
1462 case 0xe3: { II ii = set_N_R<4,E>();
NEXT; }
1463 case 0xe4: { II ii = set_N_R<4,H>();
NEXT; }
1464 case 0xe5: { II ii = set_N_R<4,L>();
NEXT; }
1465 case 0xe7: { II ii = set_N_R<4,A>();
NEXT; }
1466 case 0xe8: { II ii = set_N_R<5,B>();
NEXT; }
1467 case 0xe9: { II ii = set_N_R<5,C>();
NEXT; }
1468 case 0xea: { II ii = set_N_R<5,D>();
NEXT; }
1469 case 0xeb: { II ii = set_N_R<5,E>();
NEXT; }
1470 case 0xec: { II ii = set_N_R<5,H>();
NEXT; }
1471 case 0xed: { II ii = set_N_R<5,L>();
NEXT; }
1472 case 0xef: { II ii = set_N_R<5,A>();
NEXT; }
1473 case 0xf0: { II ii = set_N_R<6,B>();
NEXT; }
1474 case 0xf1: { II ii = set_N_R<6,C>();
NEXT; }
1475 case 0xf2: { II ii = set_N_R<6,D>();
NEXT; }
1476 case 0xf3: { II ii = set_N_R<6,E>();
NEXT; }
1477 case 0xf4: { II ii = set_N_R<6,H>();
NEXT; }
1478 case 0xf5: { II ii = set_N_R<6,L>();
NEXT; }
1479 case 0xf7: { II ii = set_N_R<6,A>();
NEXT; }
1480 case 0xf8: { II ii = set_N_R<7,B>();
NEXT; }
1481 case 0xf9: { II ii = set_N_R<7,C>();
NEXT; }
1482 case 0xfa: { II ii = set_N_R<7,D>();
NEXT; }
1483 case 0xfb: { II ii = set_N_R<7,E>();
NEXT; }
1484 case 0xfc: { II ii = set_N_R<7,H>();
NEXT; }
1485 case 0xfd: { II ii = set_N_R<7,L>();
NEXT; }
1486 case 0xff: { II ii = set_N_R<7,A>();
NEXT; }
1487 case 0xc6: { II ii = set_N_xhl<0>();
NEXT; }
1488 case 0xce: { II ii = set_N_xhl<1>();
NEXT; }
1489 case 0xd6: { II ii = set_N_xhl<2>();
NEXT; }
1490 case 0xde: { II ii = set_N_xhl<3>();
NEXT; }
1491 case 0xe6: { II ii = set_N_xhl<4>();
NEXT; }
1492 case 0xee: { II ii = set_N_xhl<5>();
NEXT; }
1493 case 0xf6: { II ii = set_N_xhl<6>();
NEXT; }
1494 case 0xfe: { II ii = set_N_xhl<7>();
NEXT; }
1500 byte ed_opcode = RDMEM_OPCODE<0>(T::CC_PREFIX);
1502 switch (ed_opcode) {
1503 case 0x00:
case 0x01:
case 0x02:
case 0x03:
1504 case 0x04:
case 0x05:
case 0x06:
case 0x07:
1505 case 0x08:
case 0x09:
case 0x0a:
case 0x0b:
1506 case 0x0c:
case 0x0d:
case 0x0e:
case 0x0f:
1507 case 0x10:
case 0x11:
case 0x12:
case 0x13:
1508 case 0x14:
case 0x15:
case 0x16:
case 0x17:
1509 case 0x18:
case 0x19:
case 0x1a:
case 0x1b:
1510 case 0x1c:
case 0x1d:
case 0x1e:
case 0x1f:
1511 case 0x20:
case 0x21:
case 0x22:
case 0x23:
1512 case 0x24:
case 0x25:
case 0x26:
case 0x27:
1513 case 0x28:
case 0x29:
case 0x2a:
case 0x2b:
1514 case 0x2c:
case 0x2d:
case 0x2e:
case 0x2f:
1515 case 0x30:
case 0x31:
case 0x32:
case 0x33:
1516 case 0x34:
case 0x35:
case 0x36:
case 0x37:
1517 case 0x38:
case 0x39:
case 0x3a:
case 0x3b:
1518 case 0x3c:
case 0x3d:
case 0x3e:
case 0x3f:
1520 case 0x77:
case 0x7f:
1522 case 0x80:
case 0x81:
case 0x82:
case 0x83:
1523 case 0x84:
case 0x85:
case 0x86:
case 0x87:
1524 case 0x88:
case 0x89:
case 0x8a:
case 0x8b:
1525 case 0x8c:
case 0x8d:
case 0x8e:
case 0x8f:
1526 case 0x90:
case 0x91:
case 0x92:
case 0x93:
1527 case 0x94:
case 0x95:
case 0x96:
case 0x97:
1528 case 0x98:
case 0x99:
case 0x9a:
case 0x9b:
1529 case 0x9c:
case 0x9d:
case 0x9e:
case 0x9f:
1530 case 0xa4:
case 0xa5:
case 0xa6:
case 0xa7:
1531 case 0xac:
case 0xad:
case 0xae:
case 0xaf:
1532 case 0xb4:
case 0xb5:
case 0xb6:
case 0xb7:
1533 case 0xbc:
case 0xbd:
case 0xbe:
case 0xbf:
1535 case 0xc0:
case 0xc2:
1536 case 0xc4:
case 0xc5:
case 0xc6:
case 0xc7:
1537 case 0xc8:
case 0xca:
case 0xcb:
1538 case 0xcc:
case 0xcd:
case 0xce:
case 0xcf:
1539 case 0xd0:
case 0xd2:
case 0xd3:
1540 case 0xd4:
case 0xd5:
case 0xd6:
case 0xd7:
1541 case 0xd8:
case 0xda:
case 0xdb:
1542 case 0xdc:
case 0xdd:
case 0xde:
case 0xdf:
1543 case 0xe0:
case 0xe1:
case 0xe2:
case 0xe3:
1544 case 0xe4:
case 0xe5:
case 0xe6:
case 0xe7:
1545 case 0xe8:
case 0xe9:
case 0xea:
case 0xeb:
1546 case 0xec:
case 0xed:
case 0xee:
case 0xef:
1547 case 0xf0:
case 0xf1:
case 0xf2:
1548 case 0xf4:
case 0xf5:
case 0xf6:
case 0xf7:
1549 case 0xf8:
case 0xf9:
case 0xfa:
case 0xfb:
1550 case 0xfc:
case 0xfd:
case 0xfe:
case 0xff:
1551 { II ii = nop();
NEXT; }
1553 case 0x40: { II ii = in_R_c<B>();
NEXT; }
1554 case 0x48: { II ii = in_R_c<C>();
NEXT; }
1555 case 0x50: { II ii = in_R_c<D>();
NEXT; }
1556 case 0x58: { II ii = in_R_c<E>();
NEXT; }
1557 case 0x60: { II ii = in_R_c<H>();
NEXT; }
1558 case 0x68: { II ii = in_R_c<L>();
NEXT; }
1559 case 0x70: { II ii = in_R_c<DUMMY>();
NEXT; }
1560 case 0x78: { II ii = in_R_c<A>();
NEXT; }
1562 case 0x41: { II ii = out_c_R<B>();
NEXT; }
1563 case 0x49: { II ii = out_c_R<C>();
NEXT; }
1564 case 0x51: { II ii = out_c_R<D>();
NEXT; }
1565 case 0x59: { II ii = out_c_R<E>();
NEXT; }
1566 case 0x61: { II ii = out_c_R<H>();
NEXT; }
1567 case 0x69: { II ii = out_c_R<L>();
NEXT; }
1568 case 0x71: { II ii = out_c_0();
NEXT; }
1569 case 0x79: { II ii = out_c_R<A>();
NEXT; }
1571 case 0x42: { II ii = sbc_hl_SS<BC>();
NEXT; }
1572 case 0x52: { II ii = sbc_hl_SS<DE>();
NEXT; }
1573 case 0x62: { II ii = sbc_hl_hl ();
NEXT; }
1574 case 0x72: { II ii = sbc_hl_SS<SP>();
NEXT; }
1576 case 0x4a: { II ii = adc_hl_SS<BC>();
NEXT; }
1577 case 0x5a: { II ii = adc_hl_SS<DE>();
NEXT; }
1578 case 0x6a: { II ii = adc_hl_hl ();
NEXT; }
1579 case 0x7a: { II ii = adc_hl_SS<SP>();
NEXT; }
1581 case 0x43: { II ii = ld_xword_SS_ED<BC>();
NEXT; }
1582 case 0x53: { II ii = ld_xword_SS_ED<DE>();
NEXT; }
1583 case 0x63: { II ii = ld_xword_SS_ED<HL>();
NEXT; }
1584 case 0x73: { II ii = ld_xword_SS_ED<SP>();
NEXT; }
1586 case 0x4b: { II ii = ld_SS_xword_ED<BC>();
NEXT; }
1587 case 0x5b: { II ii = ld_SS_xword_ED<DE>();
NEXT; }
1588 case 0x6b: { II ii = ld_SS_xword_ED<HL>();
NEXT; }
1589 case 0x7b: { II ii = ld_SS_xword_ED<SP>();
NEXT; }
1591 case 0x47: { II ii = ld_i_a();
NEXT; }
1592 case 0x4f: { II ii = ld_r_a();
NEXT; }
1593 case 0x57: { II ii = ld_a_IR<REG_I>();
if (T::IS_R800) {
NEXT; }
else {
NEXT_STOP; }}
1594 case 0x5f: { II ii = ld_a_IR<REG_R>();
if (T::IS_R800) {
NEXT; }
else {
NEXT_STOP; }}
1596 case 0x67: { II ii = rrd();
NEXT; }
1597 case 0x6f: { II ii = rld();
NEXT; }
1599 case 0x45:
case 0x4d:
case 0x55:
case 0x5d:
1600 case 0x65:
case 0x6d:
case 0x75:
case 0x7d:
1602 case 0x46:
case 0x4e:
case 0x66:
case 0x6e:
1603 { II ii = im_N<0>();
NEXT; }
1604 case 0x56:
case 0x76:
1605 { II ii = im_N<1>();
NEXT; }
1606 case 0x5e:
case 0x7e:
1607 { II ii = im_N<2>();
NEXT; }
1608 case 0x44:
case 0x4c:
case 0x54:
case 0x5c:
1609 case 0x64:
case 0x6c:
case 0x74:
case 0x7c:
1610 { II ii = neg();
NEXT; }
1612 case 0xa0: { II ii = ldi();
NEXT; }
1613 case 0xa1: { II ii = cpi();
NEXT; }
1614 case 0xa2: { II ii = ini();
NEXT; }
1615 case 0xa3: { II ii = outi();
NEXT; }
1616 case 0xa8: { II ii = ldd();
NEXT; }
1617 case 0xa9: { II ii = cpd();
NEXT; }
1618 case 0xaa: { II ii = ind();
NEXT; }
1619 case 0xab: { II ii = outd();
NEXT; }
1620 case 0xb0: { II ii = ldir();
NEXT; }
1621 case 0xb1: { II ii = cpir();
NEXT; }
1622 case 0xb2: { II ii = inir();
NEXT; }
1623 case 0xb3: { II ii = otir();
NEXT; }
1624 case 0xb8: { II ii = lddr();
NEXT; }
1625 case 0xb9: { II ii = cpdr();
NEXT; }
1626 case 0xba: { II ii = indr();
NEXT; }
1627 case 0xbb: { II ii = otdr();
NEXT; }
1629 case 0xc1: { II ii = T::IS_R800 ? mulub_a_R<B>() : nop();
NEXT; }
1630 case 0xc9: { II ii = T::IS_R800 ? mulub_a_R<C>() : nop();
NEXT; }
1631 case 0xd1: { II ii = T::IS_R800 ? mulub_a_R<D>() : nop();
NEXT; }
1632 case 0xd9: { II ii = T::IS_R800 ? mulub_a_R<E>() : nop();
NEXT; }
1633 case 0xc3: { II ii = T::IS_R800 ? muluw_hl_SS<BC>() : nop();
NEXT; }
1634 case 0xf3: { II ii = T::IS_R800 ? muluw_hl_SS<SP>() : nop();
NEXT; }
1641 byte opcodeDD = RDMEM_OPCODE<0>(T::CC_DD + T::CC_MAIN);
1817 if constexpr (T::IS_R800) {
1818 II ii = nop<T::CC_DD>();
NEXT;
1821 #ifdef USE_COMPUTED_GOTO
1822 goto *(opcodeTable[opcodeDD]);
1824 opcodeMain = opcodeDD;
1829 case 0x09: { II ii = add_SS_TT<IX,BC,T::CC_DD>();
NEXT; }
1830 case 0x19: { II ii = add_SS_TT<IX,DE,T::CC_DD>();
NEXT; }
1831 case 0x29: { II ii = add_SS_SS<IX ,T::CC_DD>();
NEXT; }
1832 case 0x39: { II ii = add_SS_TT<IX,SP,T::CC_DD>();
NEXT; }
1833 case 0x21: { II ii = ld_SS_word<IX,T::CC_DD>();
NEXT; }
1834 case 0x22: { II ii = ld_xword_SS<IX,T::CC_DD>();
NEXT; }
1835 case 0x2a: { II ii = ld_SS_xword<IX,T::CC_DD>();
NEXT; }
1836 case 0x23: { II ii = inc_SS<IX,T::CC_DD>();
NEXT; }
1837 case 0x2b: { II ii = dec_SS<IX,T::CC_DD>();
NEXT; }
1838 case 0x24: { II ii = inc_R<IXH,T::CC_DD>();
NEXT; }
1839 case 0x2c: { II ii = inc_R<IXL,T::CC_DD>();
NEXT; }
1840 case 0x25: { II ii = dec_R<IXH,T::CC_DD>();
NEXT; }
1841 case 0x2d: { II ii = dec_R<IXL,T::CC_DD>();
NEXT; }
1842 case 0x26: { II ii = ld_R_byte<IXH,T::CC_DD>();
NEXT; }
1843 case 0x2e: { II ii = ld_R_byte<IXL,T::CC_DD>();
NEXT; }
1844 case 0x34: { II ii = inc_xix<IX>();
NEXT; }
1845 case 0x35: { II ii = dec_xix<IX>();
NEXT; }
1846 case 0x36: { II ii = ld_xix_byte<IX>();
NEXT; }
1848 case 0x44: { II ii = ld_R_R<B,IXH,T::CC_DD>();
NEXT; }
1849 case 0x45: { II ii = ld_R_R<B,IXL,T::CC_DD>();
NEXT; }
1850 case 0x4c: { II ii = ld_R_R<C,IXH,T::CC_DD>();
NEXT; }
1851 case 0x4d: { II ii = ld_R_R<C,IXL,T::CC_DD>();
NEXT; }
1852 case 0x54: { II ii = ld_R_R<D,IXH,T::CC_DD>();
NEXT; }
1853 case 0x55: { II ii = ld_R_R<D,IXL,T::CC_DD>();
NEXT; }
1854 case 0x5c: { II ii = ld_R_R<E,IXH,T::CC_DD>();
NEXT; }
1855 case 0x5d: { II ii = ld_R_R<E,IXL,T::CC_DD>();
NEXT; }
1856 case 0x7c: { II ii = ld_R_R<A,IXH,T::CC_DD>();
NEXT; }
1857 case 0x7d: { II ii = ld_R_R<A,IXL,T::CC_DD>();
NEXT; }
1858 case 0x60: { II ii = ld_R_R<IXH,B,T::CC_DD>();
NEXT; }
1859 case 0x61: { II ii = ld_R_R<IXH,C,T::CC_DD>();
NEXT; }
1860 case 0x62: { II ii = ld_R_R<IXH,D,T::CC_DD>();
NEXT; }
1861 case 0x63: { II ii = ld_R_R<IXH,E,T::CC_DD>();
NEXT; }
1862 case 0x65: { II ii = ld_R_R<IXH,IXL,T::CC_DD>();
NEXT; }
1863 case 0x67: { II ii = ld_R_R<IXH,A,T::CC_DD>();
NEXT; }
1864 case 0x68: { II ii = ld_R_R<IXL,B,T::CC_DD>();
NEXT; }
1865 case 0x69: { II ii = ld_R_R<IXL,C,T::CC_DD>();
NEXT; }
1866 case 0x6a: { II ii = ld_R_R<IXL,D,T::CC_DD>();
NEXT; }
1867 case 0x6b: { II ii = ld_R_R<IXL,E,T::CC_DD>();
NEXT; }
1868 case 0x6c: { II ii = ld_R_R<IXL,IXH,T::CC_DD>();
NEXT; }
1869 case 0x6f: { II ii = ld_R_R<IXL,A,T::CC_DD>();
NEXT; }
1870 case 0x70: { II ii = ld_xix_R<IX,B>();
NEXT; }
1871 case 0x71: { II ii = ld_xix_R<IX,C>();
NEXT; }
1872 case 0x72: { II ii = ld_xix_R<IX,D>();
NEXT; }
1873 case 0x73: { II ii = ld_xix_R<IX,E>();
NEXT; }
1874 case 0x74: { II ii = ld_xix_R<IX,H>();
NEXT; }
1875 case 0x75: { II ii = ld_xix_R<IX,L>();
NEXT; }
1876 case 0x77: { II ii = ld_xix_R<IX,A>();
NEXT; }
1877 case 0x46: { II ii = ld_R_xix<B,IX>();
NEXT; }
1878 case 0x4e: { II ii = ld_R_xix<C,IX>();
NEXT; }
1879 case 0x56: { II ii = ld_R_xix<D,IX>();
NEXT; }
1880 case 0x5e: { II ii = ld_R_xix<E,IX>();
NEXT; }
1881 case 0x66: { II ii = ld_R_xix<H,IX>();
NEXT; }
1882 case 0x6e: { II ii = ld_R_xix<L,IX>();
NEXT; }
1883 case 0x7e: { II ii = ld_R_xix<A,IX>();
NEXT; }
1885 case 0x84: { II ii = add_a_R<IXH,T::CC_DD>();
NEXT; }
1886 case 0x85: { II ii = add_a_R<IXL,T::CC_DD>();
NEXT; }
1887 case 0x86: { II ii = add_a_xix<IX>();
NEXT; }
1888 case 0x8c: { II ii = adc_a_R<IXH,T::CC_DD>();
NEXT; }
1889 case 0x8d: { II ii = adc_a_R<IXL,T::CC_DD>();
NEXT; }
1890 case 0x8e: { II ii = adc_a_xix<IX>();
NEXT; }
1891 case 0x94: { II ii = sub_R<IXH,T::CC_DD>();
NEXT; }
1892 case 0x95: { II ii = sub_R<IXL,T::CC_DD>();
NEXT; }
1893 case 0x96: { II ii = sub_xix<IX>();
NEXT; }
1894 case 0x9c: { II ii = sbc_a_R<IXH,T::CC_DD>();
NEXT; }
1895 case 0x9d: { II ii = sbc_a_R<IXL,T::CC_DD>();
NEXT; }
1896 case 0x9e: { II ii = sbc_a_xix<IX>();
NEXT; }
1897 case 0xa4: { II ii = and_R<IXH,T::CC_DD>();
NEXT; }
1898 case 0xa5: { II ii = and_R<IXL,T::CC_DD>();
NEXT; }
1899 case 0xa6: { II ii = and_xix<IX>();
NEXT; }
1900 case 0xac: { II ii = xor_R<IXH,T::CC_DD>();
NEXT; }
1901 case 0xad: { II ii = xor_R<IXL,T::CC_DD>();
NEXT; }
1902 case 0xae: { II ii = xor_xix<IX>();
NEXT; }
1903 case 0xb4: { II ii = or_R<IXH,T::CC_DD>();
NEXT; }
1904 case 0xb5: { II ii = or_R<IXL,T::CC_DD>();
NEXT; }
1905 case 0xb6: { II ii = or_xix<IX>();
NEXT; }
1906 case 0xbc: { II ii = cp_R<IXH,T::CC_DD>();
NEXT; }
1907 case 0xbd: { II ii = cp_R<IXL,T::CC_DD>();
NEXT; }
1908 case 0xbe: { II ii = cp_xix<IX>();
NEXT; }
1910 case 0xe1: { II ii = pop_SS <IX,T::CC_DD>();
NEXT; }
1911 case 0xe5: { II ii = push_SS<IX,T::CC_DD>();
NEXT; }
1912 case 0xe3: { II ii = ex_xsp_SS<IX,T::CC_DD>();
NEXT; }
1913 case 0xe9: { II ii = jp_SS<IX,T::CC_DD>();
NEXT; }
1914 case 0xf9: { II ii = ld_sp_SS<IX,T::CC_DD>();
NEXT; }
1915 case 0xcb: ixy = getIX();
goto xx_cb;
1917 if constexpr (T::IS_R800) {
1918 II ii = nop<T::CC_DD>();
NEXT;
1920 T::add(T::CC_DD);
goto opDD_2;
1923 if constexpr (T::IS_R800) {
1924 II ii = nop<T::CC_DD>();
NEXT;
1926 T::add(T::CC_DD);
goto opFD_2;
1934 byte opcodeFD = RDMEM_OPCODE<0>(T::CC_DD + T::CC_MAIN);
2110 if constexpr (T::IS_R800) {
2111 II ii = nop<T::CC_DD>();
NEXT;
2114 #ifdef USE_COMPUTED_GOTO
2115 goto *(opcodeTable[opcodeFD]);
2117 opcodeMain = opcodeFD;
2122 case 0x09: { II ii = add_SS_TT<IY,BC,T::CC_DD>();
NEXT; }
2123 case 0x19: { II ii = add_SS_TT<IY,DE,T::CC_DD>();
NEXT; }
2124 case 0x29: { II ii = add_SS_SS<IY ,T::CC_DD>();
NEXT; }
2125 case 0x39: { II ii = add_SS_TT<IY,SP,T::CC_DD>();
NEXT; }
2126 case 0x21: { II ii = ld_SS_word<IY,T::CC_DD>();
NEXT; }
2127 case 0x22: { II ii = ld_xword_SS<IY,T::CC_DD>();
NEXT; }
2128 case 0x2a: { II ii = ld_SS_xword<IY,T::CC_DD>();
NEXT; }
2129 case 0x23: { II ii = inc_SS<IY,T::CC_DD>();
NEXT; }
2130 case 0x2b: { II ii = dec_SS<IY,T::CC_DD>();
NEXT; }
2131 case 0x24: { II ii = inc_R<IYH,T::CC_DD>();
NEXT; }
2132 case 0x2c: { II ii = inc_R<IYL,T::CC_DD>();
NEXT; }
2133 case 0x25: { II ii = dec_R<IYH,T::CC_DD>();
NEXT; }
2134 case 0x2d: { II ii = dec_R<IYL,T::CC_DD>();
NEXT; }
2135 case 0x26: { II ii = ld_R_byte<IYH,T::CC_DD>();
NEXT; }
2136 case 0x2e: { II ii = ld_R_byte<IYL,T::CC_DD>();
NEXT; }
2137 case 0x34: { II ii = inc_xix<IY>();
NEXT; }
2138 case 0x35: { II ii = dec_xix<IY>();
NEXT; }
2139 case 0x36: { II ii = ld_xix_byte<IY>();
NEXT; }
2141 case 0x44: { II ii = ld_R_R<B,IYH,T::CC_DD>();
NEXT; }
2142 case 0x45: { II ii = ld_R_R<B,IYL,T::CC_DD>();
NEXT; }
2143 case 0x4c: { II ii = ld_R_R<C,IYH,T::CC_DD>();
NEXT; }
2144 case 0x4d: { II ii = ld_R_R<C,IYL,T::CC_DD>();
NEXT; }
2145 case 0x54: { II ii = ld_R_R<D,IYH,T::CC_DD>();
NEXT; }
2146 case 0x55: { II ii = ld_R_R<D,IYL,T::CC_DD>();
NEXT; }
2147 case 0x5c: { II ii = ld_R_R<E,IYH,T::CC_DD>();
NEXT; }
2148 case 0x5d: { II ii = ld_R_R<E,IYL,T::CC_DD>();
NEXT; }
2149 case 0x7c: { II ii = ld_R_R<A,IYH,T::CC_DD>();
NEXT; }
2150 case 0x7d: { II ii = ld_R_R<A,IYL,T::CC_DD>();
NEXT; }
2151 case 0x60: { II ii = ld_R_R<IYH,B,T::CC_DD>();
NEXT; }
2152 case 0x61: { II ii = ld_R_R<IYH,C,T::CC_DD>();
NEXT; }
2153 case 0x62: { II ii = ld_R_R<IYH,D,T::CC_DD>();
NEXT; }
2154 case 0x63: { II ii = ld_R_R<IYH,E,T::CC_DD>();
NEXT; }
2155 case 0x65: { II ii = ld_R_R<IYH,IYL,T::CC_DD>();
NEXT; }
2156 case 0x67: { II ii = ld_R_R<IYH,A,T::CC_DD>();
NEXT; }
2157 case 0x68: { II ii = ld_R_R<IYL,B,T::CC_DD>();
NEXT; }
2158 case 0x69: { II ii = ld_R_R<IYL,C,T::CC_DD>();
NEXT; }
2159 case 0x6a: { II ii = ld_R_R<IYL,D,T::CC_DD>();
NEXT; }
2160 case 0x6b: { II ii = ld_R_R<IYL,E,T::CC_DD>();
NEXT; }
2161 case 0x6c: { II ii = ld_R_R<IYL,IYH,T::CC_DD>();
NEXT; }
2162 case 0x6f: { II ii = ld_R_R<IYL,A,T::CC_DD>();
NEXT; }
2163 case 0x70: { II ii = ld_xix_R<IY,B>();
NEXT; }
2164 case 0x71: { II ii = ld_xix_R<IY,C>();
NEXT; }
2165 case 0x72: { II ii = ld_xix_R<IY,D>();
NEXT; }
2166 case 0x73: { II ii = ld_xix_R<IY,E>();
NEXT; }
2167 case 0x74: { II ii = ld_xix_R<IY,H>();
NEXT; }
2168 case 0x75: { II ii = ld_xix_R<IY,L>();
NEXT; }
2169 case 0x77: { II ii = ld_xix_R<IY,A>();
NEXT; }
2170 case 0x46: { II ii = ld_R_xix<B,IY>();
NEXT; }
2171 case 0x4e: { II ii = ld_R_xix<C,IY>();
NEXT; }
2172 case 0x56: { II ii = ld_R_xix<D,IY>();
NEXT; }
2173 case 0x5e: { II ii = ld_R_xix<E,IY>();
NEXT; }
2174 case 0x66: { II ii = ld_R_xix<H,IY>();
NEXT; }
2175 case 0x6e: { II ii = ld_R_xix<L,IY>();
NEXT; }
2176 case 0x7e: { II ii = ld_R_xix<A,IY>();
NEXT; }
2178 case 0x84: { II ii = add_a_R<IYH,T::CC_DD>();
NEXT; }
2179 case 0x85: { II ii = add_a_R<IYL,T::CC_DD>();
NEXT; }
2180 case 0x86: { II ii = add_a_xix<IY>();
NEXT; }
2181 case 0x8c: { II ii = adc_a_R<IYH,T::CC_DD>();
NEXT; }
2182 case 0x8d: { II ii = adc_a_R<IYL,T::CC_DD>();
NEXT; }
2183 case 0x8e: { II ii = adc_a_xix<IY>();
NEXT; }
2184 case 0x94: { II ii = sub_R<IYH,T::CC_DD>();
NEXT; }
2185 case 0x95: { II ii = sub_R<IYL,T::CC_DD>();
NEXT; }
2186 case 0x96: { II ii = sub_xix<IY>();
NEXT; }
2187 case 0x9c: { II ii = sbc_a_R<IYH,T::CC_DD>();
NEXT; }
2188 case 0x9d: { II ii = sbc_a_R<IYL,T::CC_DD>();
NEXT; }
2189 case 0x9e: { II ii = sbc_a_xix<IY>();
NEXT; }
2190 case 0xa4: { II ii = and_R<IYH,T::CC_DD>();
NEXT; }
2191 case 0xa5: { II ii = and_R<IYL,T::CC_DD>();
NEXT; }
2192 case 0xa6: { II ii = and_xix<IY>();
NEXT; }
2193 case 0xac: { II ii = xor_R<IYH,T::CC_DD>();
NEXT; }
2194 case 0xad: { II ii = xor_R<IYL,T::CC_DD>();
NEXT; }
2195 case 0xae: { II ii = xor_xix<IY>();
NEXT; }
2196 case 0xb4: { II ii = or_R<IYH,T::CC_DD>();
NEXT; }
2197 case 0xb5: { II ii = or_R<IYL,T::CC_DD>();
NEXT; }
2198 case 0xb6: { II ii = or_xix<IY>();
NEXT; }
2199 case 0xbc: { II ii = cp_R<IYH,T::CC_DD>();
NEXT; }
2200 case 0xbd: { II ii = cp_R<IYL,T::CC_DD>();
NEXT; }
2201 case 0xbe: { II ii = cp_xix<IY>();
NEXT; }
2203 case 0xe1: { II ii = pop_SS <IY,T::CC_DD>();
NEXT; }
2204 case 0xe5: { II ii = push_SS<IY,T::CC_DD>();
NEXT; }
2205 case 0xe3: { II ii = ex_xsp_SS<IY,T::CC_DD>();
NEXT; }
2206 case 0xe9: { II ii = jp_SS<IY,T::CC_DD>();
NEXT; }
2207 case 0xf9: { II ii = ld_sp_SS<IY,T::CC_DD>();
NEXT; }
2208 case 0xcb: ixy = getIY();
goto xx_cb;
2210 if constexpr (T::IS_R800) {
2211 II ii = nop<T::CC_DD>();
NEXT;
2213 T::add(T::CC_DD);
goto opDD_2;
2216 if constexpr (T::IS_R800) {
2217 II ii = nop<T::CC_DD>();
NEXT;
2219 T::add(T::CC_DD);
goto opFD_2;
2224#ifndef USE_COMPUTED_GOTO
2230 unsigned tmp = RD_WORD_PC<1>(T::CC_DD + T::CC_DD_CB);
2231 auto ofst = narrow_cast<int8_t>(tmp & 0xFF);
2232 unsigned addr = narrow_cast<word>(ixy + ofst);
2233 auto xxcb_opcode = narrow_cast<byte>(tmp >> 8);
2234 switch (xxcb_opcode) {
2235 case 0x00: { II ii = rlc_xix_R<B>(addr);
NEXT; }
2236 case 0x01: { II ii = rlc_xix_R<C>(addr);
NEXT; }
2237 case 0x02: { II ii = rlc_xix_R<D>(addr);
NEXT; }
2238 case 0x03: { II ii = rlc_xix_R<E>(addr);
NEXT; }
2239 case 0x04: { II ii = rlc_xix_R<H>(addr);
NEXT; }
2240 case 0x05: { II ii = rlc_xix_R<L>(addr);
NEXT; }
2241 case 0x06: { II ii = rlc_xix_R<DUMMY>(addr);
NEXT; }
2242 case 0x07: { II ii = rlc_xix_R<A>(addr);
NEXT; }
2243 case 0x08: { II ii = rrc_xix_R<B>(addr);
NEXT; }
2244 case 0x09: { II ii = rrc_xix_R<C>(addr);
NEXT; }
2245 case 0x0a: { II ii = rrc_xix_R<D>(addr);
NEXT; }
2246 case 0x0b: { II ii = rrc_xix_R<E>(addr);
NEXT; }
2247 case 0x0c: { II ii = rrc_xix_R<H>(addr);
NEXT; }
2248 case 0x0d: { II ii = rrc_xix_R<L>(addr);
NEXT; }
2249 case 0x0e: { II ii = rrc_xix_R<DUMMY>(addr);
NEXT; }
2250 case 0x0f: { II ii = rrc_xix_R<A>(addr);
NEXT; }
2251 case 0x10: { II ii = rl_xix_R<B>(addr);
NEXT; }
2252 case 0x11: { II ii = rl_xix_R<C>(addr);
NEXT; }
2253 case 0x12: { II ii = rl_xix_R<D>(addr);
NEXT; }
2254 case 0x13: { II ii = rl_xix_R<E>(addr);
NEXT; }
2255 case 0x14: { II ii = rl_xix_R<H>(addr);
NEXT; }
2256 case 0x15: { II ii = rl_xix_R<L>(addr);
NEXT; }
2257 case 0x16: { II ii = rl_xix_R<DUMMY>(addr);
NEXT; }
2258 case 0x17: { II ii = rl_xix_R<A>(addr);
NEXT; }
2259 case 0x18: { II ii = rr_xix_R<B>(addr);
NEXT; }
2260 case 0x19: { II ii = rr_xix_R<C>(addr);
NEXT; }
2261 case 0x1a: { II ii = rr_xix_R<D>(addr);
NEXT; }
2262 case 0x1b: { II ii = rr_xix_R<E>(addr);
NEXT; }
2263 case 0x1c: { II ii = rr_xix_R<H>(addr);
NEXT; }
2264 case 0x1d: { II ii = rr_xix_R<L>(addr);
NEXT; }
2265 case 0x1e: { II ii = rr_xix_R<DUMMY>(addr);
NEXT; }
2266 case 0x1f: { II ii = rr_xix_R<A>(addr);
NEXT; }
2267 case 0x20: { II ii = sla_xix_R<B>(addr);
NEXT; }
2268 case 0x21: { II ii = sla_xix_R<C>(addr);
NEXT; }
2269 case 0x22: { II ii = sla_xix_R<D>(addr);
NEXT; }
2270 case 0x23: { II ii = sla_xix_R<E>(addr);
NEXT; }
2271 case 0x24: { II ii = sla_xix_R<H>(addr);
NEXT; }
2272 case 0x25: { II ii = sla_xix_R<L>(addr);
NEXT; }
2273 case 0x26: { II ii = sla_xix_R<DUMMY>(addr);
NEXT; }
2274 case 0x27: { II ii = sla_xix_R<A>(addr);
NEXT; }
2275 case 0x28: { II ii = sra_xix_R<B>(addr);
NEXT; }
2276 case 0x29: { II ii = sra_xix_R<C>(addr);
NEXT; }
2277 case 0x2a: { II ii = sra_xix_R<D>(addr);
NEXT; }
2278 case 0x2b: { II ii = sra_xix_R<E>(addr);
NEXT; }
2279 case 0x2c: { II ii = sra_xix_R<H>(addr);
NEXT; }
2280 case 0x2d: { II ii = sra_xix_R<L>(addr);
NEXT; }
2281 case 0x2e: { II ii = sra_xix_R<DUMMY>(addr);
NEXT; }
2282 case 0x2f: { II ii = sra_xix_R<A>(addr);
NEXT; }
2283 case 0x30: { II ii = T::IS_R800 ? sll2() : sll_xix_R<
B>(addr);
NEXT; }
2284 case 0x31: { II ii = T::IS_R800 ? sll2() : sll_xix_R<
C>(addr);
NEXT; }
2285 case 0x32: { II ii = T::IS_R800 ? sll2() : sll_xix_R<
D>(addr);
NEXT; }
2286 case 0x33: { II ii = T::IS_R800 ? sll2() : sll_xix_R<
E>(addr);
NEXT; }
2287 case 0x34: { II ii = T::IS_R800 ? sll2() : sll_xix_R<
H>(addr);
NEXT; }
2288 case 0x35: { II ii = T::IS_R800 ? sll2() : sll_xix_R<
L>(addr);
NEXT; }
2289 case 0x36: { II ii = T::IS_R800 ? sll2() : sll_xix_R<
DUMMY>(addr);
NEXT; }
2290 case 0x37: { II ii = T::IS_R800 ? sll2() : sll_xix_R<
A>(addr);
NEXT; }
2291 case 0x38: { II ii = srl_xix_R<B>(addr);
NEXT; }
2292 case 0x39: { II ii = srl_xix_R<C>(addr);
NEXT; }
2293 case 0x3a: { II ii = srl_xix_R<D>(addr);
NEXT; }
2294 case 0x3b: { II ii = srl_xix_R<E>(addr);
NEXT; }
2295 case 0x3c: { II ii = srl_xix_R<H>(addr);
NEXT; }
2296 case 0x3d: { II ii = srl_xix_R<L>(addr);
NEXT; }
2297 case 0x3e: { II ii = srl_xix_R<DUMMY>(addr);
NEXT; }
2298 case 0x3f: { II ii = srl_xix_R<A>(addr);
NEXT; }
2300 case 0x40:
case 0x41:
case 0x42:
case 0x43:
2301 case 0x44:
case 0x45:
case 0x46:
case 0x47:
2302 { II ii = bit_N_xix<0>(addr);
NEXT; }
2303 case 0x48:
case 0x49:
case 0x4a:
case 0x4b:
2304 case 0x4c:
case 0x4d:
case 0x4e:
case 0x4f:
2305 { II ii = bit_N_xix<1>(addr);
NEXT; }
2306 case 0x50:
case 0x51:
case 0x52:
case 0x53:
2307 case 0x54:
case 0x55:
case 0x56:
case 0x57:
2308 { II ii = bit_N_xix<2>(addr);
NEXT; }
2309 case 0x58:
case 0x59:
case 0x5a:
case 0x5b:
2310 case 0x5c:
case 0x5d:
case 0x5e:
case 0x5f:
2311 { II ii = bit_N_xix<3>(addr);
NEXT; }
2312 case 0x60:
case 0x61:
case 0x62:
case 0x63:
2313 case 0x64:
case 0x65:
case 0x66:
case 0x67:
2314 { II ii = bit_N_xix<4>(addr);
NEXT; }
2315 case 0x68:
case 0x69:
case 0x6a:
case 0x6b:
2316 case 0x6c:
case 0x6d:
case 0x6e:
case 0x6f:
2317 { II ii = bit_N_xix<5>(addr);
NEXT; }
2318 case 0x70:
case 0x71:
case 0x72:
case 0x73:
2319 case 0x74:
case 0x75:
case 0x76:
case 0x77:
2320 { II ii = bit_N_xix<6>(addr);
NEXT; }
2321 case 0x78:
case 0x79:
case 0x7a:
case 0x7b:
2322 case 0x7c:
case 0x7d:
case 0x7e:
case 0x7f:
2323 { II ii = bit_N_xix<7>(addr);
NEXT; }
2325 case 0x80: { II ii = res_N_xix_R<0,B>(addr);
NEXT; }
2326 case 0x81: { II ii = res_N_xix_R<0,C>(addr);
NEXT; }
2327 case 0x82: { II ii = res_N_xix_R<0,D>(addr);
NEXT; }
2328 case 0x83: { II ii = res_N_xix_R<0,E>(addr);
NEXT; }
2329 case 0x84: { II ii = res_N_xix_R<0,H>(addr);
NEXT; }
2330 case 0x85: { II ii = res_N_xix_R<0,L>(addr);
NEXT; }
2331 case 0x87: { II ii = res_N_xix_R<0,A>(addr);
NEXT; }
2332 case 0x88: { II ii = res_N_xix_R<1,B>(addr);
NEXT; }
2333 case 0x89: { II ii = res_N_xix_R<1,C>(addr);
NEXT; }
2334 case 0x8a: { II ii = res_N_xix_R<1,D>(addr);
NEXT; }
2335 case 0x8b: { II ii = res_N_xix_R<1,E>(addr);
NEXT; }
2336 case 0x8c: { II ii = res_N_xix_R<1,H>(addr);
NEXT; }
2337 case 0x8d: { II ii = res_N_xix_R<1,L>(addr);
NEXT; }
2338 case 0x8f: { II ii = res_N_xix_R<1,A>(addr);
NEXT; }
2339 case 0x90: { II ii = res_N_xix_R<2,B>(addr);
NEXT; }
2340 case 0x91: { II ii = res_N_xix_R<2,C>(addr);
NEXT; }
2341 case 0x92: { II ii = res_N_xix_R<2,D>(addr);
NEXT; }
2342 case 0x93: { II ii = res_N_xix_R<2,E>(addr);
NEXT; }
2343 case 0x94: { II ii = res_N_xix_R<2,H>(addr);
NEXT; }
2344 case 0x95: { II ii = res_N_xix_R<2,L>(addr);
NEXT; }
2345 case 0x97: { II ii = res_N_xix_R<2,A>(addr);
NEXT; }
2346 case 0x98: { II ii = res_N_xix_R<3,B>(addr);
NEXT; }
2347 case 0x99: { II ii = res_N_xix_R<3,C>(addr);
NEXT; }
2348 case 0x9a: { II ii = res_N_xix_R<3,D>(addr);
NEXT; }
2349 case 0x9b: { II ii = res_N_xix_R<3,E>(addr);
NEXT; }
2350 case 0x9c: { II ii = res_N_xix_R<3,H>(addr);
NEXT; }
2351 case 0x9d: { II ii = res_N_xix_R<3,L>(addr);
NEXT; }
2352 case 0x9f: { II ii = res_N_xix_R<3,A>(addr);
NEXT; }
2353 case 0xa0: { II ii = res_N_xix_R<4,B>(addr);
NEXT; }
2354 case 0xa1: { II ii = res_N_xix_R<4,C>(addr);
NEXT; }
2355 case 0xa2: { II ii = res_N_xix_R<4,D>(addr);
NEXT; }
2356 case 0xa3: { II ii = res_N_xix_R<4,E>(addr);
NEXT; }
2357 case 0xa4: { II ii = res_N_xix_R<4,H>(addr);
NEXT; }
2358 case 0xa5: { II ii = res_N_xix_R<4,L>(addr);
NEXT; }
2359 case 0xa7: { II ii = res_N_xix_R<4,A>(addr);
NEXT; }
2360 case 0xa8: { II ii = res_N_xix_R<5,B>(addr);
NEXT; }
2361 case 0xa9: { II ii = res_N_xix_R<5,C>(addr);
NEXT; }
2362 case 0xaa: { II ii = res_N_xix_R<5,D>(addr);
NEXT; }
2363 case 0xab: { II ii = res_N_xix_R<5,E>(addr);
NEXT; }
2364 case 0xac: { II ii = res_N_xix_R<5,H>(addr);
NEXT; }
2365 case 0xad: { II ii = res_N_xix_R<5,L>(addr);
NEXT; }
2366 case 0xaf: { II ii = res_N_xix_R<5,A>(addr);
NEXT; }
2367 case 0xb0: { II ii = res_N_xix_R<6,B>(addr);
NEXT; }
2368 case 0xb1: { II ii = res_N_xix_R<6,C>(addr);
NEXT; }
2369 case 0xb2: { II ii = res_N_xix_R<6,D>(addr);
NEXT; }
2370 case 0xb3: { II ii = res_N_xix_R<6,E>(addr);
NEXT; }
2371 case 0xb4: { II ii = res_N_xix_R<6,H>(addr);
NEXT; }
2372 case 0xb5: { II ii = res_N_xix_R<6,L>(addr);
NEXT; }
2373 case 0xb7: { II ii = res_N_xix_R<6,A>(addr);
NEXT; }
2374 case 0xb8: { II ii = res_N_xix_R<7,B>(addr);
NEXT; }
2375 case 0xb9: { II ii = res_N_xix_R<7,C>(addr);
NEXT; }
2376 case 0xba: { II ii = res_N_xix_R<7,D>(addr);
NEXT; }
2377 case 0xbb: { II ii = res_N_xix_R<7,E>(addr);
NEXT; }
2378 case 0xbc: { II ii = res_N_xix_R<7,H>(addr);
NEXT; }
2379 case 0xbd: { II ii = res_N_xix_R<7,L>(addr);
NEXT; }
2380 case 0xbf: { II ii = res_N_xix_R<7,A>(addr);
NEXT; }
2381 case 0x86: { II ii = res_N_xix_R<0,DUMMY>(addr);
NEXT; }
2382 case 0x8e: { II ii = res_N_xix_R<1,DUMMY>(addr);
NEXT; }
2383 case 0x96: { II ii = res_N_xix_R<2,DUMMY>(addr);
NEXT; }
2384 case 0x9e: { II ii = res_N_xix_R<3,DUMMY>(addr);
NEXT; }
2385 case 0xa6: { II ii = res_N_xix_R<4,DUMMY>(addr);
NEXT; }
2386 case 0xae: { II ii = res_N_xix_R<5,DUMMY>(addr);
NEXT; }
2387 case 0xb6: { II ii = res_N_xix_R<6,DUMMY>(addr);
NEXT; }
2388 case 0xbe: { II ii = res_N_xix_R<7,DUMMY>(addr);
NEXT; }
2390 case 0xc0: { II ii = set_N_xix_R<0,B>(addr);
NEXT; }
2391 case 0xc1: { II ii = set_N_xix_R<0,C>(addr);
NEXT; }
2392 case 0xc2: { II ii = set_N_xix_R<0,D>(addr);
NEXT; }
2393 case 0xc3: { II ii = set_N_xix_R<0,E>(addr);
NEXT; }
2394 case 0xc4: { II ii = set_N_xix_R<0,H>(addr);
NEXT; }
2395 case 0xc5: { II ii = set_N_xix_R<0,L>(addr);
NEXT; }
2396 case 0xc7: { II ii = set_N_xix_R<0,A>(addr);
NEXT; }
2397 case 0xc8: { II ii = set_N_xix_R<1,B>(addr);
NEXT; }
2398 case 0xc9: { II ii = set_N_xix_R<1,C>(addr);
NEXT; }
2399 case 0xca: { II ii = set_N_xix_R<1,D>(addr);
NEXT; }
2400 case 0xcb: { II ii = set_N_xix_R<1,E>(addr);
NEXT; }
2401 case 0xcc: { II ii = set_N_xix_R<1,H>(addr);
NEXT; }
2402 case 0xcd: { II ii = set_N_xix_R<1,L>(addr);
NEXT; }
2403 case 0xcf: { II ii = set_N_xix_R<1,A>(addr);
NEXT; }
2404 case 0xd0: { II ii = set_N_xix_R<2,B>(addr);
NEXT; }
2405 case 0xd1: { II ii = set_N_xix_R<2,C>(addr);
NEXT; }
2406 case 0xd2: { II ii = set_N_xix_R<2,D>(addr);
NEXT; }
2407 case 0xd3: { II ii = set_N_xix_R<2,E>(addr);
NEXT; }
2408 case 0xd4: { II ii = set_N_xix_R<2,H>(addr);
NEXT; }
2409 case 0xd5: { II ii = set_N_xix_R<2,L>(addr);
NEXT; }
2410 case 0xd7: { II ii = set_N_xix_R<2,A>(addr);
NEXT; }
2411 case 0xd8: { II ii = set_N_xix_R<3,B>(addr);
NEXT; }
2412 case 0xd9: { II ii = set_N_xix_R<3,C>(addr);
NEXT; }
2413 case 0xda: { II ii = set_N_xix_R<3,D>(addr);
NEXT; }
2414 case 0xdb: { II ii = set_N_xix_R<3,E>(addr);
NEXT; }
2415 case 0xdc: { II ii = set_N_xix_R<3,H>(addr);
NEXT; }
2416 case 0xdd: { II ii = set_N_xix_R<3,L>(addr);
NEXT; }
2417 case 0xdf: { II ii = set_N_xix_R<3,A>(addr);
NEXT; }
2418 case 0xe0: { II ii = set_N_xix_R<4,B>(addr);
NEXT; }
2419 case 0xe1: { II ii = set_N_xix_R<4,C>(addr);
NEXT; }
2420 case 0xe2: { II ii = set_N_xix_R<4,D>(addr);
NEXT; }
2421 case 0xe3: { II ii = set_N_xix_R<4,E>(addr);
NEXT; }
2422 case 0xe4: { II ii = set_N_xix_R<4,H>(addr);
NEXT; }
2423 case 0xe5: { II ii = set_N_xix_R<4,L>(addr);
NEXT; }
2424 case 0xe7: { II ii = set_N_xix_R<4,A>(addr);
NEXT; }
2425 case 0xe8: { II ii = set_N_xix_R<5,B>(addr);
NEXT; }
2426 case 0xe9: { II ii = set_N_xix_R<5,C>(addr);
NEXT; }
2427 case 0xea: { II ii = set_N_xix_R<5,D>(addr);
NEXT; }
2428 case 0xeb: { II ii = set_N_xix_R<5,E>(addr);
NEXT; }
2429 case 0xec: { II ii = set_N_xix_R<5,H>(addr);
NEXT; }
2430 case 0xed: { II ii = set_N_xix_R<5,L>(addr);
NEXT; }
2431 case 0xef: { II ii = set_N_xix_R<5,A>(addr);
NEXT; }
2432 case 0xf0: { II ii = set_N_xix_R<6,B>(addr);
NEXT; }
2433 case 0xf1: { II ii = set_N_xix_R<6,C>(addr);
NEXT; }
2434 case 0xf2: { II ii = set_N_xix_R<6,D>(addr);
NEXT; }
2435 case 0xf3: { II ii = set_N_xix_R<6,E>(addr);
NEXT; }
2436 case 0xf4: { II ii = set_N_xix_R<6,H>(addr);
NEXT; }
2437 case 0xf5: { II ii = set_N_xix_R<6,L>(addr);
NEXT; }
2438 case 0xf7: { II ii = set_N_xix_R<6,A>(addr);
NEXT; }
2439 case 0xf8: { II ii = set_N_xix_R<7,B>(addr);
NEXT; }
2440 case 0xf9: { II ii = set_N_xix_R<7,C>(addr);
NEXT; }
2441 case 0xfa: { II ii = set_N_xix_R<7,D>(addr);
NEXT; }
2442 case 0xfb: { II ii = set_N_xix_R<7,E>(addr);
NEXT; }
2443 case 0xfc: { II ii = set_N_xix_R<7,H>(addr);
NEXT; }
2444 case 0xfd: { II ii = set_N_xix_R<7,L>(addr);
NEXT; }
2445 case 0xff: { II ii = set_N_xix_R<7,A>(addr);
NEXT; }
2446 case 0xc6: { II ii = set_N_xix_R<0,DUMMY>(addr);
NEXT; }
2447 case 0xce: { II ii = set_N_xix_R<1,DUMMY>(addr);
NEXT; }
2448 case 0xd6: { II ii = set_N_xix_R<2,DUMMY>(addr);
NEXT; }
2449 case 0xde: { II ii = set_N_xix_R<3,DUMMY>(addr);
NEXT; }
2450 case 0xe6: { II ii = set_N_xix_R<4,DUMMY>(addr);
NEXT; }
2451 case 0xee: { II ii = set_N_xix_R<5,DUMMY>(addr);
NEXT; }
2452 case 0xf6: { II ii = set_N_xix_R<6,DUMMY>(addr);
NEXT; }
2453 case 0xfe: { II ii = set_N_xix_R<7,DUMMY>(addr);
NEXT; }
2459template<
typename T>
inline void CPUCore<T>::cpuTracePre()
2463template<
typename T>
inline void CPUCore<T>::cpuTracePost()
2465 if (tracingEnabled) [[unlikely]] {
2466 cpuTracePost_slow();
2469template<
typename T>
void CPUCore<T>::cpuTracePost_slow()
2471 std::array<byte, 4> opBuf;
2472 std::string dasmOutput;
2473 dasm(*interface, start_pc, opBuf, dasmOutput, T::getTimeFast());
2474 dasmOutput.resize(19,
' ');
2475 std::cout << strCat(hex_string<4>(start_pc),
2477 " AF=", hex_string<4>(getAF()),
2478 " BC=", hex_string<4>(getBC()),
2479 " DE=", hex_string<4>(getDE()),
2480 " HL=", hex_string<4>(getHL()),
2481 " IX=", hex_string<4>(getIX()),
2482 " IY=", hex_string<4>(getIY()),
2483 " SP=", hex_string<4>(getSP()),
2488template<
typename T>
ExecIRQ CPUCore<T>::getExecIRQ()
const
2491 if (IRQStatus && getIFF1() && !prevWasEI()) [[unlikely]]
return ExecIRQ::IRQ;
2495template<
typename T>
void CPUCore<T>::executeSlow(
ExecIRQ execIRQ)
2502 if (prevWasLDAI()) [[unlikely]] {
2520 assert(getF() & V_FLAG);
2521 setF(getF() & ~V_FLAG);
2534 }
else if (getHALT()) [[unlikely]] {
2536 incR(narrow_cast<byte>(T::advanceHalt(T::HALT_STATES, scheduler.getNext())));
2537 setSlowInstructions();
2540 assert(T::limitReached());
2541 executeInstructions();
2544 if constexpr (T::IS_R800) {
2545 if ((prev2WasCall()) && (!prevWasPopRet())) [[unlikely]] {
2567 assert(fastForward || !interface->isBreaked());
2569 interface->setFastForward(
true);
2571 execute2(fastForward);
2572 interface->setFastForward(
false);
2581 scheduler.schedule(T::getTime());
2582 setSlowInstructions();
2588 (!interface->anyBreakPoints() && !tracingEnabled)) {
2591 if (slowInstructions) {
2593 executeSlow(getExecIRQ());
2594 scheduler.schedule(T::getTimeFast());
2596 while (slowInstructions == 0) {
2598 if (!T::limitReached()) [[likely]] {
2600 executeInstructions();
2605 scheduler.schedule(T::getTimeFast());
2606 if (needExitCPULoop())
return;
2609 }
while (!needExitCPULoop());
2612 if (slowInstructions == 0) {
2614 assert(T::limitReached());
2615 executeInstructions();
2620 executeSlow(getExecIRQ());
2625 scheduler.schedule(T::getTime());
2658 auto execIRQ = getExecIRQ();
2660 interface->checkBreakPoints(getPC())) {
2661 assert(interface->isBreaked());
2664 }
while (!needExitCPULoop());
2669 if constexpr (R8 ==
A) {
return getA(); }
2670 else if constexpr (R8 ==
F) {
return getF(); }
2671 else if constexpr (R8 ==
B) {
return getB(); }
2672 else if constexpr (R8 ==
C) {
return getC(); }
2673 else if constexpr (R8 ==
D) {
return getD(); }
2674 else if constexpr (R8 ==
E) {
return getE(); }
2675 else if constexpr (R8 ==
H) {
return getH(); }
2676 else if constexpr (R8 ==
L) {
return getL(); }
2677 else if constexpr (R8 ==
IXH) {
return getIXh(); }
2678 else if constexpr (R8 ==
IXL) {
return getIXl(); }
2679 else if constexpr (R8 ==
IYH) {
return getIYh(); }
2680 else if constexpr (R8 ==
IYL) {
return getIYl(); }
2681 else if constexpr (R8 ==
REG_I) {
return getI(); }
2682 else if constexpr (R8 ==
REG_R) {
return getR(); }
2683 else if constexpr (R8 ==
DUMMY) {
return 0; }
2687 if constexpr (R16 ==
AF) {
return getAF(); }
2688 else if constexpr (R16 ==
BC) {
return getBC(); }
2689 else if constexpr (R16 ==
DE) {
return getDE(); }
2690 else if constexpr (R16 ==
HL) {
return getHL(); }
2691 else if constexpr (R16 ==
IX) {
return getIX(); }
2692 else if constexpr (R16 ==
IY) {
return getIY(); }
2693 else if constexpr (R16 ==
SP) {
return getSP(); }
2697 if constexpr (R8 ==
A) { setA(x); }
2698 else if constexpr (R8 ==
F) { setF(x); }
2699 else if constexpr (R8 ==
B) { setB(x); }
2700 else if constexpr (R8 ==
C) { setC(x); }
2701 else if constexpr (R8 ==
D) { setD(x); }
2702 else if constexpr (R8 ==
E) { setE(x); }
2703 else if constexpr (R8 ==
H) { setH(x); }
2704 else if constexpr (R8 ==
L) { setL(x); }
2705 else if constexpr (R8 ==
IXH) { setIXh(x); }
2706 else if constexpr (R8 ==
IXL) { setIXl(x); }
2707 else if constexpr (R8 ==
IYH) { setIYh(x); }
2708 else if constexpr (R8 ==
IYL) { setIYl(x); }
2709 else if constexpr (R8 ==
REG_I) { setI(x); }
2710 else if constexpr (R8 ==
REG_R) { setR(x); }
2711 else if constexpr (R8 ==
DUMMY) { }
2715 if constexpr (R16 ==
AF) { setAF(x); }
2716 else if constexpr (R16 ==
BC) { setBC(x); }
2717 else if constexpr (R16 ==
DE) { setDE(x); }
2718 else if constexpr (R16 ==
HL) { setHL(x); }
2719 else if constexpr (R16 ==
IX) { setIX(x); }
2720 else if constexpr (R16 ==
IY) { setIY(x); }
2721 else if constexpr (R16 ==
SP) { setSP(x); }
2727 set8<DST>(get8<SRC>());
return {1, T::CC_LD_R_R + EE};
2731template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::ld_sp_SS() {
2732 setSP(get16<REG>());
return {1, T::CC_LD_SP_HL + EE};
2736template<
typename T>
template<Reg16 REG> II CPUCore<T>::ld_SS_a() {
2737 T::setMemPtr((getA() << 8) | ((get16<REG>() + 1) & 0xFF));
2738 WRMEM(get16<REG>(), getA(), T::CC_LD_SS_A_1);
2739 return {1, T::CC_LD_SS_A};
2743template<
typename T>
template<Reg8 SRC> II CPUCore<T>::ld_xhl_R() {
2744 WRMEM(getHL(), get8<SRC>(), T::CC_LD_HL_R_1);
2745 return {1, T::CC_LD_HL_R};
2749template<
typename T>
template<Reg16 IXY, Reg8 SRC> II CPUCore<T>::ld_xix_R() {
2750 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_LD_XIX_R_1);
2751 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
2753 WRMEM(addr, get8<SRC>(), T::CC_DD + T::CC_LD_XIX_R_2);
2754 return {2, T::CC_DD + T::CC_LD_XIX_R};
2758template<
typename T> II CPUCore<T>::ld_xhl_byte() {
2759 byte val = RDMEM_OPCODE<1>(T::CC_LD_HL_N_1);
2760 WRMEM(getHL(), val, T::CC_LD_HL_N_2);
2761 return {2, T::CC_LD_HL_N};
2765template<
typename T>
template<Reg16 IXY> II CPUCore<T>::ld_xix_byte() {
2766 unsigned tmp = RD_WORD_PC<1>(T::CC_DD + T::CC_LD_XIX_N_1);
2767 auto ofst = narrow_cast<int8_t>(tmp & 0xFF);
2768 auto val = narrow_cast<byte>(tmp >> 8);
2769 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
2771 WRMEM(addr, val, T::CC_DD + T::CC_LD_XIX_N_2);
2772 return {3, T::CC_DD + T::CC_LD_XIX_N};
2776template<
typename T> II CPUCore<T>::ld_xbyte_a() {
2777 unsigned x = RD_WORD_PC<1>(T::CC_LD_NN_A_1);
2778 T::setMemPtr((getA() << 8) | ((x + 1) & 0xFF));
2779 WRMEM(x, getA(), T::CC_LD_NN_A_2);
2780 return {3, T::CC_LD_NN_A};
2784template<
typename T>
template<
int EE>
inline II CPUCore<T>::WR_NN_Y(
word reg) {
2785 unsigned addr = RD_WORD_PC<1>(T::CC_LD_XX_HL_1 + EE);
2786 T::setMemPtr(addr + 1);
2787 WR_WORD(addr, reg, T::CC_LD_XX_HL_2 + EE);
2788 return {3, T::CC_LD_XX_HL + EE};
2790template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::ld_xword_SS() {
2791 return WR_NN_Y<EE >(get16<REG>());
2793template<
typename T>
template<Reg16 REG> II CPUCore<T>::ld_xword_SS_ED() {
2794 return WR_NN_Y<T::EE_ED>(get16<REG>());
2798template<
typename T>
template<Reg16 REG> II CPUCore<T>::ld_a_SS() {
2799 T::setMemPtr(get16<REG>() + 1);
2800 setA(RDMEM(get16<REG>(), T::CC_LD_A_SS_1));
2801 return {1, T::CC_LD_A_SS};
2805template<
typename T> II CPUCore<T>::ld_a_xbyte() {
2806 unsigned addr = RD_WORD_PC<1>(T::CC_LD_A_NN_1);
2807 T::setMemPtr(addr + 1);
2808 setA(RDMEM(addr, T::CC_LD_A_NN_2));
2809 return {3, T::CC_LD_A_NN};
2813template<
typename T>
template<Reg8 DST,
int EE> II CPUCore<T>::ld_R_byte() {
2814 set8<DST>(RDMEM_OPCODE<1>(T::CC_LD_R_N_1 + EE));
return {2, T::CC_LD_R_N + EE};
2818template<
typename T>
template<Reg8 DST> II CPUCore<T>::ld_R_xhl() {
2819 set8<DST>(RDMEM(getHL(), T::CC_LD_R_HL_1));
return {1, T::CC_LD_R_HL};
2823template<
typename T>
template<Reg8 DST, Reg16 IXY> II CPUCore<T>::ld_R_xix() {
2824 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_LD_R_XIX_1);
2825 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
2827 set8<DST>(RDMEM(addr, T::CC_DD + T::CC_LD_R_XIX_2));
2828 return {2, T::CC_DD + T::CC_LD_R_XIX};
2832template<
typename T>
template<
int EE>
inline word CPUCore<T>::RD_P_XX() {
2833 unsigned addr = RD_WORD_PC<1>(T::CC_LD_HL_XX_1 + EE);
2834 T::setMemPtr(addr + 1);
2835 return RD_WORD(addr, T::CC_LD_HL_XX_2 + EE);
2837template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::ld_SS_xword() {
2838 set16<REG>(RD_P_XX<EE>());
return {3, T::CC_LD_HL_XX + EE};
2840template<
typename T>
template<Reg16 REG> II CPUCore<T>::ld_SS_xword_ED() {
2841 set16<REG>(RD_P_XX<T::EE_ED>());
return {3, T::CC_LD_HL_XX + T::EE_ED};
2845template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::ld_SS_word() {
2846 set16<REG>(RD_WORD_PC<1>(T::CC_LD_SS_NN_1 + EE));
return {3, T::CC_LD_SS_NN + EE};
2851template<
typename T>
inline void CPUCore<T>::ADC(
byte reg) {
2852 unsigned res = getA() + reg + ((getF() & C_FLAG) ? 1 : 0);
2853 byte f = ((res & 0x100) ? C_FLAG : 0) |
2854 ((getA() ^ res ^ reg) & H_FLAG) |
2855 (((getA() ^ res) & (reg ^ res) & 0x80) >> 5) |
2857 if constexpr (T::IS_R800) {
2858 f |= table.
ZS[res & 0xFF];
2859 f |=
byte(getF() & (X_FLAG | Y_FLAG));
2861 f |= table.
ZSXY[res & 0xFF];
2864 setA(narrow_cast<byte>(res));
2866template<
typename T>
inline II CPUCore<T>::adc_a_a() {
2867 unsigned res = 2 * getA() + ((getF() & C_FLAG) ? 1 : 0);
2868 byte f = ((res & 0x100) ? C_FLAG : 0) |
2870 (((getA() ^ res) & 0x80) >> 5) |
2872 if constexpr (T::IS_R800) {
2873 f |= table.
ZS[res & 0xFF];
2874 f |=
byte(getF() & (X_FLAG | Y_FLAG));
2876 f |= table.
ZSXY[res & 0xFF];
2879 setA(narrow_cast<byte>(res));
2880 return {1, T::CC_CP_R};
2882template<
typename T>
template<Reg8 SRC,
int EE> II CPUCore<T>::adc_a_R() {
2883 ADC(get8<SRC>());
return {1, T::CC_CP_R + EE};
2885template<
typename T> II CPUCore<T>::adc_a_byte() {
2886 ADC(RDMEM_OPCODE<1>(T::CC_CP_N_1));
return {2, T::CC_CP_N};
2888template<
typename T> II CPUCore<T>::adc_a_xhl() {
2889 ADC(RDMEM(getHL(), T::CC_CP_XHL_1));
return {1, T::CC_CP_XHL};
2891template<
typename T>
template<Reg16 IXY> II CPUCore<T>::adc_a_xix() {
2892 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_CP_XIX_1);
2893 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
2895 ADC(RDMEM(addr, T::CC_DD + T::CC_CP_XIX_2));
2896 return {2, T::CC_DD + T::CC_CP_XIX};
2900template<
typename T>
inline void CPUCore<T>::ADD(
byte reg) {
2901 unsigned res = getA() + reg;
2902 byte f = ((res & 0x100) ? C_FLAG : 0) |
2903 ((getA() ^ res ^ reg) & H_FLAG) |
2904 (((getA() ^ res) & (reg ^ res) & 0x80) >> 5) |
2906 if constexpr (T::IS_R800) {
2907 f |= table.
ZS[res & 0xFF];
2908 f |=
byte(getF() & (X_FLAG | Y_FLAG));
2910 f |= table.
ZSXY[res & 0xFF];
2913 setA(narrow_cast<byte>(res));
2915template<
typename T>
inline II CPUCore<T>::add_a_a() {
2916 unsigned res = 2 * getA();
2917 byte f = ((res & 0x100) ? C_FLAG : 0) |
2919 (((getA() ^ res) & 0x80) >> 5) |
2921 if constexpr (T::IS_R800) {
2922 f |= table.
ZS[res & 0xFF];
2923 f |=
byte(getF() & (X_FLAG | Y_FLAG));
2925 f |= table.
ZSXY[res & 0xFF];
2928 setA(narrow_cast<byte>(res));
2929 return {1, T::CC_CP_R};
2931template<
typename T>
template<Reg8 SRC,
int EE> II CPUCore<T>::add_a_R() {
2932 ADD(get8<SRC>());
return {1, T::CC_CP_R + EE};
2934template<
typename T> II CPUCore<T>::add_a_byte() {
2935 ADD(RDMEM_OPCODE<1>(T::CC_CP_N_1));
return {2, T::CC_CP_N};
2937template<
typename T> II CPUCore<T>::add_a_xhl() {
2938 ADD(RDMEM(getHL(), T::CC_CP_XHL_1));
return {1, T::CC_CP_XHL};
2940template<
typename T>
template<Reg16 IXY> II CPUCore<T>::add_a_xix() {
2941 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_CP_XIX_1);
2942 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
2944 ADD(RDMEM(addr, T::CC_DD + T::CC_CP_XIX_2));
2945 return {2, T::CC_DD + T::CC_CP_XIX};
2949template<
typename T>
inline void CPUCore<T>::AND(
byte reg) {
2952 if constexpr (T::IS_R800) {
2953 f |= table.
ZSPH[getA()];
2954 f |=
byte(getF() & (X_FLAG | Y_FLAG));
2956 f |= table.
ZSPXY[getA()];
2961template<
typename T> II CPUCore<T>::and_a() {
2963 if constexpr (T::IS_R800) {
2964 f |= table.
ZSPH[getA()];
2965 f |=
byte(getF() & (X_FLAG | Y_FLAG));
2967 f |= table.
ZSPXY[getA()];
2971 return {1, T::CC_CP_R};
2973template<
typename T>
template<Reg8 SRC,
int EE> II CPUCore<T>::and_R() {
2974 AND(get8<SRC>());
return {1, T::CC_CP_R + EE};
2976template<
typename T> II CPUCore<T>::and_byte() {
2977 AND(RDMEM_OPCODE<1>(T::CC_CP_N_1));
return {2, T::CC_CP_N};
2979template<
typename T> II CPUCore<T>::and_xhl() {
2980 AND(RDMEM(getHL(), T::CC_CP_XHL_1));
return {1, T::CC_CP_XHL};
2982template<
typename T>
template<Reg16 IXY> II CPUCore<T>::and_xix() {
2983 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_CP_XIX_1);
2984 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
2986 AND(RDMEM(addr, T::CC_DD + T::CC_CP_XIX_2));
2987 return {2, T::CC_DD + T::CC_CP_XIX};
2991template<
typename T>
inline void CPUCore<T>::CP(
byte reg) {
2992 unsigned q = getA() - reg;
2993 byte f = table.
ZS[q & 0xFF] |
2994 ((q & 0x100) ? C_FLAG : 0) |
2996 ((getA() ^
byte(q) ^ reg) & H_FLAG) |
2997 (((reg ^ getA()) & (getA() ^
byte(q)) & 0x80) >> 5);
2998 if constexpr (T::IS_R800) {
2999 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3001 f |=
byte(reg & (X_FLAG | Y_FLAG));
3005template<
typename T> II CPUCore<T>::cp_a() {
3006 byte f = ZS0 | N_FLAG;
3007 if constexpr (T::IS_R800) {
3008 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3010 f |=
byte(getA() & (X_FLAG | Y_FLAG));
3013 return {1, T::CC_CP_R};
3015template<
typename T>
template<Reg8 SRC,
int EE> II CPUCore<T>::cp_R() {
3016 CP(get8<SRC>());
return {1, T::CC_CP_R + EE};
3018template<
typename T> II CPUCore<T>::cp_byte() {
3019 CP(RDMEM_OPCODE<1>(T::CC_CP_N_1));
return {2, T::CC_CP_N};
3021template<
typename T> II CPUCore<T>::cp_xhl() {
3022 CP(RDMEM(getHL(), T::CC_CP_XHL_1));
return {1, T::CC_CP_XHL};
3024template<
typename T>
template<Reg16 IXY> II CPUCore<T>::cp_xix() {
3025 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_CP_XIX_1);
3026 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
3028 CP(RDMEM(addr, T::CC_DD + T::CC_CP_XIX_2));
3029 return {2, T::CC_DD + T::CC_CP_XIX};
3033template<
typename T>
inline void CPUCore<T>::OR(
byte reg) {
3036 if constexpr (T::IS_R800) {
3037 f |= table.
ZSP[getA()];
3038 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3040 f |= table.
ZSPXY[getA()];
3044template<
typename T> II CPUCore<T>::or_a() {
3046 if constexpr (T::IS_R800) {
3047 f |= table.
ZSP[getA()];
3048 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3050 f |= table.
ZSPXY[getA()];
3053 return {1, T::CC_CP_R};
3055template<
typename T>
template<Reg8 SRC,
int EE> II CPUCore<T>::or_R() {
3056 OR(get8<SRC>());
return {1, T::CC_CP_R + EE};
3058template<
typename T> II CPUCore<T>::or_byte() {
3059 OR(RDMEM_OPCODE<1>(T::CC_CP_N_1));
return {2, T::CC_CP_N};
3061template<
typename T> II CPUCore<T>::or_xhl() {
3062 OR(RDMEM(getHL(), T::CC_CP_XHL_1));
return {1, T::CC_CP_XHL};
3064template<
typename T>
template<Reg16 IXY> II CPUCore<T>::or_xix() {
3065 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_CP_XIX_1);
3066 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
3068 OR(RDMEM(addr, T::CC_DD + T::CC_CP_XIX_2));
3069 return {2, T::CC_DD + T::CC_CP_XIX};
3073template<
typename T>
inline void CPUCore<T>::SBC(
byte reg) {
3074 unsigned res = getA() - reg - ((getF() & C_FLAG) ? 1 : 0);
3075 byte f = ((res & 0x100) ? C_FLAG : 0) |
3077 ((getA() ^ res ^ reg) & H_FLAG) |
3078 (((reg ^ getA()) & (getA() ^ res) & 0x80) >> 5);
3079 if constexpr (T::IS_R800) {
3080 f |= table.
ZS[res & 0xFF];
3081 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3083 f |= table.
ZSXY[res & 0xFF];
3086 setA(narrow_cast<byte>(res));
3088template<
typename T> II CPUCore<T>::sbc_a_a() {
3089 if constexpr (T::IS_R800) {
3090 word t = (getF() & C_FLAG)
3091 ? (255 * 256 | ZS255 | C_FLAG | H_FLAG | N_FLAG)
3092 : ( 0 * 256 | ZS0 | N_FLAG);
3093 setAF(
t | (getF() & (X_FLAG | Y_FLAG)));
3095 setAF((getF() & C_FLAG) ?
3096 (255 * 256 | ZSXY255 | C_FLAG | H_FLAG | N_FLAG) :
3097 ( 0 * 256 | ZSXY0 | N_FLAG));
3099 return {1, T::CC_CP_R};
3101template<
typename T>
template<Reg8 SRC,
int EE> II CPUCore<T>::sbc_a_R() {
3102 SBC(get8<SRC>());
return {1, T::CC_CP_R + EE};
3104template<
typename T> II CPUCore<T>::sbc_a_byte() {
3105 SBC(RDMEM_OPCODE<1>(T::CC_CP_N_1));
return {2, T::CC_CP_N};
3107template<
typename T> II CPUCore<T>::sbc_a_xhl() {
3108 SBC(RDMEM(getHL(), T::CC_CP_XHL_1));
return {1, T::CC_CP_XHL};
3110template<
typename T>
template<Reg16 IXY> II CPUCore<T>::sbc_a_xix() {
3111 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_CP_XIX_1);
3112 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
3114 SBC(RDMEM(addr, T::CC_DD + T::CC_CP_XIX_2));
3115 return {2, T::CC_DD + T::CC_CP_XIX};
3119template<
typename T>
inline void CPUCore<T>::SUB(
byte reg) {
3120 unsigned res = getA() - reg;
3121 byte f = ((res & 0x100) ? C_FLAG : 0) |
3123 ((getA() ^ res ^ reg) & H_FLAG) |
3124 (((reg ^ getA()) & (getA() ^ res) & 0x80) >> 5);
3125 if constexpr (T::IS_R800) {
3126 f |= table.
ZS[res & 0xFF];
3127 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3129 f |= table.
ZSXY[res & 0xFF];
3132 setA(narrow_cast<byte>(res));
3134template<
typename T> II CPUCore<T>::sub_a() {
3135 if constexpr (T::IS_R800) {
3136 word t = 0 * 256 | ZS0 | N_FLAG;
3137 setAF(
t | (getF() & (X_FLAG | Y_FLAG)));
3139 setAF(0 * 256 | ZSXY0 | N_FLAG);
3141 return {1, T::CC_CP_R};
3143template<
typename T>
template<Reg8 SRC,
int EE> II CPUCore<T>::sub_R() {
3144 SUB(get8<SRC>());
return {1, T::CC_CP_R + EE};
3146template<
typename T> II CPUCore<T>::sub_byte() {
3147 SUB(RDMEM_OPCODE<1>(T::CC_CP_N_1));
return {2, T::CC_CP_N};
3149template<
typename T> II CPUCore<T>::sub_xhl() {
3150 SUB(RDMEM(getHL(), T::CC_CP_XHL_1));
return {1, T::CC_CP_XHL};
3152template<
typename T>
template<Reg16 IXY> II CPUCore<T>::sub_xix() {
3153 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_CP_XIX_1);
3154 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
3156 SUB(RDMEM(addr, T::CC_DD + T::CC_CP_XIX_2));
3157 return {2, T::CC_DD + T::CC_CP_XIX};
3161template<
typename T>
inline void CPUCore<T>::XOR(
byte reg) {
3164 if constexpr (T::IS_R800) {
3165 f |= table.
ZSP[getA()];
3166 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3168 f |= table.
ZSPXY[getA()];
3172template<
typename T> II CPUCore<T>::xor_a() {
3173 if constexpr (T::IS_R800) {
3174 word t = 0 * 256 + ZSP0;
3175 setAF(
t | (getF() & (X_FLAG | Y_FLAG)));
3177 setAF(0 * 256 + ZSPXY0);
3179 return {1, T::CC_CP_R};
3181template<
typename T>
template<Reg8 SRC,
int EE> II CPUCore<T>::xor_R() {
3182 XOR(get8<SRC>());
return {1, T::CC_CP_R + EE};
3184template<
typename T> II CPUCore<T>::xor_byte() {
3185 XOR(RDMEM_OPCODE<1>(T::CC_CP_N_1));
return {2, T::CC_CP_N};
3187template<
typename T> II CPUCore<T>::xor_xhl() {
3188 XOR(RDMEM(getHL(), T::CC_CP_XHL_1));
return {1, T::CC_CP_XHL};
3190template<
typename T>
template<Reg16 IXY> II CPUCore<T>::xor_xix() {
3191 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_CP_XIX_1);
3192 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
3194 XOR(RDMEM(addr, T::CC_DD + T::CC_CP_XIX_2));
3195 return {2, T::CC_DD + T::CC_CP_XIX};
3200template<
typename T>
inline byte CPUCore<T>::DEC(
byte reg) {
3202 byte f = ((reg & ~res & 0x80) >> 5) |
3203 (((res & 0x0F) + 1) & H_FLAG) |
3205 if constexpr (T::IS_R800) {
3206 f |=
byte(getF() & (C_FLAG | X_FLAG | Y_FLAG));
3209 f |=
byte(getF() & C_FLAG);
3210 f |= table.
ZSXY[res];
3215template<
typename T>
template<Reg8 REG,
int EE> II CPUCore<T>::dec_R() {
3216 set8<REG>(DEC(get8<REG>()));
return {1, T::CC_INC_R + EE};
3218template<
typename T>
template<
int EE>
inline void CPUCore<T>::DEC_X(
unsigned x) {
3219 byte val = DEC(RDMEM(x, T::CC_INC_XHL_1 + EE));
3220 WRMEM(x, val, T::CC_INC_XHL_2 + EE);
3222template<
typename T> II CPUCore<T>::dec_xhl() {
3224 return {1, T::CC_INC_XHL};
3226template<
typename T>
template<Reg16 IXY> II CPUCore<T>::dec_xix() {
3227 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_INC_XIX_1);
3228 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
3230 DEC_X<T::CC_DD + T::EE_INC_XIX>(addr);
3231 return {2, T::CC_INC_XHL + T::CC_DD + T::EE_INC_XIX};
3235template<
typename T>
inline byte CPUCore<T>::INC(
byte reg) {
3237 byte f = ((reg & -reg & 0x80) >> 5) |
3238 (((reg & 0x0F) - 1) & H_FLAG) |
3240 if constexpr (T::IS_R800) {
3241 f |=
byte(getF() & (C_FLAG | X_FLAG | Y_FLAG));
3244 f |=
byte(getF() & C_FLAG);
3245 f |= table.
ZSXY[reg];
3250template<
typename T>
template<Reg8 REG,
int EE> II CPUCore<T>::inc_R() {
3251 set8<REG>(INC(get8<REG>()));
return {1, T::CC_INC_R + EE};
3253template<
typename T>
template<
int EE>
inline void CPUCore<T>::INC_X(
unsigned x) {
3254 byte val = INC(RDMEM(x, T::CC_INC_XHL_1 + EE));
3255 WRMEM(x, val, T::CC_INC_XHL_2 + EE);
3257template<
typename T> II CPUCore<T>::inc_xhl() {
3259 return {1, T::CC_INC_XHL};
3261template<
typename T>
template<Reg16 IXY> II CPUCore<T>::inc_xix() {
3262 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_INC_XIX_1);
3263 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
3265 INC_X<T::CC_DD + T::EE_INC_XIX>(addr);
3266 return {2, T::CC_INC_XHL + T::CC_DD + T::EE_INC_XIX};
3271template<
typename T>
template<Reg16 REG>
inline II CPUCore<T>::adc_hl_SS() {
3272 unsigned reg = get16<REG>();
3273 T::setMemPtr(getHL() + 1);
3274 unsigned res = getHL() + reg + ((getF() & C_FLAG) ? 1 : 0);
3275 byte f =
byte(res >> 16) |
3277 if constexpr (T::IS_R800) {
3278 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3281 f |=
byte(((getHL() ^ res ^ reg) >> 8) & H_FLAG);
3283 f |=
byte(((getHL() ^ res) & (reg ^ res) & 0x8000) >> 13);
3284 if constexpr (T::IS_R800) {
3285 f |= (res >> 8) & S_FLAG;
3287 f |= (res >> 8) & (S_FLAG | X_FLAG | Y_FLAG);
3290 f |=
byte(((getHL() ^ reg) >> 8) & H_FLAG);
3292 f |=
byte((getHL() & reg & 0x8000) >> 13);
3296 setHL(narrow_cast<word>(res));
3297 return {1, T::CC_ADC_HL_SS};
3299template<
typename T> II CPUCore<T>::adc_hl_hl() {
3300 T::setMemPtr(getHL() + 1);
3301 unsigned res = 2 * getHL() + ((getF() & C_FLAG) ? 1 : 0);
3302 byte f =
byte(res >> 16) |
3304 if constexpr (T::IS_R800) {
3305 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3309 f |=
byte(((getHL() ^ res) & 0x8000) >> 13);
3310 if constexpr (T::IS_R800) {
3311 f |=
byte((res >> 8) & (H_FLAG | S_FLAG));
3313 f |=
byte((res >> 8) & (H_FLAG | S_FLAG | X_FLAG | Y_FLAG));
3317 f |=
byte((getHL() & 0x8000) >> 13);
3321 setHL(narrow_cast<word>(res));
3322 return {1, T::CC_ADC_HL_SS};
3326template<
typename T>
template<Reg16 REG1, Reg16 REG2,
int EE> II CPUCore<T>::add_SS_TT() {
3327 unsigned reg1 = get16<REG1>();
3328 unsigned reg2 = get16<REG2>();
3329 T::setMemPtr(reg1 + 1);
3330 unsigned res = reg1 + reg2;
3331 byte f =
byte(((reg1 ^ res ^ reg2) >> 8) & H_FLAG) |
3334 if constexpr (T::IS_R800) {
3335 f |=
byte(getF() & (S_FLAG | Z_FLAG | V_FLAG | X_FLAG | Y_FLAG));
3337 f |=
byte(getF() & (S_FLAG | Z_FLAG | V_FLAG));
3338 f |=
byte((res >> 8) & (X_FLAG | Y_FLAG));
3341 set16<REG1>(narrow_cast<word>(res));
3342 return {1, T::CC_ADD_HL_SS + EE};
3344template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::add_SS_SS() {
3345 unsigned reg = get16<REG>();
3346 T::setMemPtr(reg + 1);
3347 unsigned res = 2 * reg;
3348 byte f =
byte(res >> 16) |
3350 if constexpr (T::IS_R800) {
3351 f |=
byte(getF() & (S_FLAG | Z_FLAG | V_FLAG | X_FLAG | Y_FLAG));
3352 f |=
byte((res >> 8) & H_FLAG);
3354 f |=
byte(getF() & (S_FLAG | Z_FLAG | V_FLAG));
3355 f |=
byte((res >> 8) & (H_FLAG | X_FLAG | Y_FLAG));
3358 set16<REG>(narrow_cast<word>(res));
3359 return {1, T::CC_ADD_HL_SS + EE};
3363template<
typename T>
template<Reg16 REG>
inline II CPUCore<T>::sbc_hl_SS() {
3364 unsigned reg = get16<REG>();
3365 T::setMemPtr(getHL() + 1);
3366 unsigned res = getHL() - reg - ((getF() & C_FLAG) ? 1 : 0);
3367 byte f = ((res & 0x10000) ? C_FLAG : 0) |
3369 if constexpr (T::IS_R800) {
3370 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3373 f |=
byte(((getHL() ^ res ^ reg) >> 8) & H_FLAG);
3375 f |=
byte(((reg ^ getHL()) & (getHL() ^ res) & 0x8000) >> 13);
3376 if constexpr (T::IS_R800) {
3377 f |=
byte((res >> 8) & S_FLAG);
3379 f |=
byte((res >> 8) & (S_FLAG | X_FLAG | Y_FLAG));
3382 f |=
byte(((getHL() ^ reg) >> 8) & H_FLAG);
3384 f |=
byte(((reg ^ getHL()) & getHL() & 0x8000) >> 13);
3388 setHL(narrow_cast<word>(res));
3389 return {1, T::CC_ADC_HL_SS};
3391template<
typename T> II CPUCore<T>::sbc_hl_hl() {
3392 T::setMemPtr(getHL() + 1);
3393 byte f = T::IS_R800 ? (getF() & (X_FLAG | Y_FLAG)) : 0;
3394 if (getF() & C_FLAG) {
3395 f |= C_FLAG | H_FLAG | S_FLAG | N_FLAG;
3396 if constexpr (!T::IS_R800) {
3397 f |= X_FLAG | Y_FLAG;
3401 f |= Z_FLAG | N_FLAG;
3405 return {1, T::CC_ADC_HL_SS};
3409template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::dec_SS() {
3410 set16<REG>(narrow_cast<word>(get16<REG>() - 1));
return {1, T::CC_INC_SS + EE};
3414template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::inc_SS() {
3415 set16<REG>(narrow_cast<word>(get16<REG>() + 1));
return {1, T::CC_INC_SS + EE};
3420template<
typename T>
template<
unsigned N, Reg8 REG> II CPUCore<T>::bit_N_R() {
3421 byte reg = get8<REG>();
3423 if constexpr (T::IS_R800) {
3425 f |=
byte(getF() & (S_FLAG | V_FLAG | C_FLAG | X_FLAG | Y_FLAG));
3427 f |= (reg & (1 << N)) ? 0 : Z_FLAG;
3429 f |= table.
ZSPH[reg & (1 << N)];
3430 f |=
byte(getF() & C_FLAG);
3431 f |=
byte(reg & (X_FLAG | Y_FLAG));
3434 return {1, T::CC_BIT_R};
3436template<
typename T>
template<
unsigned N>
inline II CPUCore<T>::bit_N_xhl() {
3437 byte m = RDMEM(getHL(), T::CC_BIT_XHL_1) & (1 << N);
3439 if constexpr (T::IS_R800) {
3440 f |=
byte(getF() & (S_FLAG | V_FLAG | C_FLAG | X_FLAG | Y_FLAG));
3442 f |= m ? 0 : Z_FLAG;
3445 f |=
byte(getF() & C_FLAG);
3446 f |=
byte((T::getMemPtr() >> 8) & (X_FLAG | Y_FLAG));
3449 return {1, T::CC_BIT_XHL};
3451template<
typename T>
template<
unsigned N>
inline II CPUCore<T>::bit_N_xix(
unsigned addr) {
3453 byte m = RDMEM(addr, T::CC_DD + T::CC_BIT_XIX_1) & (1 << N);
3455 if constexpr (T::IS_R800) {
3456 f |=
byte(getF() & (S_FLAG | V_FLAG | C_FLAG | X_FLAG | Y_FLAG));
3458 f |= m ? 0 : Z_FLAG;
3461 f |=
byte(getF() & C_FLAG);
3462 f |=
byte((addr >> 8) & (X_FLAG | Y_FLAG));
3465 return {3, T::CC_DD + T::CC_BIT_XIX};
3469static constexpr byte RES(
unsigned b,
byte reg) {
3470 return reg &
byte(~(1 << b));
3472template<
typename T>
template<
unsigned N, Reg8 REG> II CPUCore<T>::res_N_R() {
3473 set8<REG>(RES(N, get8<REG>()));
return {1, T::CC_SET_R};
3475template<
typename T>
template<
int EE>
inline byte CPUCore<T>::RES_X(
unsigned bit,
unsigned addr) {
3476 byte res = RES(bit, RDMEM(addr, T::CC_SET_XHL_1 + EE));
3477 WRMEM(addr, res, T::CC_SET_XHL_2 + EE);
3480template<
typename T>
template<
unsigned N> II CPUCore<T>::res_N_xhl() {
3481 RES_X<0>(N, getHL());
return {1, T::CC_SET_XHL};
3483template<
typename T>
template<
unsigned N, Reg8 REG> II CPUCore<T>::res_N_xix_R(
unsigned a) {
3485 set8<REG>(RES_X<T::CC_DD + T::EE_SET_XIX>(N, a));
3486 return {3, T::CC_DD + T::CC_SET_XIX};
3490static constexpr byte SET(
unsigned b,
byte reg) {
3491 return reg |
byte(1 << b);
3493template<
typename T>
template<
unsigned N, Reg8 REG> II CPUCore<T>::set_N_R() {
3494 set8<REG>(SET(N, get8<REG>()));
return {1, T::CC_SET_R};
3496template<
typename T>
template<
int EE>
inline byte CPUCore<T>::SET_X(
unsigned bit,
unsigned addr) {
3497 byte res = SET(bit, RDMEM(addr, T::CC_SET_XHL_1 + EE));
3498 WRMEM(addr, res, T::CC_SET_XHL_2 + EE);
3501template<
typename T>
template<
unsigned N> II CPUCore<T>::set_N_xhl() {
3502 SET_X<0>(N, getHL());
return {1, T::CC_SET_XHL};
3504template<
typename T>
template<
unsigned N, Reg8 REG> II CPUCore<T>::set_N_xix_R(
unsigned a) {
3506 set8<REG>(SET_X<T::CC_DD + T::EE_SET_XIX>(N, a));
3507 return {3, T::CC_DD + T::CC_SET_XIX};
3511template<
typename T>
inline byte CPUCore<T>::RL(
byte reg) {
3513 reg = narrow_cast<byte>((reg << 1) | ((getF() & C_FLAG) ? 0x01 : 0));
3514 byte f = c ? C_FLAG : 0;
3515 if constexpr (T::IS_R800) {
3516 f |= table.
ZSP[reg];
3517 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3519 f |= table.
ZSPXY[reg];
3524template<
typename T>
template<
int EE>
inline byte CPUCore<T>::RL_X(
unsigned x) {
3525 byte res = RL(RDMEM(x, T::CC_SET_XHL_1 + EE));
3526 WRMEM(x, res, T::CC_SET_XHL_2 + EE);
3529template<
typename T>
template<Reg8 REG> II CPUCore<T>::rl_R() {
3530 set8<REG>(RL(get8<REG>()));
return {1, T::CC_SET_R};
3532template<
typename T> II CPUCore<T>::rl_xhl() {
3533 RL_X<0>(getHL());
return {1, T::CC_SET_XHL};
3535template<
typename T>
template<Reg8 REG> II CPUCore<T>::rl_xix_R(
unsigned a) {
3537 set8<REG>(RL_X<T::CC_DD + T::EE_SET_XIX>(a));
3538 return {3, T::CC_DD + T::CC_SET_XIX};
3542template<
typename T>
inline byte CPUCore<T>::RLC(
byte reg) {
3544 reg = narrow_cast<byte>((reg << 1) | c);
3545 byte f = c ? C_FLAG : 0;
3546 if constexpr (T::IS_R800) {
3547 f |= table.
ZSP[reg];
3548 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3550 f |= table.
ZSPXY[reg];
3555template<
typename T>
template<
int EE>
inline byte CPUCore<T>::RLC_X(
unsigned x) {
3556 byte res = RLC(RDMEM(x, T::CC_SET_XHL_1 + EE));
3557 WRMEM(x, res, T::CC_SET_XHL_2 + EE);
3560template<
typename T>
template<Reg8 REG> II CPUCore<T>::rlc_R() {
3561 set8<REG>(RLC(get8<REG>()));
return {1, T::CC_SET_R};
3563template<
typename T> II CPUCore<T>::rlc_xhl() {
3564 RLC_X<0>(getHL());
return {1, T::CC_SET_XHL};
3566template<
typename T>
template<Reg8 REG> II CPUCore<T>::rlc_xix_R(
unsigned a) {
3568 set8<REG>(RLC_X<T::CC_DD + T::EE_SET_XIX>(a));
3569 return {3, T::CC_DD + T::CC_SET_XIX};
3573template<
typename T>
inline byte CPUCore<T>::RR(
byte reg) {
3575 reg = narrow_cast<byte>((reg >> 1) | ((getF() & C_FLAG) << 7));
3576 byte f = c ? C_FLAG : 0;
3577 if constexpr (T::IS_R800) {
3578 f |= table.
ZSP[reg];
3579 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3581 f |= table.
ZSPXY[reg];
3586template<
typename T>
template<
int EE>
inline byte CPUCore<T>::RR_X(
unsigned x) {
3587 byte res = RR(RDMEM(x, T::CC_SET_XHL_1 + EE));
3588 WRMEM(x, res, T::CC_SET_XHL_2 + EE);
3591template<
typename T>
template<Reg8 REG> II CPUCore<T>::rr_R() {
3592 set8<REG>(RR(get8<REG>()));
return {1, T::CC_SET_R};
3594template<
typename T> II CPUCore<T>::rr_xhl() {
3595 RR_X<0>(getHL());
return {1, T::CC_SET_XHL};
3597template<
typename T>
template<Reg8 REG> II CPUCore<T>::rr_xix_R(
unsigned a) {
3599 set8<REG>(RR_X<T::CC_DD + T::EE_SET_XIX>(a));
3600 return {3, T::CC_DD + T::CC_SET_XIX};
3604template<
typename T>
inline byte CPUCore<T>::RRC(
byte reg) {
3606 reg = narrow_cast<byte>((reg >> 1) | (c << 7));
3607 byte f = c ? C_FLAG : 0;
3608 if constexpr (T::IS_R800) {
3609 f |= table.
ZSP[reg];
3610 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3612 f |= table.
ZSPXY[reg];
3617template<
typename T>
template<
int EE>
inline byte CPUCore<T>::RRC_X(
unsigned x) {
3618 byte res = RRC(RDMEM(x, T::CC_SET_XHL_1 + EE));
3619 WRMEM(x, res, T::CC_SET_XHL_2 + EE);
3622template<
typename T>
template<Reg8 REG> II CPUCore<T>::rrc_R() {
3623 set8<REG>(RRC(get8<REG>()));
return {1, T::CC_SET_R};
3625template<
typename T> II CPUCore<T>::rrc_xhl() {
3626 RRC_X<0>(getHL());
return {1, T::CC_SET_XHL};
3628template<
typename T>
template<Reg8 REG> II CPUCore<T>::rrc_xix_R(
unsigned a) {
3630 set8<REG>(RRC_X<T::CC_DD + T::EE_SET_XIX>(a));
3631 return {3, T::CC_DD + T::CC_SET_XIX};
3635template<
typename T>
inline byte CPUCore<T>::SLA(
byte reg) {
3638 byte f = c ? C_FLAG : 0;
3639 if constexpr (T::IS_R800) {
3640 f |= table.
ZSP[reg];
3641 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3643 f |= table.
ZSPXY[reg];
3648template<
typename T>
template<
int EE>
inline byte CPUCore<T>::SLA_X(
unsigned x) {
3649 byte res = SLA(RDMEM(x, T::CC_SET_XHL_1 + EE));
3650 WRMEM(x, res, T::CC_SET_XHL_2 + EE);
3653template<
typename T>
template<Reg8 REG> II CPUCore<T>::sla_R() {
3654 set8<REG>(SLA(get8<REG>()));
return {1, T::CC_SET_R};
3656template<
typename T> II CPUCore<T>::sla_xhl() {
3657 SLA_X<0>(getHL());
return {1, T::CC_SET_XHL};
3659template<
typename T>
template<Reg8 REG> II CPUCore<T>::sla_xix_R(
unsigned a) {
3661 set8<REG>(SLA_X<T::CC_DD + T::EE_SET_XIX>(a));
3662 return {3, T::CC_DD + T::CC_SET_XIX};
3666template<
typename T>
inline byte CPUCore<T>::SLL(
byte reg) {
3667 assert(!T::IS_R800);
3669 reg = narrow_cast<byte>((reg << 1) | 1);
3670 byte f = c ? C_FLAG : 0;
3671 f |= table.
ZSPXY[reg];
3675template<
typename T>
template<
int EE>
inline byte CPUCore<T>::SLL_X(
unsigned x) {
3676 byte res = SLL(RDMEM(x, T::CC_SET_XHL_1 + EE));
3677 WRMEM(x, res, T::CC_SET_XHL_2 + EE);
3680template<
typename T>
template<Reg8 REG> II CPUCore<T>::sll_R() {
3681 set8<REG>(SLL(get8<REG>()));
return {1, T::CC_SET_R};
3683template<
typename T> II CPUCore<T>::sll_xhl() {
3684 SLL_X<0>(getHL());
return {1, T::CC_SET_XHL};
3686template<
typename T>
template<Reg8 REG> II CPUCore<T>::sll_xix_R(
unsigned a) {
3688 set8<REG>(SLL_X<T::CC_DD + T::EE_SET_XIX>(a));
3689 return {3, T::CC_DD + T::CC_SET_XIX};
3691template<
typename T> II CPUCore<T>::sll2() {
3693 byte f = (getF() & (X_FLAG | Y_FLAG)) |
3697 return {3, T::CC_DD + T::CC_SET_XIX};
3701template<
typename T>
inline byte CPUCore<T>::SRA(
byte reg) {
3703 reg = (reg >> 1) | (reg & 0x80);
3704 byte f = c ? C_FLAG : 0;
3705 if constexpr (T::IS_R800) {
3706 f |= table.
ZSP[reg];
3707 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3709 f |= table.
ZSPXY[reg];
3714template<
typename T>
template<
int EE>
inline byte CPUCore<T>::SRA_X(
unsigned x) {
3715 byte res = SRA(RDMEM(x, T::CC_SET_XHL_1 + EE));
3716 WRMEM(x, res, T::CC_SET_XHL_2 + EE);
3719template<
typename T>
template<Reg8 REG> II CPUCore<T>::sra_R() {
3720 set8<REG>(SRA(get8<REG>()));
return {1, T::CC_SET_R};
3722template<
typename T> II CPUCore<T>::sra_xhl() {
3723 SRA_X<0>(getHL());
return {1, T::CC_SET_XHL};
3725template<
typename T>
template<Reg8 REG> II CPUCore<T>::sra_xix_R(
unsigned a) {
3727 set8<REG>(SRA_X<T::CC_DD + T::EE_SET_XIX>(a));
3728 return {3, T::CC_DD + T::CC_SET_XIX};
3732template<
typename T>
inline byte CPUCore<T>::SRL(
byte reg) {
3735 byte f = c ? C_FLAG : 0;
3736 if constexpr (T::IS_R800) {
3737 f |= table.
ZSP[reg];
3738 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3740 f |= table.
ZSPXY[reg];
3745template<
typename T>
template<
int EE>
inline byte CPUCore<T>::SRL_X(
unsigned x) {
3746 byte res = SRL(RDMEM(x, T::CC_SET_XHL_1 + EE));
3747 WRMEM(x, res, T::CC_SET_XHL_2 + EE);
3750template<
typename T>
template<Reg8 REG> II CPUCore<T>::srl_R() {
3751 set8<REG>(SRL(get8<REG>()));
return {1, T::CC_SET_R};
3753template<
typename T> II CPUCore<T>::srl_xhl() {
3754 SRL_X<0>(getHL());
return {1, T::CC_SET_XHL};
3756template<
typename T>
template<Reg8 REG> II CPUCore<T>::srl_xix_R(
unsigned a) {
3758 set8<REG>(SRL_X<T::CC_DD + T::EE_SET_XIX>(a));
3759 return {3, T::CC_DD + T::CC_SET_XIX};
3763template<
typename T> II CPUCore<T>::rla() {
3764 byte c = getF() & C_FLAG;
3765 byte f = (getA() & 0x80) ? C_FLAG : 0;
3766 if constexpr (T::IS_R800) {
3767 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | X_FLAG | Y_FLAG));
3769 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG));
3771 setA(narrow_cast<byte>((getA() << 1) | (c ? 1 : 0)));
3772 if constexpr (!T::IS_R800) {
3773 f |=
byte(getA() & (X_FLAG | Y_FLAG));
3776 return {1, T::CC_RLA};
3778template<
typename T> II CPUCore<T>::rlca() {
3779 setA(narrow_cast<byte>((getA() << 1) | (getA() >> 7)));
3781 if constexpr (T::IS_R800) {
3782 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | X_FLAG | Y_FLAG));
3783 f |=
byte(getA() & C_FLAG);
3785 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG));
3786 f |=
byte(getA() & (Y_FLAG | X_FLAG | C_FLAG));
3789 return {1, T::CC_RLA};
3791template<
typename T> II CPUCore<T>::rra() {
3792 auto c =
byte((getF() & C_FLAG) << 7);
3793 byte f = (getA() & 0x01) ? C_FLAG : 0;
3794 if constexpr (T::IS_R800) {
3795 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | X_FLAG | Y_FLAG));
3797 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG));
3799 setA((getA() >> 1) | c);
3800 if constexpr (!T::IS_R800) {
3801 f |=
byte(getA() & (X_FLAG | Y_FLAG));
3804 return {1, T::CC_RLA};
3806template<
typename T> II CPUCore<T>::rrca() {
3807 byte f = getA() & C_FLAG;
3808 if constexpr (T::IS_R800) {
3809 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | X_FLAG | Y_FLAG));
3811 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG));
3813 setA(narrow_cast<byte>((getA() >> 1) | (getA() << 7)));
3814 if constexpr (!T::IS_R800) {
3815 f |=
byte(getA() & (X_FLAG | Y_FLAG));
3818 return {1, T::CC_RLA};
3823template<
typename T> II CPUCore<T>::rld() {
3824 byte val = RDMEM(getHL(), T::CC_RLD_1);
3825 T::setMemPtr(getHL() + 1);
3826 WRMEM(getHL(), narrow_cast<byte>((val << 4) | (getA() & 0x0F)), T::CC_RLD_2);
3827 setA((getA() & 0xF0) | (val >> 4));
3829 if constexpr (T::IS_R800) {
3830 f |=
byte(getF() & (C_FLAG | X_FLAG | Y_FLAG));
3831 f |= table.
ZSP[getA()];
3833 f |=
byte(getF() & C_FLAG);
3834 f |= table.
ZSPXY[getA()];
3837 return {1, T::CC_RLD};
3841template<
typename T> II CPUCore<T>::rrd() {
3842 byte val = RDMEM(getHL(), T::CC_RLD_1);
3843 T::setMemPtr(getHL() + 1);
3844 WRMEM(getHL(), narrow_cast<byte>((val >> 4) | (getA() << 4)), T::CC_RLD_2);
3845 setA((getA() & 0xF0) | (val & 0x0F));
3847 if constexpr (T::IS_R800) {
3848 f |=
byte(getF() & (C_FLAG | X_FLAG | Y_FLAG));
3849 f |= table.
ZSP[getA()];
3851 f |=
byte(getF() & C_FLAG);
3852 f |= table.
ZSPXY[getA()];
3855 return {1, T::CC_RLD};
3860template<
typename T>
template<
int EE>
inline void CPUCore<T>::PUSH(
word reg) {
3862 WR_WORD_rev<true, true>(getSP(), reg, T::CC_PUSH_1 + EE);
3864template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::push_SS() {
3865 PUSH<EE>(get16<REG>());
return {1, T::CC_PUSH + EE};
3869template<
typename T>
template<
int EE>
inline word CPUCore<T>::POP() {
3870 word addr = getSP();
3872 if constexpr (T::IS_R800) {
3874 if constexpr (EE == 0) {
3882 return RD_WORD(addr, T::CC_POP_1 + EE);
3884template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::pop_SS() {
3885 set16<REG>(POP<EE>());
return {1, T::CC_POP + EE};
3890template<
typename T>
template<
typename COND> II CPUCore<T>::call(COND cond) {
3891 word addr = RD_WORD_PC<1>(T::CC_CALL_1);
3894 PUSH<T::EE_CALL>(getPC() + 3);
3896 if constexpr (T::IS_R800) {
3898 setSlowInstructions();
3900 return {0, T::CC_CALL_A};
3902 return {3, T::CC_CALL_B};
3908template<
typename T>
template<
unsigned ADDR> II CPUCore<T>::rst() {
3909 PUSH<0>(getPC() + 1);
3912 if constexpr (T::IS_R800) {
3914 setSlowInstructions();
3916 return {0, T::CC_RST};
3921template<
typename T>
template<
int EE,
typename COND>
inline II CPUCore<T>::RET(COND cond) {
3923 auto addr = POP<EE>();
3926 return {0, T::CC_RET_A + EE};
3928 return {1, T::CC_RET_B + EE};
3931template<
typename T>
template<
typename COND> II CPUCore<T>::ret(COND cond) {
3932 return RET<T::EE_RET_C>(cond);
3934template<
typename T> II CPUCore<T>::ret() {
3935 return RET<0>(CondTrue());
3937template<
typename T> II CPUCore<T>::retn() {
3939 setSlowInstructions();
3940 return RET<T::EE_RETN>(CondTrue());
3945template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::jp_SS() {
3946 setPC(get16<REG>()); T::R800ForcePageBreak();
return {0, T::CC_JP_HL + EE};
3950template<
typename T>
template<
typename COND> II CPUCore<T>::jp(COND cond) {
3951 word addr = RD_WORD_PC<1>(T::CC_JP_1);
3955 T::R800ForcePageBreak();
3956 return {0, T::CC_JP_A};
3958 return {3, T::CC_JP_B};
3963template<
typename T>
template<
typename COND> II CPUCore<T>::jr(COND cond) {
3964 int8_t ofst = RDMEM_OPCODE<1>(T::CC_JR_1);
3966 if (((getPC() + 2) & 0xFF) == 0) {
3994 T::R800ForcePageBreak();
3996 setPC(narrow_cast<word>(getPC() + 2 + ofst));
3997 T::setMemPtr(getPC());
3998 return {0, T::CC_JR_A};
4000 return {2, T::CC_JR_B};
4005template<
typename T> II CPUCore<T>::djnz() {
4006 byte b = getB() - 1;
4008 int8_t ofst = RDMEM_OPCODE<1>(T::CC_JR_1 + T::EE_DJNZ);
4010 if (((getPC() + 2) & 0xFF) == 0) {
4012 T::R800ForcePageBreak();
4014 setPC(narrow_cast<word>(getPC() + 2 + ofst));
4015 T::setMemPtr(getPC());
4016 return {0, T::CC_JR_A + T::EE_DJNZ};
4018 return {2, T::CC_JR_B + T::EE_DJNZ};
4023template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::ex_xsp_SS() {
4024 word res = RD_WORD_impl<true, false>(getSP(), T::CC_EX_SP_HL_1 + EE);
4026 WR_WORD_rev<false, true>(getSP(), get16<REG>(), T::CC_EX_SP_HL_2 + EE);
4028 return {1, T::CC_EX_SP_HL + EE};
4032template<
typename T>
template<Reg8 REG> II CPUCore<T>::in_R_c() {
4033 if constexpr (T::IS_R800) T::waitForEvenCycle(T::CC_IN_R_C_1);
4034 T::setMemPtr(getBC() + 1);
4035 byte res = READ_PORT(getBC(), T::CC_IN_R_C_1);
4037 if constexpr (T::IS_R800) {
4038 f |=
byte(getF() & (C_FLAG | X_FLAG | Y_FLAG));
4039 f |= table.
ZSP[res];
4041 f |=
byte(getF() & C_FLAG);
4042 f |= table.
ZSPXY[res];
4046 return {1, T::CC_IN_R_C};
4050template<
typename T> II CPUCore<T>::in_a_byte() {
4051 unsigned y = RDMEM_OPCODE<1>(T::CC_IN_A_N_1) + 256 * getA();
4052 T::setMemPtr(y + 1);
4053 if constexpr (T::IS_R800) T::waitForEvenCycle(T::CC_IN_A_N_2);
4054 setA(READ_PORT(narrow_cast<word>(y), T::CC_IN_A_N_2));
4055 return {2, T::CC_IN_A_N};
4059template<
typename T>
template<Reg8 REG> II CPUCore<T>::out_c_R() {
4060 if constexpr (T::IS_R800) T::waitForEvenCycle(T::CC_OUT_C_R_1);
4061 T::setMemPtr(getBC() + 1);
4062 WRITE_PORT(getBC(), get8<REG>(), T::CC_OUT_C_R_1);
4063 return {1, T::CC_OUT_C_R};
4065template<
typename T> II CPUCore<T>::out_c_0() {
4067 if constexpr (T::IS_R800) T::waitForEvenCycle(T::CC_OUT_C_R_1);
4068 T::setMemPtr(getBC() + 1);
4069 byte out_c_x = isCMOS ? 255 : 0;
4070 WRITE_PORT(getBC(), out_c_x, T::CC_OUT_C_R_1);
4071 return {1, T::CC_OUT_C_R};
4075template<
typename T> II CPUCore<T>::out_byte_a() {
4076 byte port = RDMEM_OPCODE<1>(T::CC_OUT_N_A_1);
4077 auto y = narrow_cast<word>((getA() << 8) | port);
4078 T::setMemPtr((getA() << 8) | ((port + 1) & 255));
4079 if constexpr (T::IS_R800) T::waitForEvenCycle(T::CC_OUT_N_A_2);
4080 WRITE_PORT(y, getA(), T::CC_OUT_N_A_2);
4081 return {2, T::CC_OUT_N_A};
4086template<
typename T>
inline II CPUCore<T>::BLOCK_CP(
int increase,
bool repeat) {
4087 T::setMemPtr(T::getMemPtr() + increase);
4088 byte val = RDMEM(getHL(), T::CC_CPI_1);
4089 byte res = getA() - val;
4090 setHL(narrow_cast<word>(getHL() + increase));
4092 byte f = ((getA() ^ val ^ res) & H_FLAG) |
4095 (getBC() ? V_FLAG : 0);
4096 if constexpr (T::IS_R800) {
4097 f |=
byte(getF() & (C_FLAG | X_FLAG | Y_FLAG));
4099 f |=
byte(getF() & C_FLAG);
4100 unsigned k = res - ((f & H_FLAG) >> 4);
4101 f |= (k << 4) & Y_FLAG;
4105 if (
repeat && getBC() && res) {
4107 T::setMemPtr(getPC() + 1);
4108 return {
word(-1), T::CC_CPIR};
4110 return {1, T::CC_CPI};
4113template<
typename T> II CPUCore<T>::cpd() {
return BLOCK_CP(-1,
false); }
4114template<
typename T> II CPUCore<T>::cpi() {
return BLOCK_CP( 1,
false); }
4115template<
typename T> II CPUCore<T>::cpdr() {
return BLOCK_CP(-1,
true ); }
4116template<
typename T> II CPUCore<T>::cpir() {
return BLOCK_CP( 1,
true ); }
4120template<
typename T>
inline II CPUCore<T>::BLOCK_LD(
int increase,
bool repeat) {
4121 byte val = RDMEM(getHL(), T::CC_LDI_1);
4122 WRMEM(getDE(), val, T::CC_LDI_2);
4123 setHL(narrow_cast<word>(getHL() + increase));
4124 setDE(narrow_cast<word>(getDE() + increase));
4126 byte f = getBC() ? V_FLAG : 0;
4127 if constexpr (T::IS_R800) {
4128 f |=
byte(getF() & (S_FLAG | Z_FLAG | C_FLAG | X_FLAG | Y_FLAG));
4130 f |=
byte(getF() & (S_FLAG | Z_FLAG | C_FLAG));
4131 f |=
byte(((getA() + val) << 4) & Y_FLAG);
4132 f |=
byte((getA() + val) & X_FLAG);
4137 T::setMemPtr(getPC() + 1);
4138 return {
word(-1), T::CC_LDIR};
4140 return {1, T::CC_LDI};
4143template<
typename T> II CPUCore<T>::ldd() {
return BLOCK_LD(-1,
false); }
4144template<
typename T> II CPUCore<T>::ldi() {
return BLOCK_LD( 1,
false); }
4145template<
typename T> II CPUCore<T>::lddr() {
return BLOCK_LD(-1,
true ); }
4146template<
typename T> II CPUCore<T>::ldir() {
return BLOCK_LD( 1,
true ); }
4150template<
typename T>
inline II CPUCore<T>::BLOCK_IN(
int increase,
bool repeat) {
4151 if constexpr (T::IS_R800) T::waitForEvenCycle(T::CC_INI_1);
4152 T::setMemPtr(getBC() + increase);
4153 setBC(getBC() - 0x100);
4154 byte val = READ_PORT(getBC(), T::CC_INI_1);
4155 WRMEM(getHL(), val, T::CC_INI_2);
4156 setHL(narrow_cast<word>(getHL() + increase));
4157 unsigned k = val + ((getC() + increase) & 0xFF);
4159 if constexpr (T::IS_R800) {
4160 setF((getF() & ~Z_FLAG) | (b ? 0 : Z_FLAG) | N_FLAG);
4162 setF(((val & S_FLAG) >> 6) |
4163 ((k & 0x100) ? (H_FLAG | C_FLAG) : 0) |
4165 (table.ZSPXY[(k & 0x07) ^ b] & P_FLAG));
4169 return {
word(-1), T::CC_INIR};
4171 return {1, T::CC_INI};
4174template<
typename T> II CPUCore<T>::ind() {
return BLOCK_IN(-1,
false); }
4175template<
typename T> II CPUCore<T>::ini() {
return BLOCK_IN( 1,
false); }
4176template<
typename T> II CPUCore<T>::indr() {
return BLOCK_IN(-1,
true ); }
4177template<
typename T> II CPUCore<T>::inir() {
return BLOCK_IN( 1,
true ); }
4181template<
typename T>
inline II CPUCore<T>::BLOCK_OUT(
int increase,
bool repeat) {
4182 byte val = RDMEM(getHL(), T::CC_OUTI_1);
4183 setHL(narrow_cast<word>(getHL() + increase));
4184 if constexpr (T::IS_R800) T::waitForEvenCycle(T::CC_OUTI_2);
4185 WRITE_PORT(getBC(), val, T::CC_OUTI_2);
4186 setBC(getBC() - 0x100);
4187 T::setMemPtr(getBC() + increase);
4188 unsigned k = val + getL();
4190 if constexpr (T::IS_R800) {
4191 setF((getF() & ~Z_FLAG) | (b ? 0 : Z_FLAG) | N_FLAG);
4193 setF(((val & S_FLAG) >> 6) |
4194 ((k & 0x100) ? (H_FLAG | C_FLAG) : 0) |
4196 (table.ZSPXY[(k & 0x07) ^ b] & P_FLAG));
4200 return {
word(-1), T::CC_OTIR};
4202 return {1, T::CC_OUTI};
4205template<
typename T> II CPUCore<T>::outd() {
return BLOCK_OUT(-1,
false); }
4206template<
typename T> II CPUCore<T>::outi() {
return BLOCK_OUT( 1,
false); }
4207template<
typename T> II CPUCore<T>::otdr() {
return BLOCK_OUT(-1,
true ); }
4208template<
typename T> II CPUCore<T>::otir() {
return BLOCK_OUT( 1,
true ); }
4212template<
typename T>
template<
int EE> II CPUCore<T>::nop() {
return {1, T::CC_NOP + EE}; }
4213template<
typename T> II CPUCore<T>::ccf() {
4215 if constexpr (T::IS_R800) {
4217 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | C_FLAG | X_FLAG | Y_FLAG | H_FLAG));
4219 f |=
byte((getF() & C_FLAG) << 4);
4223 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | C_FLAG | Y_FLAG));
4224 f |=
byte((getF() | getA()) & X_FLAG);
4226 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | C_FLAG));
4227 f |=
byte((getF() | getA()) & (X_FLAG | Y_FLAG));
4232 return {1, T::CC_CCF};
4234template<
typename T> II CPUCore<T>::cpl() {
4235 setA(getA() ^ 0xFF);
4236 byte f = H_FLAG | N_FLAG;
4237 if constexpr (T::IS_R800) {
4240 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | C_FLAG));
4241 f |=
byte(getA() & (X_FLAG | Y_FLAG));
4244 return {1, T::CC_CPL};
4246template<
typename T> II CPUCore<T>::daa() {
4250 if ((f & H_FLAG) || ((getA() & 0xf) > 9)) adjust += 6;
4251 if ((f & C_FLAG) || (getA() > 0x99)) adjust += 0x60;
4252 if (f & N_FLAG) a -= adjust;
else a += adjust;
4253 if constexpr (T::IS_R800) {
4254 f &= C_FLAG | N_FLAG | X_FLAG | Y_FLAG;
4257 f &= C_FLAG | N_FLAG;
4258 f |= table.
ZSPXY[a];
4260 f |=
byte((getA() > 0x99) | ((getA() ^ a) & H_FLAG));
4263 return {1, T::CC_DAA};
4265template<
typename T> II CPUCore<T>::neg() {
4267 unsigned a = getA();
4268 unsigned res = -signed(a);
4269 byte f = ((res & 0x100) ? C_FLAG : 0) |
4271 ((res ^ a) & H_FLAG) |
4272 ((a & res & 0x80) >> 5);
4273 if constexpr (T::IS_R800) {
4274 f |= table.
ZS[res & 0xFF];
4275 f |=
byte(getF() & (X_FLAG | Y_FLAG));
4277 f |= table.
ZSXY[res & 0xFF];
4280 setA(narrow_cast<byte>(res));
4281 return {1, T::CC_NEG};
4283template<
typename T> II CPUCore<T>::scf() {
4285 if constexpr (T::IS_R800) {
4286 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | X_FLAG | Y_FLAG));
4291 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | Y_FLAG));
4292 f |=
byte((getF() | getA()) & X_FLAG);
4294 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG));
4295 f |=
byte((getF() | getA()) & (X_FLAG | Y_FLAG));
4299 return {1, T::CC_SCF};
4302template<
typename T> II CPUCore<T>::ex_af_af() {
4303 auto t = getAF2(); setAF2(getAF()); setAF(
t);
4304 return {1, T::CC_EX};
4306template<
typename T> II CPUCore<T>::ex_de_hl() {
4307 auto t = getDE(); setDE(getHL()); setHL(
t);
4308 return {1, T::CC_EX};
4310template<
typename T> II CPUCore<T>::exx() {
4311 auto t1 = getBC2(); setBC2(getBC()); setBC(t1);
4312 auto t2 = getDE2(); setDE2(getDE()); setDE(t2);
4313 auto t3 = getHL2(); setHL2(getHL()); setHL(t3);
4314 return {1, T::CC_EX};
4317template<
typename T> II CPUCore<T>::di() {
4320 return {1, T::CC_DI};
4322template<
typename T> II CPUCore<T>::ei() {
4326 setSlowInstructions();
4327 return {1, T::CC_EI};
4329template<
typename T> II CPUCore<T>::halt() {
4331 setSlowInstructions();
4333 if (!(getIFF1() || getIFF2())) {
4334 diHaltCallback.execute();
4336 return {1, T::CC_HALT};
4338template<
typename T>
template<
unsigned N> II CPUCore<T>::im_N() {
4339 setIM(N);
return {1, T::CC_IM};
4343template<
typename T>
template<Reg8 REG> II CPUCore<T>::ld_a_IR() {
4345 byte f = getIFF2() ? V_FLAG : 0;
4346 if constexpr (T::IS_R800) {
4347 f |=
byte(getF() & (C_FLAG | X_FLAG | Y_FLAG));
4348 f |= table.
ZS[getA()];
4350 f |=
byte(getF() & C_FLAG);
4351 f |= table.
ZSXY[getA()];
4354 setSlowInstructions();
4357 return {1, T::CC_LD_A_I};
4361template<
typename T> II CPUCore<T>::ld_r_a() {
4370 if constexpr (T::IS_R800) val -= 1;
4372 return {1, T::CC_LD_A_I};
4374template<
typename T> II CPUCore<T>::ld_i_a() {
4376 return {1, T::CC_LD_A_I};
4380template<
typename T>
template<Reg8 REG> II CPUCore<T>::mulub_a_R() {
4387 setHL(
word(getA()) *
word(get8<REG>()));
4388 setF((getF() & (N_FLAG | H_FLAG | X_FLAG | Y_FLAG)) |
4390 (getHL() ? 0 : Z_FLAG) |
4391 ((getHL() & 0xFF00) ? C_FLAG : 0));
4392 return {1, T::CC_MULUB};
4396template<
typename T>
template<Reg16 REG> II CPUCore<T>::muluw_hl_SS() {
4403 uint32_t res = uint32_t(getHL()) * get16<REG>();
4404 setDE(narrow_cast<word>(res >> 16));
4405 setHL(narrow_cast<word>(res >> 0));
4406 setF((getF() & (N_FLAG | H_FLAG | X_FLAG | Y_FLAG)) |
4408 (res ? 0 : Z_FLAG) |
4409 ((res & 0xFFFF0000) ? C_FLAG : 0));
4410 return {1, T::CC_MULUW};
4420template<
typename T>
template<
typename Archive>
4423 T::serialize(ar, version);
4424 ar.serialize(
"regs",
static_cast<CPURegs&
>(*
this));
4425 if (ar.versionBelow(version, 2)) {
4427 ar.serialize(
"memptr", mPtr);
4431 if (ar.versionBelow(version, 5)) {
4440 ar.serialize(
"nmiEdge", nmiEdge);
4449 if constexpr (T::IS_R800) {
4450 if (ar.versionBelow(version, 4)) {
4451 motherboard.getMSXCliComm().printWarning(
4452 "Loading an old savestate: the timing of the R800 "
4453 "emulation has changed. This may cause synchronization "
4454 "problems in replay.");