183#include <type_traits>
208 #define MAYBE_UNUSED_LABEL [[maybe_unused]]
210 #pragma warning(disable : 4102)
211 #define MAYBE_UNUSED_LABEL
217enum Reg8 :
int {
A,
F,
B,
C,
D,
E,
H,
L,
IXH,
IXL,
IYH,
IYL,
REG_I,
REG_R,
DUMMY };
221static constexpr byte S_FLAG = 0x80;
222static constexpr byte Z_FLAG = 0x40;
223static constexpr byte Y_FLAG = 0x20;
224static constexpr byte H_FLAG = 0x10;
225static constexpr byte X_FLAG = 0x08;
226static constexpr byte V_FLAG = 0x04;
227static constexpr byte P_FLAG = V_FLAG;
228static constexpr byte N_FLAG = 0x02;
229static constexpr byte C_FLAG = 0x01;
233 std::array<byte, 256>
ZS;
235 std::array<byte, 256>
ZSP;
240static constexpr byte ZS0 = Z_FLAG;
241static constexpr byte ZSXY0 = Z_FLAG;
242static constexpr byte ZSP0 = Z_FLAG | V_FLAG;
243static constexpr byte ZSPXY0 = Z_FLAG | V_FLAG;
244static constexpr byte ZS255 = S_FLAG;
245static constexpr byte ZSXY255 = S_FLAG | X_FLAG | Y_FLAG;
247static constexpr Table initTables()
251 for (
auto i_ :
xrange(256)) {
252 auto i = narrow_cast<byte>(i_);
253 byte zFlag = (i == 0) ? Z_FLAG : 0;
254 byte sFlag = i & S_FLAG;
255 byte xFlag = i & X_FLAG;
256 byte yFlag = i & Y_FLAG;
258 for (
int v = 128; v != 0; v >>= 1) {
259 if (i & v) vFlag ^= V_FLAG;
261 table.
ZS [i] = zFlag | sFlag;
262 table.
ZSXY [i] = zFlag | sFlag | xFlag | yFlag;
263 table.
ZSP [i] = zFlag | sFlag | vFlag;
264 table.
ZSPXY[i] = zFlag | sFlag | xFlag | yFlag | vFlag;
265 table.
ZSPH [i] = zFlag | sFlag | vFlag | H_FLAG;
267 assert(table.
ZS [ 0] == ZS0);
268 assert(table.
ZSXY [ 0] == ZSXY0);
269 assert(table.
ZSP [ 0] == ZSP0);
270 assert(table.
ZSPXY[ 0] == ZSPXY0);
271 assert(table.
ZS [255] == ZS255);
272 assert(table.
ZSXY [255] == ZSXY255);
277static constexpr Table table = initTables();
301 , T(time, motherboard_.getScheduler())
302 , motherboard(motherboard_)
303 , scheduler(motherboard.getScheduler())
304 , traceSetting(traceSetting_)
305 , diHaltCallback(diHaltCallback_)
306 , IRQStatus(motherboard.getDebugger(), name +
".pendingIRQ",
307 "Non-zero if there are pending IRQs (thus CPU would enter "
308 "interrupt routine in EI mode).",
310 , IRQAccept(motherboard.getDebugger(), name +
".acceptIRQ",
311 "This probe is only useful to set a breakpoint on (the value "
312 "return by read is meaningless). The breakpoint gets triggered "
313 "right after the CPU accepted an IRQ.")
315 motherboard.getCommandController(),
tmpStrCat(name,
"_freq_locked"),
316 "real (locked) or custom (unlocked) CPU frequency",
319 motherboard.getCommandController(),
tmpStrCat(name,
"_freq"),
320 "custom CPU frequency (only valid when unlocked)",
321 T::CLOCK_FREQ, 1000000, 1000000000)
322 , freq(T::CLOCK_FREQ)
323 , tracingEnabled(traceSetting.getBoolean())
324 , isCMOS(motherboard.hasToshibaEngine())
326 static_assert(!std::is_polymorphic_v<CPUCore<T>>,
327 "keep CPUCore non-virtual to keep PC at offset 0");
334 assert(T::getTimeFast() <= time);
367 T::setMemPtr(0xFFFF);
397 assert(NMIStatus == 0);
398 assert(IRQStatus == 0);
420 if (exitLoop) [[unlikely]] {
435template<
typename T>
void CPUCore<T>::setSlowInstructions()
437 slowInstructions = 2;
443 assert(IRQStatus >= 0);
444 if (IRQStatus == 0) {
445 setSlowInstructions();
447 IRQStatus = IRQStatus + 1;
452 IRQStatus = IRQStatus - 1;
453 assert(IRQStatus >= 0);
458 assert(NMIStatus >= 0);
459 if (NMIStatus == 0) {
461 setSlowInstructions();
469 assert(NMIStatus >= 0);
485 return address == getPC();
490 assert(time >= getCurrentTime());
491 scheduler.schedule(time);
492 T::advanceTime(time);
498 EmuTime time2 = T::calcTime(time, cycles);
501 scheduler.schedule(time2);
511static constexpr char toHex(
byte x)
513 return narrow<char>((x < 10) ? (x +
'0') : (x - 10 +
'A'));
515static constexpr void toHex(
byte x, std::span<char, 3> buf)
517 buf[0] = toHex(x / 16);
518 buf[1] = toHex(x & 15);
524 word address = (tokens.size() < 3) ? getPC() :
word(tokens[2].getInt(interp));
525 std::array<byte, 4> outBuf;
526 std::string dasmOutput;
527 unsigned len =
dasm(*interface, address, outBuf, dasmOutput,
529 dasmOutput.resize(19,
' ');
531 std::array<char, 3> tmp; tmp[2] = 0;
532 for (
auto i :
xrange(len)) {
533 toHex(outBuf[i], tmp);
542 }
else if (&
setting == &freqValue) {
544 }
else if (&
setting == &traceSetting) {
545 tracingEnabled = traceSetting.getBoolean();
557 if (freqLocked.getBoolean()) {
562 T::setFreq(freqValue.getInt());
567template<
typename T>
inline byte CPUCore<T>::READ_PORT(
word port,
unsigned cc)
569 EmuTime time = T::getTimeFast(cc);
570 scheduler.schedule(time);
571 byte result = interface->readIO(port, time);
576template<
typename T>
inline void CPUCore<T>::WRITE_PORT(
word port,
byte value,
unsigned cc)
578 EmuTime time = T::getTimeFast(cc);
579 scheduler.schedule(time);
580 interface->writeIO(port, value, time);
584template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
590 if (readCacheLine[high] ==
nullptr) {
593 if (
const byte* line = interface->getReadCacheLine(addrBase)) {
595 T::template PRE_MEM<PRE_PB, POST_PB>(address);
596 T::template POST_MEM< POST_PB>(address);
597 readCacheLine[high] = line - addrBase;
598 return readCacheLine[high][address];
602 readCacheLine[high] = std::bit_cast<const byte*>(uintptr_t(1));
603 T::template PRE_MEM<PRE_PB, POST_PB>(address);
604 EmuTime time = T::getTimeFast(cc);
605 scheduler.schedule(time);
606 byte result = interface->readMem(narrow_cast<word>(address), time);
607 T::template POST_MEM<POST_PB>(address);
610template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
614 if (uintptr_t(line) > 1) [[likely]] {
616 T::template PRE_MEM<PRE_PB, POST_PB>(address);
617 T::template POST_MEM< POST_PB>(address);
618 return line[address];
620 return RDMEMslow<PRE_PB, POST_PB>(address, cc);
623template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
626 constexpr bool PRE = T::template Normalize<PRE_PB >::value;
627 constexpr bool POST = T::template Normalize<POST_PB>::value;
628 return RDMEM_impl2<PRE, POST>(address, cc);
641 unsigned address = narrow_cast<word>(getPC() + PC_OFFSET);
642 return RDMEM_impl<false, false>(address, cc);
646 return RDMEM_impl<true, true>(address, cc);
649template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
652 auto res =
word(RDMEM_impl<PRE_PB, false>(address, cc));
653 res |=
word(RDMEM_impl<false, POST_PB>(narrow_cast<word>(address + 1), cc + T::CC_RDMEM) << 8);
656template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
662 T::template PRE_WORD<PRE_PB, POST_PB>(address);
663 T::template POST_WORD< POST_PB>(address);
667 return RD_WORD_slow<PRE_PB, POST_PB>(address, cc);
670template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
673 constexpr bool PRE = T::template Normalize<PRE_PB >::value;
674 constexpr bool POST = T::template Normalize<POST_PB>::value;
675 return RD_WORD_impl2<PRE, POST>(address, cc);
679 unsigned addr = narrow_cast<word>(getPC() + PC_OFFSET);
680 return RD_WORD_impl<false, false>(addr, cc);
683 unsigned address,
unsigned cc)
685 return RD_WORD_impl<true, true>(address, cc);
688template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
694 if (writeCacheLine[high] ==
nullptr) {
697 if (
byte* line = interface->getWriteCacheLine(addrBase)) {
699 T::template PRE_MEM<PRE_PB, POST_PB>(address);
700 T::template POST_MEM< POST_PB>(address);
701 writeCacheLine[high] = line - addrBase;
702 writeCacheLine[high][address] = value;
707 writeCacheLine[high] = std::bit_cast<byte*>(uintptr_t(1));
708 T::template PRE_MEM<PRE_PB, POST_PB>(address);
709 EmuTime time = T::getTimeFast(cc);
710 scheduler.schedule(time);
711 interface->writeMem(narrow_cast<word>(address), value, time);
712 T::template POST_MEM<POST_PB>(address);
714template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
716 unsigned address,
byte value,
unsigned cc)
719 if (uintptr_t(line) > 1) [[likely]] {
721 T::template PRE_MEM<PRE_PB, POST_PB>(address);
722 T::template POST_MEM< POST_PB>(address);
723 line[address] = value;
725 WRMEMslow<PRE_PB, POST_PB>(address, value, cc);
728template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
730 unsigned address,
byte value,
unsigned cc)
732 constexpr bool PRE = T::template Normalize<PRE_PB >::value;
733 constexpr bool POST = T::template Normalize<POST_PB>::value;
734 WRMEM_impl2<PRE, POST>(address, value, cc);
737 unsigned address,
byte value,
unsigned cc)
739 WRMEM_impl<true, true>(address, value, cc);
742template<
typename T>
NEVER_INLINE void CPUCore<T>::WR_WORD_slow(
743 unsigned address,
word value,
unsigned cc)
745 WRMEM_impl<true, false>( address,
byte(value & 255), cc);
746 WRMEM_impl<false, true>(narrow_cast<word>(address + 1),
byte(value >> 8), cc + T::CC_WRMEM);
749 unsigned address,
word value,
unsigned cc)
754 T::template PRE_WORD<true, true>(address);
755 T::template POST_WORD< true>(address);
759 WR_WORD_slow(address, value, cc);
764template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
766 unsigned address,
word value,
unsigned cc)
768 WRMEM_impl<PRE_PB, false>(narrow_cast<word>(address + 1),
byte(value >> 8), cc);
769 WRMEM_impl<false, POST_PB>( address,
byte(value & 255), cc + T::CC_WRMEM);
771template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
773 unsigned address,
word value,
unsigned cc)
778 T::template PRE_WORD<PRE_PB, POST_PB>(address);
779 T::template POST_WORD< POST_PB>(address);
783 WR_WORD_rev_slow<PRE_PB, POST_PB>(address, value, cc);
786template<
typename T>
template<
bool PRE_PB,
bool POST_PB>
788 unsigned address,
word value,
unsigned cc)
790 constexpr bool PRE = T::template Normalize<PRE_PB >::value;
791 constexpr bool POST = T::template Normalize<POST_PB>::value;
792 WR_WORD_rev2<PRE, POST>(address, value, cc);
802 PUSH<T::EE_NMI_1>(getPC());
808template<
typename T>
inline void CPUCore<T>::irq0()
812 assert(interface->readIRQVector() == 0xFF);
817 PUSH<T::EE_IRQ0_1>(getPC());
819 T::setMemPtr(getPC());
824template<
typename T>
inline void CPUCore<T>::irq1()
830 PUSH<T::EE_IRQ1_1>(getPC());
832 T::setMemPtr(getPC());
837template<
typename T>
inline void CPUCore<T>::irq2()
843 PUSH<T::EE_IRQ2_1>(getPC());
844 unsigned x = interface->readIRQVector() | (getI() << 8);
845 setPC(RD_WORD(x, T::CC_IRQ2_2));
846 T::setMemPtr(getPC());
851void CPUCore<T>::executeInstructions()
853 checkNoCurrentFlags();
854#ifdef USE_COMPUTED_GOTO
857 static std::array<void*, 256> opcodeTable = {
858 &&op00, &&op01, &&op02, &&op03, &&op04, &&op05, &&op06, &&op07,
859 &&op08, &&op09, &&op0A, &&op0B, &&op0C, &&op0D, &&op0E, &&op0F,
860 &&op10, &&op11, &&op12, &&op13, &&op14, &&op15, &&op16, &&op17,
861 &&op18, &&op19, &&op1A, &&op1B, &&op1C, &&op1D, &&op1E, &&op1F,
862 &&op20, &&op21, &&op22, &&op23, &&op24, &&op25, &&op26, &&op27,
863 &&op28, &&op29, &&op2A, &&op2B, &&op2C, &&op2D, &&op2E, &&op2F,
864 &&op30, &&op31, &&op32, &&op33, &&op34, &&op35, &&op36, &&op37,
865 &&op38, &&op39, &&op3A, &&op3B, &&op3C, &&op3D, &&op3E, &&op3F,
866 &&op00, &&op41, &&op42, &&op43, &&op44, &&op45, &&op46, &&op47,
867 &&op48, &&op00, &&op4A, &&op4B, &&op4C, &&op4D, &&op4E, &&op4F,
868 &&op50, &&op51, &&op00, &&op53, &&op54, &&op55, &&op56, &&op57,
869 &&op58, &&op59, &&op5A, &&op00, &&op5C, &&op5D, &&op5E, &&op5F,
870 &&op60, &&op61, &&op62, &&op63, &&op00, &&op65, &&op66, &&op67,
871 &&op68, &&op69, &&op6A, &&op6B, &&op6C, &&op00, &&op6E, &&op6F,
872 &&op70, &&op71, &&op72, &&op73, &&op74, &&op75, &&op76, &&op77,
873 &&op78, &&op79, &&op7A, &&op7B, &&op7C, &&op7D, &&op7E, &&op00,
874 &&op80, &&op81, &&op82, &&op83, &&op84, &&op85, &&op86, &&op87,
875 &&op88, &&op89, &&op8A, &&op8B, &&op8C, &&op8D, &&op8E, &&op8F,
876 &&op90, &&op91, &&op92, &&op93, &&op94, &&op95, &&op96, &&op97,
877 &&op98, &&op99, &&op9A, &&op9B, &&op9C, &&op9D, &&op9E, &&op9F,
878 &&opA0, &&opA1, &&opA2, &&opA3, &&opA4, &&opA5, &&opA6, &&opA7,
879 &&opA8, &&opA9, &&opAA, &&opAB, &&opAC, &&opAD, &&opAE, &&opAF,
880 &&opB0, &&opB1, &&opB2, &&opB3, &&opB4, &&opB5, &&opB6, &&opB7,
881 &&opB8, &&opB9, &&opBA, &&opBB, &&opBC, &&opBD, &&opBE, &&opBF,
882 &&opC0, &&opC1, &&opC2, &&opC3, &&opC4, &&opC5, &&opC6, &&opC7,
883 &&opC8, &&opC9, &&opCA, &&opCB, &&opCC, &&opCD, &&opCE, &&opCF,
884 &&opD0, &&opD1, &&opD2, &&opD3, &&opD4, &&opD5, &&opD6, &&opD7,
885 &&opD8, &&opD9, &&opDA, &&opDB, &&opDC, &&opDD, &&opDE, &&opDF,
886 &&opE0, &&opE1, &&opE2, &&opE3, &&opE4, &&opE5, &&opE6, &&opE7,
887 &&opE8, &&opE9, &&opEA, &&opEB, &&opEC, &&opED, &&opEE, &&opEF,
888 &&opF0, &&opF1, &&opF2, &&opF3, &&opF4, &&opF5, &&opF6, &&opF7,
889 &&opF8, &&opF9, &&opFA, &&opFB, &&opFC, &&opFD, &&opFE, &&opFF,
895 setPC(getPC() + ii.length); \
897 T::R800Refresh(*this); \
898 if (!T::limitReached()) [[likely]] { \
900 unsigned address = getPC(); \
901 const byte* line = readCacheLine[address >> CacheLine::BITS]; \
902 if (uintptr_t(line) > 1) [[likely]] { \
903 T::template PRE_MEM<false, false>(address); \
904 T::template POST_MEM< false>(address); \
905 byte op = line[address]; \
906 goto *(opcodeTable[op]); \
915 setPC(getPC() + ii.length); \
917 T::R800Refresh(*this); \
918 assert(T::limitReached()); \
922 setPC(getPC() + ii.length); \
925 assert(T::limitReached()); \
929#define CASE(X) op##X:
934 setPC(getPC() + ii.length); \
936 T::R800Refresh(*this); \
937 if (!T::limitReached()) [[likely]] { \
943 setPC(getPC() + ii.length); \
945 T::R800Refresh(*this); \
946 assert(T::limitReached()); \
950 setPC(getPC() + ii.length); \
953 assert(T::limitReached()); \
956#define CASE(X) case 0x##X:
960#ifndef USE_COMPUTED_GOTO
964 byte opcodeMain = RDMEM_OPCODE<0>(T::CC_MAIN);
966#ifdef USE_COMPUTED_GOTO
967 goto *(opcodeTable[opcodeMain]);
970 unsigned address = getPC();
971 byte opcodeSlow = RDMEMslow<false, false>(address, T::CC_MAIN);
972 goto *(opcodeTable[opcodeSlow]);
976#ifndef USE_COMPUTED_GOTO
978 switch (opcodeMain) {
992CASE(08) { II ii = ex_af_af();
NEXT; }
997CASE(20) { II ii = jr(CondNZ());
NEXT; }
998CASE(28) { II ii = jr(CondZ ());
NEXT; }
999CASE(30) { II ii = jr(CondNC());
NEXT; }
1000CASE(38) { II ii = jr(CondC ());
NEXT; }
1001CASE(18) { II ii = jr(CondTrue());
NEXT; }
1003CASE(32) { II ii = ld_xbyte_a();
NEXT; }
1005CASE(22) { II ii = ld_xword_SS<HL,0>();
NEXT; }
1006CASE(2
A) { II ii = ld_SS_xword<HL,0>();
NEXT; }
1007CASE(02) { II ii = ld_SS_a<BC>();
NEXT; }
1008CASE(12) { II ii = ld_SS_a<DE>();
NEXT; }
1009CASE(1
A) { II ii = ld_a_SS<DE>();
NEXT; }
1010CASE(0
A) { II ii = ld_a_SS<BC>();
NEXT; }
1011CASE(03) { II ii = inc_SS<BC,0>();
NEXT; }
1012CASE(13) { II ii = inc_SS<DE,0>();
NEXT; }
1013CASE(23) { II ii = inc_SS<HL,0>();
NEXT; }
1014CASE(33) { II ii = inc_SS<SP,0>();
NEXT; }
1015CASE(0
B) { II ii = dec_SS<BC,0>();
NEXT; }
1016CASE(1
B) { II ii = dec_SS<DE,0>();
NEXT; }
1017CASE(2
B) { II ii = dec_SS<HL,0>();
NEXT; }
1018CASE(3
B) { II ii = dec_SS<SP,0>();
NEXT; }
1019CASE(09) { II ii = add_SS_TT<HL,BC,0>();
NEXT; }
1020CASE(19) { II ii = add_SS_TT<HL,DE,0>();
NEXT; }
1021CASE(29) { II ii = add_SS_SS<HL ,0>();
NEXT; }
1022CASE(39) { II ii = add_SS_TT<HL,SP,0>();
NEXT; }
1023CASE(01) { II ii = ld_SS_word<BC,0>();
NEXT; }
1024CASE(11) { II ii = ld_SS_word<DE,0>();
NEXT; }
1025CASE(21) { II ii = ld_SS_word<HL,0>();
NEXT; }
1026CASE(31) { II ii = ld_SS_word<SP,0>();
NEXT; }
1027CASE(04) { II ii = inc_R<B,0>();
NEXT; }
1029CASE(14) { II ii = inc_R<D,0>();
NEXT; }
1031CASE(24) { II ii = inc_R<H,0>();
NEXT; }
1034CASE(34) { II ii = inc_xhl();
NEXT; }
1035CASE(05) { II ii = dec_R<B,0>();
NEXT; }
1037CASE(15) { II ii = dec_R<D,0>();
NEXT; }
1039CASE(25) { II ii = dec_R<H,0>();
NEXT; }
1042CASE(35) { II ii = dec_xhl();
NEXT; }
1043CASE(06) { II ii = ld_R_byte<B,0>();
NEXT; }
1044CASE(0
E) { II ii = ld_R_byte<C,0>();
NEXT; }
1045CASE(16) { II ii = ld_R_byte<D,0>();
NEXT; }
1046CASE(1
E) { II ii = ld_R_byte<E,0>();
NEXT; }
1047CASE(26) { II ii = ld_R_byte<H,0>();
NEXT; }
1048CASE(2
E) { II ii = ld_R_byte<L,0>();
NEXT; }
1049CASE(3
E) { II ii = ld_R_byte<A,0>();
NEXT; }
1050CASE(36) { II ii = ld_xhl_byte();
NEXT; }
1052CASE(41) { II ii = ld_R_R<B,C,0>();
NEXT; }
1053CASE(42) { II ii = ld_R_R<B,D,0>();
NEXT; }
1054CASE(43) { II ii = ld_R_R<B,E,0>();
NEXT; }
1055CASE(44) { II ii = ld_R_R<B,H,0>();
NEXT; }
1056CASE(45) { II ii = ld_R_R<B,L,0>();
NEXT; }
1057CASE(47) { II ii = ld_R_R<B,A,0>();
NEXT; }
1058CASE(48) { II ii = ld_R_R<C,B,0>();
NEXT; }
1059CASE(4
A) { II ii = ld_R_R<C,D,0>();
NEXT; }
1060CASE(4
B) { II ii = ld_R_R<C,E,0>();
NEXT; }
1061CASE(4
C) { II ii = ld_R_R<C,H,0>();
NEXT; }
1062CASE(4
D) { II ii = ld_R_R<C,L,0>();
NEXT; }
1063CASE(4
F) { II ii = ld_R_R<C,A,0>();
NEXT; }
1064CASE(50) { II ii = ld_R_R<D,B,0>();
NEXT; }
1065CASE(51) { II ii = ld_R_R<D,C,0>();
NEXT; }
1066CASE(53) { II ii = ld_R_R<D,E,0>();
NEXT; }
1067CASE(54) { II ii = ld_R_R<D,H,0>();
NEXT; }
1068CASE(55) { II ii = ld_R_R<D,L,0>();
NEXT; }
1069CASE(57) { II ii = ld_R_R<D,A,0>();
NEXT; }
1070CASE(58) { II ii = ld_R_R<E,B,0>();
NEXT; }
1071CASE(59) { II ii = ld_R_R<E,C,0>();
NEXT; }
1072CASE(5
A) { II ii = ld_R_R<E,D,0>();
NEXT; }
1073CASE(5
C) { II ii = ld_R_R<E,H,0>();
NEXT; }
1074CASE(5
D) { II ii = ld_R_R<E,L,0>();
NEXT; }
1075CASE(5
F) { II ii = ld_R_R<E,A,0>();
NEXT; }
1076CASE(60) { II ii = ld_R_R<H,B,0>();
NEXT; }
1077CASE(61) { II ii = ld_R_R<H,C,0>();
NEXT; }
1078CASE(62) { II ii = ld_R_R<H,D,0>();
NEXT; }
1079CASE(63) { II ii = ld_R_R<H,E,0>();
NEXT; }
1080CASE(65) { II ii = ld_R_R<H,L,0>();
NEXT; }
1081CASE(67) { II ii = ld_R_R<H,A,0>();
NEXT; }
1082CASE(68) { II ii = ld_R_R<L,B,0>();
NEXT; }
1083CASE(69) { II ii = ld_R_R<L,C,0>();
NEXT; }
1084CASE(6
A) { II ii = ld_R_R<L,D,0>();
NEXT; }
1085CASE(6
B) { II ii = ld_R_R<L,E,0>();
NEXT; }
1086CASE(6
C) { II ii = ld_R_R<L,H,0>();
NEXT; }
1087CASE(6
F) { II ii = ld_R_R<L,A,0>();
NEXT; }
1088CASE(78) { II ii = ld_R_R<A,B,0>();
NEXT; }
1089CASE(79) { II ii = ld_R_R<A,C,0>();
NEXT; }
1090CASE(7
A) { II ii = ld_R_R<A,D,0>();
NEXT; }
1091CASE(7
B) { II ii = ld_R_R<A,E,0>();
NEXT; }
1092CASE(7
C) { II ii = ld_R_R<A,H,0>();
NEXT; }
1093CASE(7
D) { II ii = ld_R_R<A,L,0>();
NEXT; }
1094CASE(70) { II ii = ld_xhl_R<B>();
NEXT; }
1095CASE(71) { II ii = ld_xhl_R<C>();
NEXT; }
1096CASE(72) { II ii = ld_xhl_R<D>();
NEXT; }
1097CASE(73) { II ii = ld_xhl_R<E>();
NEXT; }
1098CASE(74) { II ii = ld_xhl_R<H>();
NEXT; }
1099CASE(75) { II ii = ld_xhl_R<L>();
NEXT; }
1100CASE(77) { II ii = ld_xhl_R<A>();
NEXT; }
1101CASE(46) { II ii = ld_R_xhl<B>();
NEXT; }
1102CASE(4
E) { II ii = ld_R_xhl<C>();
NEXT; }
1103CASE(56) { II ii = ld_R_xhl<D>();
NEXT; }
1104CASE(5
E) { II ii = ld_R_xhl<E>();
NEXT; }
1105CASE(66) { II ii = ld_R_xhl<H>();
NEXT; }
1106CASE(6
E) { II ii = ld_R_xhl<L>();
NEXT; }
1107CASE(7
E) { II ii = ld_R_xhl<A>();
NEXT; }
1110CASE(80) { II ii = add_a_R<B,0>();
NEXT; }
1111CASE(81) { II ii = add_a_R<C,0>();
NEXT; }
1112CASE(82) { II ii = add_a_R<D,0>();
NEXT; }
1113CASE(83) { II ii = add_a_R<E,0>();
NEXT; }
1114CASE(84) { II ii = add_a_R<H,0>();
NEXT; }
1115CASE(85) { II ii = add_a_R<L,0>();
NEXT; }
1116CASE(86) { II ii = add_a_xhl();
NEXT; }
1117CASE(87) { II ii = add_a_a();
NEXT; }
1118CASE(88) { II ii = adc_a_R<B,0>();
NEXT; }
1119CASE(89) { II ii = adc_a_R<C,0>();
NEXT; }
1120CASE(8
A) { II ii = adc_a_R<D,0>();
NEXT; }
1121CASE(8
B) { II ii = adc_a_R<E,0>();
NEXT; }
1122CASE(8
C) { II ii = adc_a_R<H,0>();
NEXT; }
1123CASE(8
D) { II ii = adc_a_R<L,0>();
NEXT; }
1126CASE(90) { II ii = sub_R<B,0>();
NEXT; }
1127CASE(91) { II ii = sub_R<C,0>();
NEXT; }
1128CASE(92) { II ii = sub_R<D,0>();
NEXT; }
1129CASE(93) { II ii = sub_R<E,0>();
NEXT; }
1130CASE(94) { II ii = sub_R<H,0>();
NEXT; }
1131CASE(95) { II ii = sub_R<L,0>();
NEXT; }
1132CASE(96) { II ii = sub_xhl();
NEXT; }
1134CASE(98) { II ii = sbc_a_R<B,0>();
NEXT; }
1135CASE(99) { II ii = sbc_a_R<C,0>();
NEXT; }
1136CASE(9
A) { II ii = sbc_a_R<D,0>();
NEXT; }
1137CASE(9
B) { II ii = sbc_a_R<E,0>();
NEXT; }
1138CASE(9
C) { II ii = sbc_a_R<H,0>();
NEXT; }
1139CASE(9
D) { II ii = sbc_a_R<L,0>();
NEXT; }
1142CASE(A0) { II ii = and_R<B,0>();
NEXT; }
1143CASE(A1) { II ii = and_R<C,0>();
NEXT; }
1145CASE(A3) { II ii = and_R<E,0>();
NEXT; }
1146CASE(A4) { II ii = and_R<H,0>();
NEXT; }
1147CASE(A5) { II ii = and_R<L,0>();
NEXT; }
1148CASE(A6) { II ii = and_xhl();
NEXT; }
1150CASE(A8) { II ii = xor_R<B,0>();
NEXT; }
1151CASE(A9) { II ii = xor_R<C,0>();
NEXT; }
1152CASE(AA) { II ii = xor_R<D,0>();
NEXT; }
1153CASE(AB) { II ii = xor_R<E,0>();
NEXT; }
1154CASE(AC) { II ii = xor_R<H,0>();
NEXT; }
1155CASE(AD) { II ii = xor_R<L,0>();
NEXT; }
1156CASE(AE) { II ii = xor_xhl();
NEXT; }
1166CASE(B8) { II ii = cp_R<B,0>();
NEXT; }
1167CASE(B9) { II ii = cp_R<C,0>();
NEXT; }
1168CASE(BA) { II ii = cp_R<D,0>();
NEXT; }
1169CASE(BB) { II ii = cp_R<E,0>();
NEXT; }
1171CASE(BD) { II ii = cp_R<L,0>();
NEXT; }
1172CASE(BE) { II ii = cp_xhl();
NEXT; }
1175CASE(D3) { II ii = out_byte_a();
NEXT; }
1176CASE(DB) { II ii = in_a_byte();
NEXT; }
1178CASE(E3) { II ii = ex_xsp_SS<HL,0>();
NEXT; }
1179CASE(EB) { II ii = ex_de_hl();
NEXT; }
1180CASE(E9) { II ii = jp_SS<HL,0>();
NEXT; }
1181CASE(F9) { II ii = ld_sp_SS<HL,0>();
NEXT; }
1184CASE(C6) { II ii = add_a_byte();
NEXT; }
1185CASE(CE) { II ii = adc_a_byte();
NEXT; }
1186CASE(D6) { II ii = sub_byte();
NEXT; }
1188CASE(E6) { II ii = and_byte();
NEXT; }
1189CASE(EE) { II ii = xor_byte();
NEXT; }
1190CASE(F6) { II ii = or_byte();
NEXT; }
1191CASE(FE) { II ii = cp_byte();
NEXT; }
1192CASE(C0) { II ii = ret(CondNZ());
NEXT; }
1193CASE(C8) { II ii = ret(CondZ ());
NEXT; }
1194CASE(D0) { II ii = ret(CondNC());
NEXT; }
1195CASE(D8) { II ii = ret(CondC ());
NEXT; }
1196CASE(E0) { II ii = ret(CondPO());
NEXT; }
1197CASE(E8) { II ii = ret(CondPE());
NEXT; }
1198CASE(F0) { II ii = ret(CondP ());
NEXT; }
1199CASE(F8) { II ii = ret(CondM ());
NEXT; }
1201CASE(C2) { II ii = jp(CondNZ());
NEXT; }
1202CASE(CA) { II ii = jp(CondZ ());
NEXT; }
1203CASE(D2) { II ii = jp(CondNC());
NEXT; }
1204CASE(DA) { II ii = jp(CondC ());
NEXT; }
1205CASE(E2) { II ii = jp(CondPO());
NEXT; }
1206CASE(EA) { II ii = jp(CondPE());
NEXT; }
1207CASE(F2) { II ii = jp(CondP ());
NEXT; }
1208CASE(FA) { II ii = jp(CondM ());
NEXT; }
1209CASE(C3) { II ii = jp(CondTrue());
NEXT; }
1210CASE(C4) { II ii = call(CondNZ());
NEXT; }
1211CASE(CC) { II ii = call(CondZ ());
NEXT; }
1212CASE(D4) { II ii = call(CondNC());
NEXT; }
1213CASE(DC) { II ii = call(CondC ());
NEXT; }
1214CASE(E4) { II ii = call(CondPO());
NEXT; }
1215CASE(EC) { II ii = call(CondPE());
NEXT; }
1216CASE(F4) { II ii = call(CondP ());
NEXT; }
1217CASE(FC) { II ii = call(CondM ());
NEXT; }
1218CASE(CD) { II ii = call(CondTrue());
NEXT; }
1219CASE(C1) { II ii = pop_SS <BC,0>();
NEXT; }
1220CASE(D1) { II ii = pop_SS <DE,0>();
NEXT; }
1221CASE(E1) { II ii = pop_SS <HL,0>();
NEXT; }
1222CASE(F1) { II ii = pop_SS <AF,0>();
NEXT; }
1223CASE(C5) { II ii = push_SS<BC,0>();
NEXT; }
1224CASE(D5) { II ii = push_SS<DE,0>();
NEXT; }
1225CASE(E5) { II ii = push_SS<HL,0>();
NEXT; }
1226CASE(F5) { II ii = push_SS<AF,0>();
NEXT; }
1227CASE(C7) { II ii = rst<0x00>();
NEXT; }
1228CASE(CF) { II ii = rst<0x08>();
NEXT; }
1229CASE(D7) { II ii = rst<0x10>();
NEXT; }
1230CASE(DF) { II ii = rst<0x18>();
NEXT; }
1231CASE(E7) { II ii = rst<0x20>();
NEXT; }
1232CASE(EF) { II ii = rst<0x28>();
NEXT; }
1233CASE(F7) { II ii = rst<0x30>();
NEXT; }
1234CASE(FF) { II ii = rst<0x38>();
NEXT; }
1237 byte cb_opcode = RDMEM_OPCODE<0>(T::CC_PREFIX);
1239 switch (cb_opcode) {
1240 case 0x00: { II ii = rlc_R<B>();
NEXT; }
1241 case 0x01: { II ii = rlc_R<C>();
NEXT; }
1242 case 0x02: { II ii = rlc_R<D>();
NEXT; }
1243 case 0x03: { II ii = rlc_R<E>();
NEXT; }
1244 case 0x04: { II ii = rlc_R<H>();
NEXT; }
1245 case 0x05: { II ii = rlc_R<L>();
NEXT; }
1246 case 0x07: { II ii = rlc_R<A>();
NEXT; }
1247 case 0x06: { II ii = rlc_xhl();
NEXT; }
1248 case 0x08: { II ii = rrc_R<B>();
NEXT; }
1249 case 0x09: { II ii = rrc_R<C>();
NEXT; }
1250 case 0x0a: { II ii = rrc_R<D>();
NEXT; }
1251 case 0x0b: { II ii = rrc_R<E>();
NEXT; }
1252 case 0x0c: { II ii = rrc_R<H>();
NEXT; }
1253 case 0x0d: { II ii = rrc_R<L>();
NEXT; }
1254 case 0x0f: { II ii = rrc_R<A>();
NEXT; }
1255 case 0x0e: { II ii = rrc_xhl();
NEXT; }
1256 case 0x10: { II ii = rl_R<B>();
NEXT; }
1257 case 0x11: { II ii = rl_R<C>();
NEXT; }
1258 case 0x12: { II ii = rl_R<D>();
NEXT; }
1259 case 0x13: { II ii = rl_R<E>();
NEXT; }
1260 case 0x14: { II ii = rl_R<H>();
NEXT; }
1261 case 0x15: { II ii = rl_R<L>();
NEXT; }
1262 case 0x17: { II ii = rl_R<A>();
NEXT; }
1263 case 0x16: { II ii = rl_xhl();
NEXT; }
1264 case 0x18: { II ii = rr_R<B>();
NEXT; }
1265 case 0x19: { II ii = rr_R<C>();
NEXT; }
1266 case 0x1a: { II ii = rr_R<D>();
NEXT; }
1267 case 0x1b: { II ii = rr_R<E>();
NEXT; }
1268 case 0x1c: { II ii = rr_R<H>();
NEXT; }
1269 case 0x1d: { II ii = rr_R<L>();
NEXT; }
1270 case 0x1f: { II ii = rr_R<A>();
NEXT; }
1271 case 0x1e: { II ii = rr_xhl();
NEXT; }
1272 case 0x20: { II ii = sla_R<B>();
NEXT; }
1273 case 0x21: { II ii = sla_R<C>();
NEXT; }
1274 case 0x22: { II ii = sla_R<D>();
NEXT; }
1275 case 0x23: { II ii = sla_R<E>();
NEXT; }
1276 case 0x24: { II ii = sla_R<H>();
NEXT; }
1277 case 0x25: { II ii = sla_R<L>();
NEXT; }
1278 case 0x27: { II ii = sla_R<A>();
NEXT; }
1279 case 0x26: { II ii = sla_xhl();
NEXT; }
1280 case 0x28: { II ii = sra_R<B>();
NEXT; }
1281 case 0x29: { II ii = sra_R<C>();
NEXT; }
1282 case 0x2a: { II ii = sra_R<D>();
NEXT; }
1283 case 0x2b: { II ii = sra_R<E>();
NEXT; }
1284 case 0x2c: { II ii = sra_R<H>();
NEXT; }
1285 case 0x2d: { II ii = sra_R<L>();
NEXT; }
1286 case 0x2f: { II ii = sra_R<A>();
NEXT; }
1287 case 0x2e: { II ii = sra_xhl();
NEXT; }
1288 case 0x30: { II ii = T::IS_R800 ? sla_R<B>() : sll_R<
B>();
NEXT; }
1289 case 0x31: { II ii = T::IS_R800 ? sla_R<C>() : sll_R<
C>();
NEXT; }
1290 case 0x32: { II ii = T::IS_R800 ? sla_R<D>() : sll_R<
D>();
NEXT; }
1291 case 0x33: { II ii = T::IS_R800 ? sla_R<E>() : sll_R<
E>();
NEXT; }
1292 case 0x34: { II ii = T::IS_R800 ? sla_R<H>() : sll_R<
H>();
NEXT; }
1293 case 0x35: { II ii = T::IS_R800 ? sla_R<L>() : sll_R<
L>();
NEXT; }
1294 case 0x37: { II ii = T::IS_R800 ? sla_R<A>() : sll_R<
A>();
NEXT; }
1295 case 0x36: { II ii = T::IS_R800 ? sla_xhl() : sll_xhl();
NEXT; }
1296 case 0x38: { II ii = srl_R<B>();
NEXT; }
1297 case 0x39: { II ii = srl_R<C>();
NEXT; }
1298 case 0x3a: { II ii = srl_R<D>();
NEXT; }
1299 case 0x3b: { II ii = srl_R<E>();
NEXT; }
1300 case 0x3c: { II ii = srl_R<H>();
NEXT; }
1301 case 0x3d: { II ii = srl_R<L>();
NEXT; }
1302 case 0x3f: { II ii = srl_R<A>();
NEXT; }
1303 case 0x3e: { II ii = srl_xhl();
NEXT; }
1305 case 0x40: { II ii = bit_N_R<0,B>();
NEXT; }
1306 case 0x41: { II ii = bit_N_R<0,C>();
NEXT; }
1307 case 0x42: { II ii = bit_N_R<0,D>();
NEXT; }
1308 case 0x43: { II ii = bit_N_R<0,E>();
NEXT; }
1309 case 0x44: { II ii = bit_N_R<0,H>();
NEXT; }
1310 case 0x45: { II ii = bit_N_R<0,L>();
NEXT; }
1311 case 0x47: { II ii = bit_N_R<0,A>();
NEXT; }
1312 case 0x48: { II ii = bit_N_R<1,B>();
NEXT; }
1313 case 0x49: { II ii = bit_N_R<1,C>();
NEXT; }
1314 case 0x4a: { II ii = bit_N_R<1,D>();
NEXT; }
1315 case 0x4b: { II ii = bit_N_R<1,E>();
NEXT; }
1316 case 0x4c: { II ii = bit_N_R<1,H>();
NEXT; }
1317 case 0x4d: { II ii = bit_N_R<1,L>();
NEXT; }
1318 case 0x4f: { II ii = bit_N_R<1,A>();
NEXT; }
1319 case 0x50: { II ii = bit_N_R<2,B>();
NEXT; }
1320 case 0x51: { II ii = bit_N_R<2,C>();
NEXT; }
1321 case 0x52: { II ii = bit_N_R<2,D>();
NEXT; }
1322 case 0x53: { II ii = bit_N_R<2,E>();
NEXT; }
1323 case 0x54: { II ii = bit_N_R<2,H>();
NEXT; }
1324 case 0x55: { II ii = bit_N_R<2,L>();
NEXT; }
1325 case 0x57: { II ii = bit_N_R<2,A>();
NEXT; }
1326 case 0x58: { II ii = bit_N_R<3,B>();
NEXT; }
1327 case 0x59: { II ii = bit_N_R<3,C>();
NEXT; }
1328 case 0x5a: { II ii = bit_N_R<3,D>();
NEXT; }
1329 case 0x5b: { II ii = bit_N_R<3,E>();
NEXT; }
1330 case 0x5c: { II ii = bit_N_R<3,H>();
NEXT; }
1331 case 0x5d: { II ii = bit_N_R<3,L>();
NEXT; }
1332 case 0x5f: { II ii = bit_N_R<3,A>();
NEXT; }
1333 case 0x60: { II ii = bit_N_R<4,B>();
NEXT; }
1334 case 0x61: { II ii = bit_N_R<4,C>();
NEXT; }
1335 case 0x62: { II ii = bit_N_R<4,D>();
NEXT; }
1336 case 0x63: { II ii = bit_N_R<4,E>();
NEXT; }
1337 case 0x64: { II ii = bit_N_R<4,H>();
NEXT; }
1338 case 0x65: { II ii = bit_N_R<4,L>();
NEXT; }
1339 case 0x67: { II ii = bit_N_R<4,A>();
NEXT; }
1340 case 0x68: { II ii = bit_N_R<5,B>();
NEXT; }
1341 case 0x69: { II ii = bit_N_R<5,C>();
NEXT; }
1342 case 0x6a: { II ii = bit_N_R<5,D>();
NEXT; }
1343 case 0x6b: { II ii = bit_N_R<5,E>();
NEXT; }
1344 case 0x6c: { II ii = bit_N_R<5,H>();
NEXT; }
1345 case 0x6d: { II ii = bit_N_R<5,L>();
NEXT; }
1346 case 0x6f: { II ii = bit_N_R<5,A>();
NEXT; }
1347 case 0x70: { II ii = bit_N_R<6,B>();
NEXT; }
1348 case 0x71: { II ii = bit_N_R<6,C>();
NEXT; }
1349 case 0x72: { II ii = bit_N_R<6,D>();
NEXT; }
1350 case 0x73: { II ii = bit_N_R<6,E>();
NEXT; }
1351 case 0x74: { II ii = bit_N_R<6,H>();
NEXT; }
1352 case 0x75: { II ii = bit_N_R<6,L>();
NEXT; }
1353 case 0x77: { II ii = bit_N_R<6,A>();
NEXT; }
1354 case 0x78: { II ii = bit_N_R<7,B>();
NEXT; }
1355 case 0x79: { II ii = bit_N_R<7,C>();
NEXT; }
1356 case 0x7a: { II ii = bit_N_R<7,D>();
NEXT; }
1357 case 0x7b: { II ii = bit_N_R<7,E>();
NEXT; }
1358 case 0x7c: { II ii = bit_N_R<7,H>();
NEXT; }
1359 case 0x7d: { II ii = bit_N_R<7,L>();
NEXT; }
1360 case 0x7f: { II ii = bit_N_R<7,A>();
NEXT; }
1361 case 0x46: { II ii = bit_N_xhl<0>();
NEXT; }
1362 case 0x4e: { II ii = bit_N_xhl<1>();
NEXT; }
1363 case 0x56: { II ii = bit_N_xhl<2>();
NEXT; }
1364 case 0x5e: { II ii = bit_N_xhl<3>();
NEXT; }
1365 case 0x66: { II ii = bit_N_xhl<4>();
NEXT; }
1366 case 0x6e: { II ii = bit_N_xhl<5>();
NEXT; }
1367 case 0x76: { II ii = bit_N_xhl<6>();
NEXT; }
1368 case 0x7e: { II ii = bit_N_xhl<7>();
NEXT; }
1370 case 0x80: { II ii = res_N_R<0,B>();
NEXT; }
1371 case 0x81: { II ii = res_N_R<0,C>();
NEXT; }
1372 case 0x82: { II ii = res_N_R<0,D>();
NEXT; }
1373 case 0x83: { II ii = res_N_R<0,E>();
NEXT; }
1374 case 0x84: { II ii = res_N_R<0,H>();
NEXT; }
1375 case 0x85: { II ii = res_N_R<0,L>();
NEXT; }
1376 case 0x87: { II ii = res_N_R<0,A>();
NEXT; }
1377 case 0x88: { II ii = res_N_R<1,B>();
NEXT; }
1378 case 0x89: { II ii = res_N_R<1,C>();
NEXT; }
1379 case 0x8a: { II ii = res_N_R<1,D>();
NEXT; }
1380 case 0x8b: { II ii = res_N_R<1,E>();
NEXT; }
1381 case 0x8c: { II ii = res_N_R<1,H>();
NEXT; }
1382 case 0x8d: { II ii = res_N_R<1,L>();
NEXT; }
1383 case 0x8f: { II ii = res_N_R<1,A>();
NEXT; }
1384 case 0x90: { II ii = res_N_R<2,B>();
NEXT; }
1385 case 0x91: { II ii = res_N_R<2,C>();
NEXT; }
1386 case 0x92: { II ii = res_N_R<2,D>();
NEXT; }
1387 case 0x93: { II ii = res_N_R<2,E>();
NEXT; }
1388 case 0x94: { II ii = res_N_R<2,H>();
NEXT; }
1389 case 0x95: { II ii = res_N_R<2,L>();
NEXT; }
1390 case 0x97: { II ii = res_N_R<2,A>();
NEXT; }
1391 case 0x98: { II ii = res_N_R<3,B>();
NEXT; }
1392 case 0x99: { II ii = res_N_R<3,C>();
NEXT; }
1393 case 0x9a: { II ii = res_N_R<3,D>();
NEXT; }
1394 case 0x9b: { II ii = res_N_R<3,E>();
NEXT; }
1395 case 0x9c: { II ii = res_N_R<3,H>();
NEXT; }
1396 case 0x9d: { II ii = res_N_R<3,L>();
NEXT; }
1397 case 0x9f: { II ii = res_N_R<3,A>();
NEXT; }
1398 case 0xa0: { II ii = res_N_R<4,B>();
NEXT; }
1399 case 0xa1: { II ii = res_N_R<4,C>();
NEXT; }
1400 case 0xa2: { II ii = res_N_R<4,D>();
NEXT; }
1401 case 0xa3: { II ii = res_N_R<4,E>();
NEXT; }
1402 case 0xa4: { II ii = res_N_R<4,H>();
NEXT; }
1403 case 0xa5: { II ii = res_N_R<4,L>();
NEXT; }
1404 case 0xa7: { II ii = res_N_R<4,A>();
NEXT; }
1405 case 0xa8: { II ii = res_N_R<5,B>();
NEXT; }
1406 case 0xa9: { II ii = res_N_R<5,C>();
NEXT; }
1407 case 0xaa: { II ii = res_N_R<5,D>();
NEXT; }
1408 case 0xab: { II ii = res_N_R<5,E>();
NEXT; }
1409 case 0xac: { II ii = res_N_R<5,H>();
NEXT; }
1410 case 0xad: { II ii = res_N_R<5,L>();
NEXT; }
1411 case 0xaf: { II ii = res_N_R<5,A>();
NEXT; }
1412 case 0xb0: { II ii = res_N_R<6,B>();
NEXT; }
1413 case 0xb1: { II ii = res_N_R<6,C>();
NEXT; }
1414 case 0xb2: { II ii = res_N_R<6,D>();
NEXT; }
1415 case 0xb3: { II ii = res_N_R<6,E>();
NEXT; }
1416 case 0xb4: { II ii = res_N_R<6,H>();
NEXT; }
1417 case 0xb5: { II ii = res_N_R<6,L>();
NEXT; }
1418 case 0xb7: { II ii = res_N_R<6,A>();
NEXT; }
1419 case 0xb8: { II ii = res_N_R<7,B>();
NEXT; }
1420 case 0xb9: { II ii = res_N_R<7,C>();
NEXT; }
1421 case 0xba: { II ii = res_N_R<7,D>();
NEXT; }
1422 case 0xbb: { II ii = res_N_R<7,E>();
NEXT; }
1423 case 0xbc: { II ii = res_N_R<7,H>();
NEXT; }
1424 case 0xbd: { II ii = res_N_R<7,L>();
NEXT; }
1425 case 0xbf: { II ii = res_N_R<7,A>();
NEXT; }
1426 case 0x86: { II ii = res_N_xhl<0>();
NEXT; }
1427 case 0x8e: { II ii = res_N_xhl<1>();
NEXT; }
1428 case 0x96: { II ii = res_N_xhl<2>();
NEXT; }
1429 case 0x9e: { II ii = res_N_xhl<3>();
NEXT; }
1430 case 0xa6: { II ii = res_N_xhl<4>();
NEXT; }
1431 case 0xae: { II ii = res_N_xhl<5>();
NEXT; }
1432 case 0xb6: { II ii = res_N_xhl<6>();
NEXT; }
1433 case 0xbe: { II ii = res_N_xhl<7>();
NEXT; }
1435 case 0xc0: { II ii = set_N_R<0,B>();
NEXT; }
1436 case 0xc1: { II ii = set_N_R<0,C>();
NEXT; }
1437 case 0xc2: { II ii = set_N_R<0,D>();
NEXT; }
1438 case 0xc3: { II ii = set_N_R<0,E>();
NEXT; }
1439 case 0xc4: { II ii = set_N_R<0,H>();
NEXT; }
1440 case 0xc5: { II ii = set_N_R<0,L>();
NEXT; }
1441 case 0xc7: { II ii = set_N_R<0,A>();
NEXT; }
1442 case 0xc8: { II ii = set_N_R<1,B>();
NEXT; }
1443 case 0xc9: { II ii = set_N_R<1,C>();
NEXT; }
1444 case 0xca: { II ii = set_N_R<1,D>();
NEXT; }
1445 case 0xcb: { II ii = set_N_R<1,E>();
NEXT; }
1446 case 0xcc: { II ii = set_N_R<1,H>();
NEXT; }
1447 case 0xcd: { II ii = set_N_R<1,L>();
NEXT; }
1448 case 0xcf: { II ii = set_N_R<1,A>();
NEXT; }
1449 case 0xd0: { II ii = set_N_R<2,B>();
NEXT; }
1450 case 0xd1: { II ii = set_N_R<2,C>();
NEXT; }
1451 case 0xd2: { II ii = set_N_R<2,D>();
NEXT; }
1452 case 0xd3: { II ii = set_N_R<2,E>();
NEXT; }
1453 case 0xd4: { II ii = set_N_R<2,H>();
NEXT; }
1454 case 0xd5: { II ii = set_N_R<2,L>();
NEXT; }
1455 case 0xd7: { II ii = set_N_R<2,A>();
NEXT; }
1456 case 0xd8: { II ii = set_N_R<3,B>();
NEXT; }
1457 case 0xd9: { II ii = set_N_R<3,C>();
NEXT; }
1458 case 0xda: { II ii = set_N_R<3,D>();
NEXT; }
1459 case 0xdb: { II ii = set_N_R<3,E>();
NEXT; }
1460 case 0xdc: { II ii = set_N_R<3,H>();
NEXT; }
1461 case 0xdd: { II ii = set_N_R<3,L>();
NEXT; }
1462 case 0xdf: { II ii = set_N_R<3,A>();
NEXT; }
1463 case 0xe0: { II ii = set_N_R<4,B>();
NEXT; }
1464 case 0xe1: { II ii = set_N_R<4,C>();
NEXT; }
1465 case 0xe2: { II ii = set_N_R<4,D>();
NEXT; }
1466 case 0xe3: { II ii = set_N_R<4,E>();
NEXT; }
1467 case 0xe4: { II ii = set_N_R<4,H>();
NEXT; }
1468 case 0xe5: { II ii = set_N_R<4,L>();
NEXT; }
1469 case 0xe7: { II ii = set_N_R<4,A>();
NEXT; }
1470 case 0xe8: { II ii = set_N_R<5,B>();
NEXT; }
1471 case 0xe9: { II ii = set_N_R<5,C>();
NEXT; }
1472 case 0xea: { II ii = set_N_R<5,D>();
NEXT; }
1473 case 0xeb: { II ii = set_N_R<5,E>();
NEXT; }
1474 case 0xec: { II ii = set_N_R<5,H>();
NEXT; }
1475 case 0xed: { II ii = set_N_R<5,L>();
NEXT; }
1476 case 0xef: { II ii = set_N_R<5,A>();
NEXT; }
1477 case 0xf0: { II ii = set_N_R<6,B>();
NEXT; }
1478 case 0xf1: { II ii = set_N_R<6,C>();
NEXT; }
1479 case 0xf2: { II ii = set_N_R<6,D>();
NEXT; }
1480 case 0xf3: { II ii = set_N_R<6,E>();
NEXT; }
1481 case 0xf4: { II ii = set_N_R<6,H>();
NEXT; }
1482 case 0xf5: { II ii = set_N_R<6,L>();
NEXT; }
1483 case 0xf7: { II ii = set_N_R<6,A>();
NEXT; }
1484 case 0xf8: { II ii = set_N_R<7,B>();
NEXT; }
1485 case 0xf9: { II ii = set_N_R<7,C>();
NEXT; }
1486 case 0xfa: { II ii = set_N_R<7,D>();
NEXT; }
1487 case 0xfb: { II ii = set_N_R<7,E>();
NEXT; }
1488 case 0xfc: { II ii = set_N_R<7,H>();
NEXT; }
1489 case 0xfd: { II ii = set_N_R<7,L>();
NEXT; }
1490 case 0xff: { II ii = set_N_R<7,A>();
NEXT; }
1491 case 0xc6: { II ii = set_N_xhl<0>();
NEXT; }
1492 case 0xce: { II ii = set_N_xhl<1>();
NEXT; }
1493 case 0xd6: { II ii = set_N_xhl<2>();
NEXT; }
1494 case 0xde: { II ii = set_N_xhl<3>();
NEXT; }
1495 case 0xe6: { II ii = set_N_xhl<4>();
NEXT; }
1496 case 0xee: { II ii = set_N_xhl<5>();
NEXT; }
1497 case 0xf6: { II ii = set_N_xhl<6>();
NEXT; }
1498 case 0xfe: { II ii = set_N_xhl<7>();
NEXT; }
1504 byte ed_opcode = RDMEM_OPCODE<0>(T::CC_PREFIX);
1506 switch (ed_opcode) {
1507 case 0x00:
case 0x01:
case 0x02:
case 0x03:
1508 case 0x04:
case 0x05:
case 0x06:
case 0x07:
1509 case 0x08:
case 0x09:
case 0x0a:
case 0x0b:
1510 case 0x0c:
case 0x0d:
case 0x0e:
case 0x0f:
1511 case 0x10:
case 0x11:
case 0x12:
case 0x13:
1512 case 0x14:
case 0x15:
case 0x16:
case 0x17:
1513 case 0x18:
case 0x19:
case 0x1a:
case 0x1b:
1514 case 0x1c:
case 0x1d:
case 0x1e:
case 0x1f:
1515 case 0x20:
case 0x21:
case 0x22:
case 0x23:
1516 case 0x24:
case 0x25:
case 0x26:
case 0x27:
1517 case 0x28:
case 0x29:
case 0x2a:
case 0x2b:
1518 case 0x2c:
case 0x2d:
case 0x2e:
case 0x2f:
1519 case 0x30:
case 0x31:
case 0x32:
case 0x33:
1520 case 0x34:
case 0x35:
case 0x36:
case 0x37:
1521 case 0x38:
case 0x39:
case 0x3a:
case 0x3b:
1522 case 0x3c:
case 0x3d:
case 0x3e:
case 0x3f:
1524 case 0x77:
case 0x7f:
1526 case 0x80:
case 0x81:
case 0x82:
case 0x83:
1527 case 0x84:
case 0x85:
case 0x86:
case 0x87:
1528 case 0x88:
case 0x89:
case 0x8a:
case 0x8b:
1529 case 0x8c:
case 0x8d:
case 0x8e:
case 0x8f:
1530 case 0x90:
case 0x91:
case 0x92:
case 0x93:
1531 case 0x94:
case 0x95:
case 0x96:
case 0x97:
1532 case 0x98:
case 0x99:
case 0x9a:
case 0x9b:
1533 case 0x9c:
case 0x9d:
case 0x9e:
case 0x9f:
1534 case 0xa4:
case 0xa5:
case 0xa6:
case 0xa7:
1535 case 0xac:
case 0xad:
case 0xae:
case 0xaf:
1536 case 0xb4:
case 0xb5:
case 0xb6:
case 0xb7:
1537 case 0xbc:
case 0xbd:
case 0xbe:
case 0xbf:
1539 case 0xc0:
case 0xc2:
1540 case 0xc4:
case 0xc5:
case 0xc6:
case 0xc7:
1541 case 0xc8:
case 0xca:
case 0xcb:
1542 case 0xcc:
case 0xcd:
case 0xce:
case 0xcf:
1543 case 0xd0:
case 0xd2:
case 0xd3:
1544 case 0xd4:
case 0xd5:
case 0xd6:
case 0xd7:
1545 case 0xd8:
case 0xda:
case 0xdb:
1546 case 0xdc:
case 0xdd:
case 0xde:
case 0xdf:
1547 case 0xe0:
case 0xe1:
case 0xe2:
case 0xe3:
1548 case 0xe4:
case 0xe5:
case 0xe6:
case 0xe7:
1549 case 0xe8:
case 0xe9:
case 0xea:
case 0xeb:
1550 case 0xec:
case 0xed:
case 0xee:
case 0xef:
1551 case 0xf0:
case 0xf1:
case 0xf2:
1552 case 0xf4:
case 0xf5:
case 0xf6:
case 0xf7:
1553 case 0xf8:
case 0xf9:
case 0xfa:
case 0xfb:
1554 case 0xfc:
case 0xfd:
case 0xfe:
case 0xff:
1555 { II ii = nop();
NEXT; }
1557 case 0x40: { II ii = in_R_c<B>();
NEXT; }
1558 case 0x48: { II ii = in_R_c<C>();
NEXT; }
1559 case 0x50: { II ii = in_R_c<D>();
NEXT; }
1560 case 0x58: { II ii = in_R_c<E>();
NEXT; }
1561 case 0x60: { II ii = in_R_c<H>();
NEXT; }
1562 case 0x68: { II ii = in_R_c<L>();
NEXT; }
1563 case 0x70: { II ii = in_R_c<DUMMY>();
NEXT; }
1564 case 0x78: { II ii = in_R_c<A>();
NEXT; }
1566 case 0x41: { II ii = out_c_R<B>();
NEXT; }
1567 case 0x49: { II ii = out_c_R<C>();
NEXT; }
1568 case 0x51: { II ii = out_c_R<D>();
NEXT; }
1569 case 0x59: { II ii = out_c_R<E>();
NEXT; }
1570 case 0x61: { II ii = out_c_R<H>();
NEXT; }
1571 case 0x69: { II ii = out_c_R<L>();
NEXT; }
1572 case 0x71: { II ii = out_c_0();
NEXT; }
1573 case 0x79: { II ii = out_c_R<A>();
NEXT; }
1575 case 0x42: { II ii = sbc_hl_SS<BC>();
NEXT; }
1576 case 0x52: { II ii = sbc_hl_SS<DE>();
NEXT; }
1577 case 0x62: { II ii = sbc_hl_hl ();
NEXT; }
1578 case 0x72: { II ii = sbc_hl_SS<SP>();
NEXT; }
1580 case 0x4a: { II ii = adc_hl_SS<BC>();
NEXT; }
1581 case 0x5a: { II ii = adc_hl_SS<DE>();
NEXT; }
1582 case 0x6a: { II ii = adc_hl_hl ();
NEXT; }
1583 case 0x7a: { II ii = adc_hl_SS<SP>();
NEXT; }
1585 case 0x43: { II ii = ld_xword_SS_ED<BC>();
NEXT; }
1586 case 0x53: { II ii = ld_xword_SS_ED<DE>();
NEXT; }
1587 case 0x63: { II ii = ld_xword_SS_ED<HL>();
NEXT; }
1588 case 0x73: { II ii = ld_xword_SS_ED<SP>();
NEXT; }
1590 case 0x4b: { II ii = ld_SS_xword_ED<BC>();
NEXT; }
1591 case 0x5b: { II ii = ld_SS_xword_ED<DE>();
NEXT; }
1592 case 0x6b: { II ii = ld_SS_xword_ED<HL>();
NEXT; }
1593 case 0x7b: { II ii = ld_SS_xword_ED<SP>();
NEXT; }
1595 case 0x47: { II ii = ld_i_a();
NEXT; }
1596 case 0x4f: { II ii = ld_r_a();
NEXT; }
1597 case 0x57: { II ii = ld_a_IR<REG_I>();
if (T::IS_R800) {
NEXT; }
else {
NEXT_STOP; }}
1598 case 0x5f: { II ii = ld_a_IR<REG_R>();
if (T::IS_R800) {
NEXT; }
else {
NEXT_STOP; }}
1600 case 0x67: { II ii = rrd();
NEXT; }
1601 case 0x6f: { II ii = rld();
NEXT; }
1603 case 0x45:
case 0x4d:
case 0x55:
case 0x5d:
1604 case 0x65:
case 0x6d:
case 0x75:
case 0x7d:
1606 case 0x46:
case 0x4e:
case 0x66:
case 0x6e:
1607 { II ii = im_N<0>();
NEXT; }
1608 case 0x56:
case 0x76:
1609 { II ii = im_N<1>();
NEXT; }
1610 case 0x5e:
case 0x7e:
1611 { II ii = im_N<2>();
NEXT; }
1612 case 0x44:
case 0x4c:
case 0x54:
case 0x5c:
1613 case 0x64:
case 0x6c:
case 0x74:
case 0x7c:
1614 { II ii = neg();
NEXT; }
1616 case 0xa0: { II ii = ldi();
NEXT; }
1617 case 0xa1: { II ii = cpi();
NEXT; }
1618 case 0xa2: { II ii = ini();
NEXT; }
1619 case 0xa3: { II ii = outi();
NEXT; }
1620 case 0xa8: { II ii = ldd();
NEXT; }
1621 case 0xa9: { II ii = cpd();
NEXT; }
1622 case 0xaa: { II ii = ind();
NEXT; }
1623 case 0xab: { II ii = outd();
NEXT; }
1624 case 0xb0: { II ii = ldir();
NEXT; }
1625 case 0xb1: { II ii = cpir();
NEXT; }
1626 case 0xb2: { II ii = inir();
NEXT; }
1627 case 0xb3: { II ii = otir();
NEXT; }
1628 case 0xb8: { II ii = lddr();
NEXT; }
1629 case 0xb9: { II ii = cpdr();
NEXT; }
1630 case 0xba: { II ii = indr();
NEXT; }
1631 case 0xbb: { II ii = otdr();
NEXT; }
1633 case 0xc1: { II ii = T::IS_R800 ? mulub_a_R<B>() : nop();
NEXT; }
1634 case 0xc9: { II ii = T::IS_R800 ? mulub_a_R<C>() : nop();
NEXT; }
1635 case 0xd1: { II ii = T::IS_R800 ? mulub_a_R<D>() : nop();
NEXT; }
1636 case 0xd9: { II ii = T::IS_R800 ? mulub_a_R<E>() : nop();
NEXT; }
1637 case 0xc3: { II ii = T::IS_R800 ? muluw_hl_SS<BC>() : nop();
NEXT; }
1638 case 0xf3: { II ii = T::IS_R800 ? muluw_hl_SS<SP>() : nop();
NEXT; }
1645 byte opcodeDD = RDMEM_OPCODE<0>(T::CC_DD + T::CC_MAIN);
1821 if constexpr (T::IS_R800) {
1822 II ii = nop<T::CC_DD>();
NEXT;
1825 #ifdef USE_COMPUTED_GOTO
1826 goto *(opcodeTable[opcodeDD]);
1828 opcodeMain = opcodeDD;
1833 case 0x09: { II ii = add_SS_TT<IX,BC,T::CC_DD>();
NEXT; }
1834 case 0x19: { II ii = add_SS_TT<IX,DE,T::CC_DD>();
NEXT; }
1835 case 0x29: { II ii = add_SS_SS<IX ,T::CC_DD>();
NEXT; }
1836 case 0x39: { II ii = add_SS_TT<IX,SP,T::CC_DD>();
NEXT; }
1837 case 0x21: { II ii = ld_SS_word<IX,T::CC_DD>();
NEXT; }
1838 case 0x22: { II ii = ld_xword_SS<IX,T::CC_DD>();
NEXT; }
1839 case 0x2a: { II ii = ld_SS_xword<IX,T::CC_DD>();
NEXT; }
1840 case 0x23: { II ii = inc_SS<IX,T::CC_DD>();
NEXT; }
1841 case 0x2b: { II ii = dec_SS<IX,T::CC_DD>();
NEXT; }
1842 case 0x24: { II ii = inc_R<IXH,T::CC_DD>();
NEXT; }
1843 case 0x2c: { II ii = inc_R<IXL,T::CC_DD>();
NEXT; }
1844 case 0x25: { II ii = dec_R<IXH,T::CC_DD>();
NEXT; }
1845 case 0x2d: { II ii = dec_R<IXL,T::CC_DD>();
NEXT; }
1846 case 0x26: { II ii = ld_R_byte<IXH,T::CC_DD>();
NEXT; }
1847 case 0x2e: { II ii = ld_R_byte<IXL,T::CC_DD>();
NEXT; }
1848 case 0x34: { II ii = inc_xix<IX>();
NEXT; }
1849 case 0x35: { II ii = dec_xix<IX>();
NEXT; }
1850 case 0x36: { II ii = ld_xix_byte<IX>();
NEXT; }
1852 case 0x44: { II ii = ld_R_R<B,IXH,T::CC_DD>();
NEXT; }
1853 case 0x45: { II ii = ld_R_R<B,IXL,T::CC_DD>();
NEXT; }
1854 case 0x4c: { II ii = ld_R_R<C,IXH,T::CC_DD>();
NEXT; }
1855 case 0x4d: { II ii = ld_R_R<C,IXL,T::CC_DD>();
NEXT; }
1856 case 0x54: { II ii = ld_R_R<D,IXH,T::CC_DD>();
NEXT; }
1857 case 0x55: { II ii = ld_R_R<D,IXL,T::CC_DD>();
NEXT; }
1858 case 0x5c: { II ii = ld_R_R<E,IXH,T::CC_DD>();
NEXT; }
1859 case 0x5d: { II ii = ld_R_R<E,IXL,T::CC_DD>();
NEXT; }
1860 case 0x7c: { II ii = ld_R_R<A,IXH,T::CC_DD>();
NEXT; }
1861 case 0x7d: { II ii = ld_R_R<A,IXL,T::CC_DD>();
NEXT; }
1862 case 0x60: { II ii = ld_R_R<IXH,B,T::CC_DD>();
NEXT; }
1863 case 0x61: { II ii = ld_R_R<IXH,C,T::CC_DD>();
NEXT; }
1864 case 0x62: { II ii = ld_R_R<IXH,D,T::CC_DD>();
NEXT; }
1865 case 0x63: { II ii = ld_R_R<IXH,E,T::CC_DD>();
NEXT; }
1866 case 0x65: { II ii = ld_R_R<IXH,IXL,T::CC_DD>();
NEXT; }
1867 case 0x67: { II ii = ld_R_R<IXH,A,T::CC_DD>();
NEXT; }
1868 case 0x68: { II ii = ld_R_R<IXL,B,T::CC_DD>();
NEXT; }
1869 case 0x69: { II ii = ld_R_R<IXL,C,T::CC_DD>();
NEXT; }
1870 case 0x6a: { II ii = ld_R_R<IXL,D,T::CC_DD>();
NEXT; }
1871 case 0x6b: { II ii = ld_R_R<IXL,E,T::CC_DD>();
NEXT; }
1872 case 0x6c: { II ii = ld_R_R<IXL,IXH,T::CC_DD>();
NEXT; }
1873 case 0x6f: { II ii = ld_R_R<IXL,A,T::CC_DD>();
NEXT; }
1874 case 0x70: { II ii = ld_xix_R<IX,B>();
NEXT; }
1875 case 0x71: { II ii = ld_xix_R<IX,C>();
NEXT; }
1876 case 0x72: { II ii = ld_xix_R<IX,D>();
NEXT; }
1877 case 0x73: { II ii = ld_xix_R<IX,E>();
NEXT; }
1878 case 0x74: { II ii = ld_xix_R<IX,H>();
NEXT; }
1879 case 0x75: { II ii = ld_xix_R<IX,L>();
NEXT; }
1880 case 0x77: { II ii = ld_xix_R<IX,A>();
NEXT; }
1881 case 0x46: { II ii = ld_R_xix<B,IX>();
NEXT; }
1882 case 0x4e: { II ii = ld_R_xix<C,IX>();
NEXT; }
1883 case 0x56: { II ii = ld_R_xix<D,IX>();
NEXT; }
1884 case 0x5e: { II ii = ld_R_xix<E,IX>();
NEXT; }
1885 case 0x66: { II ii = ld_R_xix<H,IX>();
NEXT; }
1886 case 0x6e: { II ii = ld_R_xix<L,IX>();
NEXT; }
1887 case 0x7e: { II ii = ld_R_xix<A,IX>();
NEXT; }
1889 case 0x84: { II ii = add_a_R<IXH,T::CC_DD>();
NEXT; }
1890 case 0x85: { II ii = add_a_R<IXL,T::CC_DD>();
NEXT; }
1891 case 0x86: { II ii = add_a_xix<IX>();
NEXT; }
1892 case 0x8c: { II ii = adc_a_R<IXH,T::CC_DD>();
NEXT; }
1893 case 0x8d: { II ii = adc_a_R<IXL,T::CC_DD>();
NEXT; }
1894 case 0x8e: { II ii = adc_a_xix<IX>();
NEXT; }
1895 case 0x94: { II ii = sub_R<IXH,T::CC_DD>();
NEXT; }
1896 case 0x95: { II ii = sub_R<IXL,T::CC_DD>();
NEXT; }
1897 case 0x96: { II ii = sub_xix<IX>();
NEXT; }
1898 case 0x9c: { II ii = sbc_a_R<IXH,T::CC_DD>();
NEXT; }
1899 case 0x9d: { II ii = sbc_a_R<IXL,T::CC_DD>();
NEXT; }
1900 case 0x9e: { II ii = sbc_a_xix<IX>();
NEXT; }
1901 case 0xa4: { II ii = and_R<IXH,T::CC_DD>();
NEXT; }
1902 case 0xa5: { II ii = and_R<IXL,T::CC_DD>();
NEXT; }
1903 case 0xa6: { II ii = and_xix<IX>();
NEXT; }
1904 case 0xac: { II ii = xor_R<IXH,T::CC_DD>();
NEXT; }
1905 case 0xad: { II ii = xor_R<IXL,T::CC_DD>();
NEXT; }
1906 case 0xae: { II ii = xor_xix<IX>();
NEXT; }
1907 case 0xb4: { II ii = or_R<IXH,T::CC_DD>();
NEXT; }
1908 case 0xb5: { II ii = or_R<IXL,T::CC_DD>();
NEXT; }
1909 case 0xb6: { II ii = or_xix<IX>();
NEXT; }
1910 case 0xbc: { II ii = cp_R<IXH,T::CC_DD>();
NEXT; }
1911 case 0xbd: { II ii = cp_R<IXL,T::CC_DD>();
NEXT; }
1912 case 0xbe: { II ii = cp_xix<IX>();
NEXT; }
1914 case 0xe1: { II ii = pop_SS <IX,T::CC_DD>();
NEXT; }
1915 case 0xe5: { II ii = push_SS<IX,T::CC_DD>();
NEXT; }
1916 case 0xe3: { II ii = ex_xsp_SS<IX,T::CC_DD>();
NEXT; }
1917 case 0xe9: { II ii = jp_SS<IX,T::CC_DD>();
NEXT; }
1918 case 0xf9: { II ii = ld_sp_SS<IX,T::CC_DD>();
NEXT; }
1919 case 0xcb: ixy = getIX();
goto xx_cb;
1921 if constexpr (T::IS_R800) {
1922 II ii = nop<T::CC_DD>();
NEXT;
1924 T::add(T::CC_DD);
goto opDD_2;
1927 if constexpr (T::IS_R800) {
1928 II ii = nop<T::CC_DD>();
NEXT;
1930 T::add(T::CC_DD);
goto opFD_2;
1938 byte opcodeFD = RDMEM_OPCODE<0>(T::CC_DD + T::CC_MAIN);
2114 if constexpr (T::IS_R800) {
2115 II ii = nop<T::CC_DD>();
NEXT;
2118 #ifdef USE_COMPUTED_GOTO
2119 goto *(opcodeTable[opcodeFD]);
2121 opcodeMain = opcodeFD;
2126 case 0x09: { II ii = add_SS_TT<IY,BC,T::CC_DD>();
NEXT; }
2127 case 0x19: { II ii = add_SS_TT<IY,DE,T::CC_DD>();
NEXT; }
2128 case 0x29: { II ii = add_SS_SS<IY ,T::CC_DD>();
NEXT; }
2129 case 0x39: { II ii = add_SS_TT<IY,SP,T::CC_DD>();
NEXT; }
2130 case 0x21: { II ii = ld_SS_word<IY,T::CC_DD>();
NEXT; }
2131 case 0x22: { II ii = ld_xword_SS<IY,T::CC_DD>();
NEXT; }
2132 case 0x2a: { II ii = ld_SS_xword<IY,T::CC_DD>();
NEXT; }
2133 case 0x23: { II ii = inc_SS<IY,T::CC_DD>();
NEXT; }
2134 case 0x2b: { II ii = dec_SS<IY,T::CC_DD>();
NEXT; }
2135 case 0x24: { II ii = inc_R<IYH,T::CC_DD>();
NEXT; }
2136 case 0x2c: { II ii = inc_R<IYL,T::CC_DD>();
NEXT; }
2137 case 0x25: { II ii = dec_R<IYH,T::CC_DD>();
NEXT; }
2138 case 0x2d: { II ii = dec_R<IYL,T::CC_DD>();
NEXT; }
2139 case 0x26: { II ii = ld_R_byte<IYH,T::CC_DD>();
NEXT; }
2140 case 0x2e: { II ii = ld_R_byte<IYL,T::CC_DD>();
NEXT; }
2141 case 0x34: { II ii = inc_xix<IY>();
NEXT; }
2142 case 0x35: { II ii = dec_xix<IY>();
NEXT; }
2143 case 0x36: { II ii = ld_xix_byte<IY>();
NEXT; }
2145 case 0x44: { II ii = ld_R_R<B,IYH,T::CC_DD>();
NEXT; }
2146 case 0x45: { II ii = ld_R_R<B,IYL,T::CC_DD>();
NEXT; }
2147 case 0x4c: { II ii = ld_R_R<C,IYH,T::CC_DD>();
NEXT; }
2148 case 0x4d: { II ii = ld_R_R<C,IYL,T::CC_DD>();
NEXT; }
2149 case 0x54: { II ii = ld_R_R<D,IYH,T::CC_DD>();
NEXT; }
2150 case 0x55: { II ii = ld_R_R<D,IYL,T::CC_DD>();
NEXT; }
2151 case 0x5c: { II ii = ld_R_R<E,IYH,T::CC_DD>();
NEXT; }
2152 case 0x5d: { II ii = ld_R_R<E,IYL,T::CC_DD>();
NEXT; }
2153 case 0x7c: { II ii = ld_R_R<A,IYH,T::CC_DD>();
NEXT; }
2154 case 0x7d: { II ii = ld_R_R<A,IYL,T::CC_DD>();
NEXT; }
2155 case 0x60: { II ii = ld_R_R<IYH,B,T::CC_DD>();
NEXT; }
2156 case 0x61: { II ii = ld_R_R<IYH,C,T::CC_DD>();
NEXT; }
2157 case 0x62: { II ii = ld_R_R<IYH,D,T::CC_DD>();
NEXT; }
2158 case 0x63: { II ii = ld_R_R<IYH,E,T::CC_DD>();
NEXT; }
2159 case 0x65: { II ii = ld_R_R<IYH,IYL,T::CC_DD>();
NEXT; }
2160 case 0x67: { II ii = ld_R_R<IYH,A,T::CC_DD>();
NEXT; }
2161 case 0x68: { II ii = ld_R_R<IYL,B,T::CC_DD>();
NEXT; }
2162 case 0x69: { II ii = ld_R_R<IYL,C,T::CC_DD>();
NEXT; }
2163 case 0x6a: { II ii = ld_R_R<IYL,D,T::CC_DD>();
NEXT; }
2164 case 0x6b: { II ii = ld_R_R<IYL,E,T::CC_DD>();
NEXT; }
2165 case 0x6c: { II ii = ld_R_R<IYL,IYH,T::CC_DD>();
NEXT; }
2166 case 0x6f: { II ii = ld_R_R<IYL,A,T::CC_DD>();
NEXT; }
2167 case 0x70: { II ii = ld_xix_R<IY,B>();
NEXT; }
2168 case 0x71: { II ii = ld_xix_R<IY,C>();
NEXT; }
2169 case 0x72: { II ii = ld_xix_R<IY,D>();
NEXT; }
2170 case 0x73: { II ii = ld_xix_R<IY,E>();
NEXT; }
2171 case 0x74: { II ii = ld_xix_R<IY,H>();
NEXT; }
2172 case 0x75: { II ii = ld_xix_R<IY,L>();
NEXT; }
2173 case 0x77: { II ii = ld_xix_R<IY,A>();
NEXT; }
2174 case 0x46: { II ii = ld_R_xix<B,IY>();
NEXT; }
2175 case 0x4e: { II ii = ld_R_xix<C,IY>();
NEXT; }
2176 case 0x56: { II ii = ld_R_xix<D,IY>();
NEXT; }
2177 case 0x5e: { II ii = ld_R_xix<E,IY>();
NEXT; }
2178 case 0x66: { II ii = ld_R_xix<H,IY>();
NEXT; }
2179 case 0x6e: { II ii = ld_R_xix<L,IY>();
NEXT; }
2180 case 0x7e: { II ii = ld_R_xix<A,IY>();
NEXT; }
2182 case 0x84: { II ii = add_a_R<IYH,T::CC_DD>();
NEXT; }
2183 case 0x85: { II ii = add_a_R<IYL,T::CC_DD>();
NEXT; }
2184 case 0x86: { II ii = add_a_xix<IY>();
NEXT; }
2185 case 0x8c: { II ii = adc_a_R<IYH,T::CC_DD>();
NEXT; }
2186 case 0x8d: { II ii = adc_a_R<IYL,T::CC_DD>();
NEXT; }
2187 case 0x8e: { II ii = adc_a_xix<IY>();
NEXT; }
2188 case 0x94: { II ii = sub_R<IYH,T::CC_DD>();
NEXT; }
2189 case 0x95: { II ii = sub_R<IYL,T::CC_DD>();
NEXT; }
2190 case 0x96: { II ii = sub_xix<IY>();
NEXT; }
2191 case 0x9c: { II ii = sbc_a_R<IYH,T::CC_DD>();
NEXT; }
2192 case 0x9d: { II ii = sbc_a_R<IYL,T::CC_DD>();
NEXT; }
2193 case 0x9e: { II ii = sbc_a_xix<IY>();
NEXT; }
2194 case 0xa4: { II ii = and_R<IYH,T::CC_DD>();
NEXT; }
2195 case 0xa5: { II ii = and_R<IYL,T::CC_DD>();
NEXT; }
2196 case 0xa6: { II ii = and_xix<IY>();
NEXT; }
2197 case 0xac: { II ii = xor_R<IYH,T::CC_DD>();
NEXT; }
2198 case 0xad: { II ii = xor_R<IYL,T::CC_DD>();
NEXT; }
2199 case 0xae: { II ii = xor_xix<IY>();
NEXT; }
2200 case 0xb4: { II ii = or_R<IYH,T::CC_DD>();
NEXT; }
2201 case 0xb5: { II ii = or_R<IYL,T::CC_DD>();
NEXT; }
2202 case 0xb6: { II ii = or_xix<IY>();
NEXT; }
2203 case 0xbc: { II ii = cp_R<IYH,T::CC_DD>();
NEXT; }
2204 case 0xbd: { II ii = cp_R<IYL,T::CC_DD>();
NEXT; }
2205 case 0xbe: { II ii = cp_xix<IY>();
NEXT; }
2207 case 0xe1: { II ii = pop_SS <IY,T::CC_DD>();
NEXT; }
2208 case 0xe5: { II ii = push_SS<IY,T::CC_DD>();
NEXT; }
2209 case 0xe3: { II ii = ex_xsp_SS<IY,T::CC_DD>();
NEXT; }
2210 case 0xe9: { II ii = jp_SS<IY,T::CC_DD>();
NEXT; }
2211 case 0xf9: { II ii = ld_sp_SS<IY,T::CC_DD>();
NEXT; }
2212 case 0xcb: ixy = getIY();
goto xx_cb;
2214 if constexpr (T::IS_R800) {
2215 II ii = nop<T::CC_DD>();
NEXT;
2217 T::add(T::CC_DD);
goto opDD_2;
2220 if constexpr (T::IS_R800) {
2221 II ii = nop<T::CC_DD>();
NEXT;
2223 T::add(T::CC_DD);
goto opFD_2;
2228#ifndef USE_COMPUTED_GOTO
2234 unsigned tmp = RD_WORD_PC<1>(T::CC_DD + T::CC_DD_CB);
2235 auto ofst = narrow_cast<int8_t>(tmp & 0xFF);
2236 unsigned addr = narrow_cast<word>(ixy + ofst);
2237 auto xxcb_opcode = narrow_cast<byte>(tmp >> 8);
2238 switch (xxcb_opcode) {
2239 case 0x00: { II ii = rlc_xix_R<B>(addr);
NEXT; }
2240 case 0x01: { II ii = rlc_xix_R<C>(addr);
NEXT; }
2241 case 0x02: { II ii = rlc_xix_R<D>(addr);
NEXT; }
2242 case 0x03: { II ii = rlc_xix_R<E>(addr);
NEXT; }
2243 case 0x04: { II ii = rlc_xix_R<H>(addr);
NEXT; }
2244 case 0x05: { II ii = rlc_xix_R<L>(addr);
NEXT; }
2245 case 0x06: { II ii = rlc_xix_R<DUMMY>(addr);
NEXT; }
2246 case 0x07: { II ii = rlc_xix_R<A>(addr);
NEXT; }
2247 case 0x08: { II ii = rrc_xix_R<B>(addr);
NEXT; }
2248 case 0x09: { II ii = rrc_xix_R<C>(addr);
NEXT; }
2249 case 0x0a: { II ii = rrc_xix_R<D>(addr);
NEXT; }
2250 case 0x0b: { II ii = rrc_xix_R<E>(addr);
NEXT; }
2251 case 0x0c: { II ii = rrc_xix_R<H>(addr);
NEXT; }
2252 case 0x0d: { II ii = rrc_xix_R<L>(addr);
NEXT; }
2253 case 0x0e: { II ii = rrc_xix_R<DUMMY>(addr);
NEXT; }
2254 case 0x0f: { II ii = rrc_xix_R<A>(addr);
NEXT; }
2255 case 0x10: { II ii = rl_xix_R<B>(addr);
NEXT; }
2256 case 0x11: { II ii = rl_xix_R<C>(addr);
NEXT; }
2257 case 0x12: { II ii = rl_xix_R<D>(addr);
NEXT; }
2258 case 0x13: { II ii = rl_xix_R<E>(addr);
NEXT; }
2259 case 0x14: { II ii = rl_xix_R<H>(addr);
NEXT; }
2260 case 0x15: { II ii = rl_xix_R<L>(addr);
NEXT; }
2261 case 0x16: { II ii = rl_xix_R<DUMMY>(addr);
NEXT; }
2262 case 0x17: { II ii = rl_xix_R<A>(addr);
NEXT; }
2263 case 0x18: { II ii = rr_xix_R<B>(addr);
NEXT; }
2264 case 0x19: { II ii = rr_xix_R<C>(addr);
NEXT; }
2265 case 0x1a: { II ii = rr_xix_R<D>(addr);
NEXT; }
2266 case 0x1b: { II ii = rr_xix_R<E>(addr);
NEXT; }
2267 case 0x1c: { II ii = rr_xix_R<H>(addr);
NEXT; }
2268 case 0x1d: { II ii = rr_xix_R<L>(addr);
NEXT; }
2269 case 0x1e: { II ii = rr_xix_R<DUMMY>(addr);
NEXT; }
2270 case 0x1f: { II ii = rr_xix_R<A>(addr);
NEXT; }
2271 case 0x20: { II ii = sla_xix_R<B>(addr);
NEXT; }
2272 case 0x21: { II ii = sla_xix_R<C>(addr);
NEXT; }
2273 case 0x22: { II ii = sla_xix_R<D>(addr);
NEXT; }
2274 case 0x23: { II ii = sla_xix_R<E>(addr);
NEXT; }
2275 case 0x24: { II ii = sla_xix_R<H>(addr);
NEXT; }
2276 case 0x25: { II ii = sla_xix_R<L>(addr);
NEXT; }
2277 case 0x26: { II ii = sla_xix_R<DUMMY>(addr);
NEXT; }
2278 case 0x27: { II ii = sla_xix_R<A>(addr);
NEXT; }
2279 case 0x28: { II ii = sra_xix_R<B>(addr);
NEXT; }
2280 case 0x29: { II ii = sra_xix_R<C>(addr);
NEXT; }
2281 case 0x2a: { II ii = sra_xix_R<D>(addr);
NEXT; }
2282 case 0x2b: { II ii = sra_xix_R<E>(addr);
NEXT; }
2283 case 0x2c: { II ii = sra_xix_R<H>(addr);
NEXT; }
2284 case 0x2d: { II ii = sra_xix_R<L>(addr);
NEXT; }
2285 case 0x2e: { II ii = sra_xix_R<DUMMY>(addr);
NEXT; }
2286 case 0x2f: { II ii = sra_xix_R<A>(addr);
NEXT; }
2287 case 0x30: { II ii = T::IS_R800 ? sll2() : sll_xix_R<
B>(addr);
NEXT; }
2288 case 0x31: { II ii = T::IS_R800 ? sll2() : sll_xix_R<
C>(addr);
NEXT; }
2289 case 0x32: { II ii = T::IS_R800 ? sll2() : sll_xix_R<
D>(addr);
NEXT; }
2290 case 0x33: { II ii = T::IS_R800 ? sll2() : sll_xix_R<
E>(addr);
NEXT; }
2291 case 0x34: { II ii = T::IS_R800 ? sll2() : sll_xix_R<
H>(addr);
NEXT; }
2292 case 0x35: { II ii = T::IS_R800 ? sll2() : sll_xix_R<
L>(addr);
NEXT; }
2293 case 0x36: { II ii = T::IS_R800 ? sll2() : sll_xix_R<
DUMMY>(addr);
NEXT; }
2294 case 0x37: { II ii = T::IS_R800 ? sll2() : sll_xix_R<
A>(addr);
NEXT; }
2295 case 0x38: { II ii = srl_xix_R<B>(addr);
NEXT; }
2296 case 0x39: { II ii = srl_xix_R<C>(addr);
NEXT; }
2297 case 0x3a: { II ii = srl_xix_R<D>(addr);
NEXT; }
2298 case 0x3b: { II ii = srl_xix_R<E>(addr);
NEXT; }
2299 case 0x3c: { II ii = srl_xix_R<H>(addr);
NEXT; }
2300 case 0x3d: { II ii = srl_xix_R<L>(addr);
NEXT; }
2301 case 0x3e: { II ii = srl_xix_R<DUMMY>(addr);
NEXT; }
2302 case 0x3f: { II ii = srl_xix_R<A>(addr);
NEXT; }
2304 case 0x40:
case 0x41:
case 0x42:
case 0x43:
2305 case 0x44:
case 0x45:
case 0x46:
case 0x47:
2306 { II ii = bit_N_xix<0>(addr);
NEXT; }
2307 case 0x48:
case 0x49:
case 0x4a:
case 0x4b:
2308 case 0x4c:
case 0x4d:
case 0x4e:
case 0x4f:
2309 { II ii = bit_N_xix<1>(addr);
NEXT; }
2310 case 0x50:
case 0x51:
case 0x52:
case 0x53:
2311 case 0x54:
case 0x55:
case 0x56:
case 0x57:
2312 { II ii = bit_N_xix<2>(addr);
NEXT; }
2313 case 0x58:
case 0x59:
case 0x5a:
case 0x5b:
2314 case 0x5c:
case 0x5d:
case 0x5e:
case 0x5f:
2315 { II ii = bit_N_xix<3>(addr);
NEXT; }
2316 case 0x60:
case 0x61:
case 0x62:
case 0x63:
2317 case 0x64:
case 0x65:
case 0x66:
case 0x67:
2318 { II ii = bit_N_xix<4>(addr);
NEXT; }
2319 case 0x68:
case 0x69:
case 0x6a:
case 0x6b:
2320 case 0x6c:
case 0x6d:
case 0x6e:
case 0x6f:
2321 { II ii = bit_N_xix<5>(addr);
NEXT; }
2322 case 0x70:
case 0x71:
case 0x72:
case 0x73:
2323 case 0x74:
case 0x75:
case 0x76:
case 0x77:
2324 { II ii = bit_N_xix<6>(addr);
NEXT; }
2325 case 0x78:
case 0x79:
case 0x7a:
case 0x7b:
2326 case 0x7c:
case 0x7d:
case 0x7e:
case 0x7f:
2327 { II ii = bit_N_xix<7>(addr);
NEXT; }
2329 case 0x80: { II ii = res_N_xix_R<0,B>(addr);
NEXT; }
2330 case 0x81: { II ii = res_N_xix_R<0,C>(addr);
NEXT; }
2331 case 0x82: { II ii = res_N_xix_R<0,D>(addr);
NEXT; }
2332 case 0x83: { II ii = res_N_xix_R<0,E>(addr);
NEXT; }
2333 case 0x84: { II ii = res_N_xix_R<0,H>(addr);
NEXT; }
2334 case 0x85: { II ii = res_N_xix_R<0,L>(addr);
NEXT; }
2335 case 0x87: { II ii = res_N_xix_R<0,A>(addr);
NEXT; }
2336 case 0x88: { II ii = res_N_xix_R<1,B>(addr);
NEXT; }
2337 case 0x89: { II ii = res_N_xix_R<1,C>(addr);
NEXT; }
2338 case 0x8a: { II ii = res_N_xix_R<1,D>(addr);
NEXT; }
2339 case 0x8b: { II ii = res_N_xix_R<1,E>(addr);
NEXT; }
2340 case 0x8c: { II ii = res_N_xix_R<1,H>(addr);
NEXT; }
2341 case 0x8d: { II ii = res_N_xix_R<1,L>(addr);
NEXT; }
2342 case 0x8f: { II ii = res_N_xix_R<1,A>(addr);
NEXT; }
2343 case 0x90: { II ii = res_N_xix_R<2,B>(addr);
NEXT; }
2344 case 0x91: { II ii = res_N_xix_R<2,C>(addr);
NEXT; }
2345 case 0x92: { II ii = res_N_xix_R<2,D>(addr);
NEXT; }
2346 case 0x93: { II ii = res_N_xix_R<2,E>(addr);
NEXT; }
2347 case 0x94: { II ii = res_N_xix_R<2,H>(addr);
NEXT; }
2348 case 0x95: { II ii = res_N_xix_R<2,L>(addr);
NEXT; }
2349 case 0x97: { II ii = res_N_xix_R<2,A>(addr);
NEXT; }
2350 case 0x98: { II ii = res_N_xix_R<3,B>(addr);
NEXT; }
2351 case 0x99: { II ii = res_N_xix_R<3,C>(addr);
NEXT; }
2352 case 0x9a: { II ii = res_N_xix_R<3,D>(addr);
NEXT; }
2353 case 0x9b: { II ii = res_N_xix_R<3,E>(addr);
NEXT; }
2354 case 0x9c: { II ii = res_N_xix_R<3,H>(addr);
NEXT; }
2355 case 0x9d: { II ii = res_N_xix_R<3,L>(addr);
NEXT; }
2356 case 0x9f: { II ii = res_N_xix_R<3,A>(addr);
NEXT; }
2357 case 0xa0: { II ii = res_N_xix_R<4,B>(addr);
NEXT; }
2358 case 0xa1: { II ii = res_N_xix_R<4,C>(addr);
NEXT; }
2359 case 0xa2: { II ii = res_N_xix_R<4,D>(addr);
NEXT; }
2360 case 0xa3: { II ii = res_N_xix_R<4,E>(addr);
NEXT; }
2361 case 0xa4: { II ii = res_N_xix_R<4,H>(addr);
NEXT; }
2362 case 0xa5: { II ii = res_N_xix_R<4,L>(addr);
NEXT; }
2363 case 0xa7: { II ii = res_N_xix_R<4,A>(addr);
NEXT; }
2364 case 0xa8: { II ii = res_N_xix_R<5,B>(addr);
NEXT; }
2365 case 0xa9: { II ii = res_N_xix_R<5,C>(addr);
NEXT; }
2366 case 0xaa: { II ii = res_N_xix_R<5,D>(addr);
NEXT; }
2367 case 0xab: { II ii = res_N_xix_R<5,E>(addr);
NEXT; }
2368 case 0xac: { II ii = res_N_xix_R<5,H>(addr);
NEXT; }
2369 case 0xad: { II ii = res_N_xix_R<5,L>(addr);
NEXT; }
2370 case 0xaf: { II ii = res_N_xix_R<5,A>(addr);
NEXT; }
2371 case 0xb0: { II ii = res_N_xix_R<6,B>(addr);
NEXT; }
2372 case 0xb1: { II ii = res_N_xix_R<6,C>(addr);
NEXT; }
2373 case 0xb2: { II ii = res_N_xix_R<6,D>(addr);
NEXT; }
2374 case 0xb3: { II ii = res_N_xix_R<6,E>(addr);
NEXT; }
2375 case 0xb4: { II ii = res_N_xix_R<6,H>(addr);
NEXT; }
2376 case 0xb5: { II ii = res_N_xix_R<6,L>(addr);
NEXT; }
2377 case 0xb7: { II ii = res_N_xix_R<6,A>(addr);
NEXT; }
2378 case 0xb8: { II ii = res_N_xix_R<7,B>(addr);
NEXT; }
2379 case 0xb9: { II ii = res_N_xix_R<7,C>(addr);
NEXT; }
2380 case 0xba: { II ii = res_N_xix_R<7,D>(addr);
NEXT; }
2381 case 0xbb: { II ii = res_N_xix_R<7,E>(addr);
NEXT; }
2382 case 0xbc: { II ii = res_N_xix_R<7,H>(addr);
NEXT; }
2383 case 0xbd: { II ii = res_N_xix_R<7,L>(addr);
NEXT; }
2384 case 0xbf: { II ii = res_N_xix_R<7,A>(addr);
NEXT; }
2385 case 0x86: { II ii = res_N_xix_R<0,DUMMY>(addr);
NEXT; }
2386 case 0x8e: { II ii = res_N_xix_R<1,DUMMY>(addr);
NEXT; }
2387 case 0x96: { II ii = res_N_xix_R<2,DUMMY>(addr);
NEXT; }
2388 case 0x9e: { II ii = res_N_xix_R<3,DUMMY>(addr);
NEXT; }
2389 case 0xa6: { II ii = res_N_xix_R<4,DUMMY>(addr);
NEXT; }
2390 case 0xae: { II ii = res_N_xix_R<5,DUMMY>(addr);
NEXT; }
2391 case 0xb6: { II ii = res_N_xix_R<6,DUMMY>(addr);
NEXT; }
2392 case 0xbe: { II ii = res_N_xix_R<7,DUMMY>(addr);
NEXT; }
2394 case 0xc0: { II ii = set_N_xix_R<0,B>(addr);
NEXT; }
2395 case 0xc1: { II ii = set_N_xix_R<0,C>(addr);
NEXT; }
2396 case 0xc2: { II ii = set_N_xix_R<0,D>(addr);
NEXT; }
2397 case 0xc3: { II ii = set_N_xix_R<0,E>(addr);
NEXT; }
2398 case 0xc4: { II ii = set_N_xix_R<0,H>(addr);
NEXT; }
2399 case 0xc5: { II ii = set_N_xix_R<0,L>(addr);
NEXT; }
2400 case 0xc7: { II ii = set_N_xix_R<0,A>(addr);
NEXT; }
2401 case 0xc8: { II ii = set_N_xix_R<1,B>(addr);
NEXT; }
2402 case 0xc9: { II ii = set_N_xix_R<1,C>(addr);
NEXT; }
2403 case 0xca: { II ii = set_N_xix_R<1,D>(addr);
NEXT; }
2404 case 0xcb: { II ii = set_N_xix_R<1,E>(addr);
NEXT; }
2405 case 0xcc: { II ii = set_N_xix_R<1,H>(addr);
NEXT; }
2406 case 0xcd: { II ii = set_N_xix_R<1,L>(addr);
NEXT; }
2407 case 0xcf: { II ii = set_N_xix_R<1,A>(addr);
NEXT; }
2408 case 0xd0: { II ii = set_N_xix_R<2,B>(addr);
NEXT; }
2409 case 0xd1: { II ii = set_N_xix_R<2,C>(addr);
NEXT; }
2410 case 0xd2: { II ii = set_N_xix_R<2,D>(addr);
NEXT; }
2411 case 0xd3: { II ii = set_N_xix_R<2,E>(addr);
NEXT; }
2412 case 0xd4: { II ii = set_N_xix_R<2,H>(addr);
NEXT; }
2413 case 0xd5: { II ii = set_N_xix_R<2,L>(addr);
NEXT; }
2414 case 0xd7: { II ii = set_N_xix_R<2,A>(addr);
NEXT; }
2415 case 0xd8: { II ii = set_N_xix_R<3,B>(addr);
NEXT; }
2416 case 0xd9: { II ii = set_N_xix_R<3,C>(addr);
NEXT; }
2417 case 0xda: { II ii = set_N_xix_R<3,D>(addr);
NEXT; }
2418 case 0xdb: { II ii = set_N_xix_R<3,E>(addr);
NEXT; }
2419 case 0xdc: { II ii = set_N_xix_R<3,H>(addr);
NEXT; }
2420 case 0xdd: { II ii = set_N_xix_R<3,L>(addr);
NEXT; }
2421 case 0xdf: { II ii = set_N_xix_R<3,A>(addr);
NEXT; }
2422 case 0xe0: { II ii = set_N_xix_R<4,B>(addr);
NEXT; }
2423 case 0xe1: { II ii = set_N_xix_R<4,C>(addr);
NEXT; }
2424 case 0xe2: { II ii = set_N_xix_R<4,D>(addr);
NEXT; }
2425 case 0xe3: { II ii = set_N_xix_R<4,E>(addr);
NEXT; }
2426 case 0xe4: { II ii = set_N_xix_R<4,H>(addr);
NEXT; }
2427 case 0xe5: { II ii = set_N_xix_R<4,L>(addr);
NEXT; }
2428 case 0xe7: { II ii = set_N_xix_R<4,A>(addr);
NEXT; }
2429 case 0xe8: { II ii = set_N_xix_R<5,B>(addr);
NEXT; }
2430 case 0xe9: { II ii = set_N_xix_R<5,C>(addr);
NEXT; }
2431 case 0xea: { II ii = set_N_xix_R<5,D>(addr);
NEXT; }
2432 case 0xeb: { II ii = set_N_xix_R<5,E>(addr);
NEXT; }
2433 case 0xec: { II ii = set_N_xix_R<5,H>(addr);
NEXT; }
2434 case 0xed: { II ii = set_N_xix_R<5,L>(addr);
NEXT; }
2435 case 0xef: { II ii = set_N_xix_R<5,A>(addr);
NEXT; }
2436 case 0xf0: { II ii = set_N_xix_R<6,B>(addr);
NEXT; }
2437 case 0xf1: { II ii = set_N_xix_R<6,C>(addr);
NEXT; }
2438 case 0xf2: { II ii = set_N_xix_R<6,D>(addr);
NEXT; }
2439 case 0xf3: { II ii = set_N_xix_R<6,E>(addr);
NEXT; }
2440 case 0xf4: { II ii = set_N_xix_R<6,H>(addr);
NEXT; }
2441 case 0xf5: { II ii = set_N_xix_R<6,L>(addr);
NEXT; }
2442 case 0xf7: { II ii = set_N_xix_R<6,A>(addr);
NEXT; }
2443 case 0xf8: { II ii = set_N_xix_R<7,B>(addr);
NEXT; }
2444 case 0xf9: { II ii = set_N_xix_R<7,C>(addr);
NEXT; }
2445 case 0xfa: { II ii = set_N_xix_R<7,D>(addr);
NEXT; }
2446 case 0xfb: { II ii = set_N_xix_R<7,E>(addr);
NEXT; }
2447 case 0xfc: { II ii = set_N_xix_R<7,H>(addr);
NEXT; }
2448 case 0xfd: { II ii = set_N_xix_R<7,L>(addr);
NEXT; }
2449 case 0xff: { II ii = set_N_xix_R<7,A>(addr);
NEXT; }
2450 case 0xc6: { II ii = set_N_xix_R<0,DUMMY>(addr);
NEXT; }
2451 case 0xce: { II ii = set_N_xix_R<1,DUMMY>(addr);
NEXT; }
2452 case 0xd6: { II ii = set_N_xix_R<2,DUMMY>(addr);
NEXT; }
2453 case 0xde: { II ii = set_N_xix_R<3,DUMMY>(addr);
NEXT; }
2454 case 0xe6: { II ii = set_N_xix_R<4,DUMMY>(addr);
NEXT; }
2455 case 0xee: { II ii = set_N_xix_R<5,DUMMY>(addr);
NEXT; }
2456 case 0xf6: { II ii = set_N_xix_R<6,DUMMY>(addr);
NEXT; }
2457 case 0xfe: { II ii = set_N_xix_R<7,DUMMY>(addr);
NEXT; }
2463template<
typename T>
inline void CPUCore<T>::cpuTracePre()
2467template<
typename T>
inline void CPUCore<T>::cpuTracePost()
2469 if (tracingEnabled) [[unlikely]] {
2470 cpuTracePost_slow();
2473template<
typename T>
void CPUCore<T>::cpuTracePost_slow()
2475 std::array<byte, 4> opBuf;
2476 std::string dasmOutput;
2477 dasm(*interface, start_pc, opBuf, dasmOutput, T::getTimeFast());
2478 dasmOutput.resize(19,
' ');
2479 std::cout << strCat(hex_string<4>(start_pc),
2481 " AF=", hex_string<4>(getAF()),
2482 " BC=", hex_string<4>(getBC()),
2483 " DE=", hex_string<4>(getDE()),
2484 " HL=", hex_string<4>(getHL()),
2485 " IX=", hex_string<4>(getIX()),
2486 " IY=", hex_string<4>(getIY()),
2487 " SP=", hex_string<4>(getSP()),
2492template<
typename T>
ExecIRQ CPUCore<T>::getExecIRQ()
const
2495 if (IRQStatus && getIFF1() && !prevWasEI()) [[unlikely]]
return ExecIRQ::IRQ;
2499template<
typename T>
void CPUCore<T>::executeSlow(
ExecIRQ execIRQ)
2506 if (prevWasLDAI()) [[unlikely]] {
2524 assert(getF() & V_FLAG);
2525 setF(getF() & ~V_FLAG);
2538 }
else if (getHALT()) [[unlikely]] {
2540 incR(narrow_cast<byte>(T::advanceHalt(T::HALT_STATES, scheduler.getNext())));
2541 setSlowInstructions();
2544 assert(T::limitReached());
2545 executeInstructions();
2548 if constexpr (T::IS_R800) {
2549 if ((prev2WasCall()) && (!prevWasPopRet())) [[unlikely]] {
2571 assert(fastForward || !interface->isBreaked());
2573 interface->setFastForward(
true);
2575 execute2(fastForward);
2576 interface->setFastForward(
false);
2585 scheduler.schedule(T::getTime());
2586 setSlowInstructions();
2592 (!interface->anyBreakPoints() && !tracingEnabled)) {
2595 if (slowInstructions) {
2597 executeSlow(getExecIRQ());
2598 scheduler.schedule(T::getTimeFast());
2600 while (slowInstructions == 0) {
2602 if (!T::limitReached()) [[likely]] {
2604 executeInstructions();
2609 scheduler.schedule(T::getTimeFast());
2610 if (needExitCPULoop())
return;
2613 }
while (!needExitCPULoop());
2616 if (slowInstructions == 0) {
2618 assert(T::limitReached());
2619 executeInstructions();
2624 executeSlow(getExecIRQ());
2629 scheduler.schedule(T::getTime());
2662 auto execIRQ = getExecIRQ();
2664 interface->checkBreakPoints(getPC())) {
2665 assert(interface->isBreaked());
2668 }
while (!needExitCPULoop());
2673 if constexpr (R8 ==
A) {
return getA(); }
2674 else if constexpr (R8 ==
F) {
return getF(); }
2675 else if constexpr (R8 ==
B) {
return getB(); }
2676 else if constexpr (R8 ==
C) {
return getC(); }
2677 else if constexpr (R8 ==
D) {
return getD(); }
2678 else if constexpr (R8 ==
E) {
return getE(); }
2679 else if constexpr (R8 ==
H) {
return getH(); }
2680 else if constexpr (R8 ==
L) {
return getL(); }
2681 else if constexpr (R8 ==
IXH) {
return getIXh(); }
2682 else if constexpr (R8 ==
IXL) {
return getIXl(); }
2683 else if constexpr (R8 ==
IYH) {
return getIYh(); }
2684 else if constexpr (R8 ==
IYL) {
return getIYl(); }
2685 else if constexpr (R8 ==
REG_I) {
return getI(); }
2686 else if constexpr (R8 ==
REG_R) {
return getR(); }
2687 else if constexpr (R8 ==
DUMMY) {
return 0; }
2691 if constexpr (R16 ==
AF) {
return getAF(); }
2692 else if constexpr (R16 ==
BC) {
return getBC(); }
2693 else if constexpr (R16 ==
DE) {
return getDE(); }
2694 else if constexpr (R16 ==
HL) {
return getHL(); }
2695 else if constexpr (R16 ==
IX) {
return getIX(); }
2696 else if constexpr (R16 ==
IY) {
return getIY(); }
2697 else if constexpr (R16 ==
SP) {
return getSP(); }
2701 if constexpr (R8 ==
A) { setA(x); }
2702 else if constexpr (R8 ==
F) { setF(x); }
2703 else if constexpr (R8 ==
B) { setB(x); }
2704 else if constexpr (R8 ==
C) { setC(x); }
2705 else if constexpr (R8 ==
D) { setD(x); }
2706 else if constexpr (R8 ==
E) { setE(x); }
2707 else if constexpr (R8 ==
H) { setH(x); }
2708 else if constexpr (R8 ==
L) { setL(x); }
2709 else if constexpr (R8 ==
IXH) { setIXh(x); }
2710 else if constexpr (R8 ==
IXL) { setIXl(x); }
2711 else if constexpr (R8 ==
IYH) { setIYh(x); }
2712 else if constexpr (R8 ==
IYL) { setIYl(x); }
2713 else if constexpr (R8 ==
REG_I) { setI(x); }
2714 else if constexpr (R8 ==
REG_R) { setR(x); }
2715 else if constexpr (R8 ==
DUMMY) { }
2719 if constexpr (R16 ==
AF) { setAF(x); }
2720 else if constexpr (R16 ==
BC) { setBC(x); }
2721 else if constexpr (R16 ==
DE) { setDE(x); }
2722 else if constexpr (R16 ==
HL) { setHL(x); }
2723 else if constexpr (R16 ==
IX) { setIX(x); }
2724 else if constexpr (R16 ==
IY) { setIY(x); }
2725 else if constexpr (R16 ==
SP) { setSP(x); }
2731 set8<DST>(get8<SRC>());
return {1, T::CC_LD_R_R + EE};
2735template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::ld_sp_SS() {
2736 setSP(get16<REG>());
return {1, T::CC_LD_SP_HL + EE};
2740template<
typename T>
template<Reg16 REG> II CPUCore<T>::ld_SS_a() {
2741 T::setMemPtr((getA() << 8) | ((get16<REG>() + 1) & 0xFF));
2742 WRMEM(get16<REG>(), getA(), T::CC_LD_SS_A_1);
2743 return {1, T::CC_LD_SS_A};
2747template<
typename T>
template<Reg8 SRC> II CPUCore<T>::ld_xhl_R() {
2748 WRMEM(getHL(), get8<SRC>(), T::CC_LD_HL_R_1);
2749 return {1, T::CC_LD_HL_R};
2753template<
typename T>
template<Reg16 IXY, Reg8 SRC> II CPUCore<T>::ld_xix_R() {
2754 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_LD_XIX_R_1);
2755 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
2757 WRMEM(addr, get8<SRC>(), T::CC_DD + T::CC_LD_XIX_R_2);
2758 return {2, T::CC_DD + T::CC_LD_XIX_R};
2762template<
typename T> II CPUCore<T>::ld_xhl_byte() {
2763 byte val = RDMEM_OPCODE<1>(T::CC_LD_HL_N_1);
2764 WRMEM(getHL(), val, T::CC_LD_HL_N_2);
2765 return {2, T::CC_LD_HL_N};
2769template<
typename T>
template<Reg16 IXY> II CPUCore<T>::ld_xix_byte() {
2770 unsigned tmp = RD_WORD_PC<1>(T::CC_DD + T::CC_LD_XIX_N_1);
2771 auto ofst = narrow_cast<int8_t>(tmp & 0xFF);
2772 auto val = narrow_cast<byte>(tmp >> 8);
2773 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
2775 WRMEM(addr, val, T::CC_DD + T::CC_LD_XIX_N_2);
2776 return {3, T::CC_DD + T::CC_LD_XIX_N};
2780template<
typename T> II CPUCore<T>::ld_xbyte_a() {
2781 unsigned x = RD_WORD_PC<1>(T::CC_LD_NN_A_1);
2782 T::setMemPtr((getA() << 8) | ((x + 1) & 0xFF));
2783 WRMEM(x, getA(), T::CC_LD_NN_A_2);
2784 return {3, T::CC_LD_NN_A};
2788template<
typename T>
template<
int EE>
inline II CPUCore<T>::WR_NN_Y(
word reg) {
2789 unsigned addr = RD_WORD_PC<1>(T::CC_LD_XX_HL_1 + EE);
2790 T::setMemPtr(addr + 1);
2791 WR_WORD(addr, reg, T::CC_LD_XX_HL_2 + EE);
2792 return {3, T::CC_LD_XX_HL + EE};
2794template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::ld_xword_SS() {
2795 return WR_NN_Y<EE >(get16<REG>());
2797template<
typename T>
template<Reg16 REG> II CPUCore<T>::ld_xword_SS_ED() {
2798 return WR_NN_Y<T::EE_ED>(get16<REG>());
2802template<
typename T>
template<Reg16 REG> II CPUCore<T>::ld_a_SS() {
2803 T::setMemPtr(get16<REG>() + 1);
2804 setA(RDMEM(get16<REG>(), T::CC_LD_A_SS_1));
2805 return {1, T::CC_LD_A_SS};
2809template<
typename T> II CPUCore<T>::ld_a_xbyte() {
2810 unsigned addr = RD_WORD_PC<1>(T::CC_LD_A_NN_1);
2811 T::setMemPtr(addr + 1);
2812 setA(RDMEM(addr, T::CC_LD_A_NN_2));
2813 return {3, T::CC_LD_A_NN};
2817template<
typename T>
template<Reg8 DST,
int EE> II CPUCore<T>::ld_R_byte() {
2818 set8<DST>(RDMEM_OPCODE<1>(T::CC_LD_R_N_1 + EE));
return {2, T::CC_LD_R_N + EE};
2822template<
typename T>
template<Reg8 DST> II CPUCore<T>::ld_R_xhl() {
2823 set8<DST>(RDMEM(getHL(), T::CC_LD_R_HL_1));
return {1, T::CC_LD_R_HL};
2827template<
typename T>
template<Reg8 DST, Reg16 IXY> II CPUCore<T>::ld_R_xix() {
2828 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_LD_R_XIX_1);
2829 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
2831 set8<DST>(RDMEM(addr, T::CC_DD + T::CC_LD_R_XIX_2));
2832 return {2, T::CC_DD + T::CC_LD_R_XIX};
2836template<
typename T>
template<
int EE>
inline word CPUCore<T>::RD_P_XX() {
2837 unsigned addr = RD_WORD_PC<1>(T::CC_LD_HL_XX_1 + EE);
2838 T::setMemPtr(addr + 1);
2839 return RD_WORD(addr, T::CC_LD_HL_XX_2 + EE);
2841template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::ld_SS_xword() {
2842 set16<REG>(RD_P_XX<EE>());
return {3, T::CC_LD_HL_XX + EE};
2844template<
typename T>
template<Reg16 REG> II CPUCore<T>::ld_SS_xword_ED() {
2845 set16<REG>(RD_P_XX<T::EE_ED>());
return {3, T::CC_LD_HL_XX + T::EE_ED};
2849template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::ld_SS_word() {
2850 set16<REG>(RD_WORD_PC<1>(T::CC_LD_SS_NN_1 + EE));
return {3, T::CC_LD_SS_NN + EE};
2855template<
typename T>
inline void CPUCore<T>::ADC(
byte reg) {
2856 unsigned res = getA() + reg + ((getF() & C_FLAG) ? 1 : 0);
2857 byte f = ((res & 0x100) ? C_FLAG : 0) |
2858 ((getA() ^ res ^ reg) & H_FLAG) |
2859 (((getA() ^ res) & (reg ^ res) & 0x80) >> 5) |
2861 if constexpr (T::IS_R800) {
2862 f |= table.
ZS[res & 0xFF];
2863 f |=
byte(getF() & (X_FLAG | Y_FLAG));
2865 f |= table.
ZSXY[res & 0xFF];
2868 setA(narrow_cast<byte>(res));
2870template<
typename T>
inline II CPUCore<T>::adc_a_a() {
2871 unsigned res = 2 * getA() + ((getF() & C_FLAG) ? 1 : 0);
2872 byte f = ((res & 0x100) ? C_FLAG : 0) |
2874 (((getA() ^ res) & 0x80) >> 5) |
2876 if constexpr (T::IS_R800) {
2877 f |= table.
ZS[res & 0xFF];
2878 f |=
byte(getF() & (X_FLAG | Y_FLAG));
2880 f |= table.
ZSXY[res & 0xFF];
2883 setA(narrow_cast<byte>(res));
2884 return {1, T::CC_CP_R};
2886template<
typename T>
template<Reg8 SRC,
int EE> II CPUCore<T>::adc_a_R() {
2887 ADC(get8<SRC>());
return {1, T::CC_CP_R + EE};
2889template<
typename T> II CPUCore<T>::adc_a_byte() {
2890 ADC(RDMEM_OPCODE<1>(T::CC_CP_N_1));
return {2, T::CC_CP_N};
2892template<
typename T> II CPUCore<T>::adc_a_xhl() {
2893 ADC(RDMEM(getHL(), T::CC_CP_XHL_1));
return {1, T::CC_CP_XHL};
2895template<
typename T>
template<Reg16 IXY> II CPUCore<T>::adc_a_xix() {
2896 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_CP_XIX_1);
2897 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
2899 ADC(RDMEM(addr, T::CC_DD + T::CC_CP_XIX_2));
2900 return {2, T::CC_DD + T::CC_CP_XIX};
2904template<
typename T>
inline void CPUCore<T>::ADD(
byte reg) {
2905 unsigned res = getA() + reg;
2906 byte f = ((res & 0x100) ? C_FLAG : 0) |
2907 ((getA() ^ res ^ reg) & H_FLAG) |
2908 (((getA() ^ res) & (reg ^ res) & 0x80) >> 5) |
2910 if constexpr (T::IS_R800) {
2911 f |= table.
ZS[res & 0xFF];
2912 f |=
byte(getF() & (X_FLAG | Y_FLAG));
2914 f |= table.
ZSXY[res & 0xFF];
2917 setA(narrow_cast<byte>(res));
2919template<
typename T>
inline II CPUCore<T>::add_a_a() {
2920 unsigned res = 2 * getA();
2921 byte f = ((res & 0x100) ? C_FLAG : 0) |
2923 (((getA() ^ res) & 0x80) >> 5) |
2925 if constexpr (T::IS_R800) {
2926 f |= table.
ZS[res & 0xFF];
2927 f |=
byte(getF() & (X_FLAG | Y_FLAG));
2929 f |= table.
ZSXY[res & 0xFF];
2932 setA(narrow_cast<byte>(res));
2933 return {1, T::CC_CP_R};
2935template<
typename T>
template<Reg8 SRC,
int EE> II CPUCore<T>::add_a_R() {
2936 ADD(get8<SRC>());
return {1, T::CC_CP_R + EE};
2938template<
typename T> II CPUCore<T>::add_a_byte() {
2939 ADD(RDMEM_OPCODE<1>(T::CC_CP_N_1));
return {2, T::CC_CP_N};
2941template<
typename T> II CPUCore<T>::add_a_xhl() {
2942 ADD(RDMEM(getHL(), T::CC_CP_XHL_1));
return {1, T::CC_CP_XHL};
2944template<
typename T>
template<Reg16 IXY> II CPUCore<T>::add_a_xix() {
2945 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_CP_XIX_1);
2946 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
2948 ADD(RDMEM(addr, T::CC_DD + T::CC_CP_XIX_2));
2949 return {2, T::CC_DD + T::CC_CP_XIX};
2953template<
typename T>
inline void CPUCore<T>::AND(
byte reg) {
2956 if constexpr (T::IS_R800) {
2957 f |= table.
ZSPH[getA()];
2958 f |=
byte(getF() & (X_FLAG | Y_FLAG));
2960 f |= table.
ZSPXY[getA()];
2965template<
typename T> II CPUCore<T>::and_a() {
2967 if constexpr (T::IS_R800) {
2968 f |= table.
ZSPH[getA()];
2969 f |=
byte(getF() & (X_FLAG | Y_FLAG));
2971 f |= table.
ZSPXY[getA()];
2975 return {1, T::CC_CP_R};
2977template<
typename T>
template<Reg8 SRC,
int EE> II CPUCore<T>::and_R() {
2978 AND(get8<SRC>());
return {1, T::CC_CP_R + EE};
2980template<
typename T> II CPUCore<T>::and_byte() {
2981 AND(RDMEM_OPCODE<1>(T::CC_CP_N_1));
return {2, T::CC_CP_N};
2983template<
typename T> II CPUCore<T>::and_xhl() {
2984 AND(RDMEM(getHL(), T::CC_CP_XHL_1));
return {1, T::CC_CP_XHL};
2986template<
typename T>
template<Reg16 IXY> II CPUCore<T>::and_xix() {
2987 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_CP_XIX_1);
2988 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
2990 AND(RDMEM(addr, T::CC_DD + T::CC_CP_XIX_2));
2991 return {2, T::CC_DD + T::CC_CP_XIX};
2995template<
typename T>
inline void CPUCore<T>::CP(
byte reg) {
2996 unsigned q = getA() - reg;
2997 byte f = table.
ZS[q & 0xFF] |
2998 ((q & 0x100) ? C_FLAG : 0) |
3000 ((getA() ^
byte(q) ^ reg) & H_FLAG) |
3001 (((reg ^ getA()) & (getA() ^
byte(q)) & 0x80) >> 5);
3002 if constexpr (T::IS_R800) {
3003 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3005 f |=
byte(reg & (X_FLAG | Y_FLAG));
3009template<
typename T> II CPUCore<T>::cp_a() {
3010 byte f = ZS0 | N_FLAG;
3011 if constexpr (T::IS_R800) {
3012 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3014 f |=
byte(getA() & (X_FLAG | Y_FLAG));
3017 return {1, T::CC_CP_R};
3019template<
typename T>
template<Reg8 SRC,
int EE> II CPUCore<T>::cp_R() {
3020 CP(get8<SRC>());
return {1, T::CC_CP_R + EE};
3022template<
typename T> II CPUCore<T>::cp_byte() {
3023 CP(RDMEM_OPCODE<1>(T::CC_CP_N_1));
return {2, T::CC_CP_N};
3025template<
typename T> II CPUCore<T>::cp_xhl() {
3026 CP(RDMEM(getHL(), T::CC_CP_XHL_1));
return {1, T::CC_CP_XHL};
3028template<
typename T>
template<Reg16 IXY> II CPUCore<T>::cp_xix() {
3029 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_CP_XIX_1);
3030 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
3032 CP(RDMEM(addr, T::CC_DD + T::CC_CP_XIX_2));
3033 return {2, T::CC_DD + T::CC_CP_XIX};
3037template<
typename T>
inline void CPUCore<T>::OR(
byte reg) {
3040 if constexpr (T::IS_R800) {
3041 f |= table.
ZSP[getA()];
3042 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3044 f |= table.
ZSPXY[getA()];
3048template<
typename T> II CPUCore<T>::or_a() {
3050 if constexpr (T::IS_R800) {
3051 f |= table.
ZSP[getA()];
3052 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3054 f |= table.
ZSPXY[getA()];
3057 return {1, T::CC_CP_R};
3059template<
typename T>
template<Reg8 SRC,
int EE> II CPUCore<T>::or_R() {
3060 OR(get8<SRC>());
return {1, T::CC_CP_R + EE};
3062template<
typename T> II CPUCore<T>::or_byte() {
3063 OR(RDMEM_OPCODE<1>(T::CC_CP_N_1));
return {2, T::CC_CP_N};
3065template<
typename T> II CPUCore<T>::or_xhl() {
3066 OR(RDMEM(getHL(), T::CC_CP_XHL_1));
return {1, T::CC_CP_XHL};
3068template<
typename T>
template<Reg16 IXY> II CPUCore<T>::or_xix() {
3069 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_CP_XIX_1);
3070 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
3072 OR(RDMEM(addr, T::CC_DD + T::CC_CP_XIX_2));
3073 return {2, T::CC_DD + T::CC_CP_XIX};
3077template<
typename T>
inline void CPUCore<T>::SBC(
byte reg) {
3078 unsigned res = getA() - reg - ((getF() & C_FLAG) ? 1 : 0);
3079 byte f = ((res & 0x100) ? C_FLAG : 0) |
3081 ((getA() ^ res ^ reg) & H_FLAG) |
3082 (((reg ^ getA()) & (getA() ^ res) & 0x80) >> 5);
3083 if constexpr (T::IS_R800) {
3084 f |= table.
ZS[res & 0xFF];
3085 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3087 f |= table.
ZSXY[res & 0xFF];
3090 setA(narrow_cast<byte>(res));
3092template<
typename T> II CPUCore<T>::sbc_a_a() {
3093 if constexpr (T::IS_R800) {
3094 word t = (getF() & C_FLAG)
3095 ? (255 * 256 | ZS255 | C_FLAG | H_FLAG | N_FLAG)
3096 : ( 0 * 256 | ZS0 | N_FLAG);
3097 setAF(
t | (getF() & (X_FLAG | Y_FLAG)));
3099 setAF((getF() & C_FLAG) ?
3100 (255 * 256 | ZSXY255 | C_FLAG | H_FLAG | N_FLAG) :
3101 ( 0 * 256 | ZSXY0 | N_FLAG));
3103 return {1, T::CC_CP_R};
3105template<
typename T>
template<Reg8 SRC,
int EE> II CPUCore<T>::sbc_a_R() {
3106 SBC(get8<SRC>());
return {1, T::CC_CP_R + EE};
3108template<
typename T> II CPUCore<T>::sbc_a_byte() {
3109 SBC(RDMEM_OPCODE<1>(T::CC_CP_N_1));
return {2, T::CC_CP_N};
3111template<
typename T> II CPUCore<T>::sbc_a_xhl() {
3112 SBC(RDMEM(getHL(), T::CC_CP_XHL_1));
return {1, T::CC_CP_XHL};
3114template<
typename T>
template<Reg16 IXY> II CPUCore<T>::sbc_a_xix() {
3115 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_CP_XIX_1);
3116 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
3118 SBC(RDMEM(addr, T::CC_DD + T::CC_CP_XIX_2));
3119 return {2, T::CC_DD + T::CC_CP_XIX};
3123template<
typename T>
inline void CPUCore<T>::SUB(
byte reg) {
3124 unsigned res = getA() - reg;
3125 byte f = ((res & 0x100) ? C_FLAG : 0) |
3127 ((getA() ^ res ^ reg) & H_FLAG) |
3128 (((reg ^ getA()) & (getA() ^ res) & 0x80) >> 5);
3129 if constexpr (T::IS_R800) {
3130 f |= table.
ZS[res & 0xFF];
3131 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3133 f |= table.
ZSXY[res & 0xFF];
3136 setA(narrow_cast<byte>(res));
3138template<
typename T> II CPUCore<T>::sub_a() {
3139 if constexpr (T::IS_R800) {
3140 word t = 0 * 256 | ZS0 | N_FLAG;
3141 setAF(
t | (getF() & (X_FLAG | Y_FLAG)));
3143 setAF(0 * 256 | ZSXY0 | N_FLAG);
3145 return {1, T::CC_CP_R};
3147template<
typename T>
template<Reg8 SRC,
int EE> II CPUCore<T>::sub_R() {
3148 SUB(get8<SRC>());
return {1, T::CC_CP_R + EE};
3150template<
typename T> II CPUCore<T>::sub_byte() {
3151 SUB(RDMEM_OPCODE<1>(T::CC_CP_N_1));
return {2, T::CC_CP_N};
3153template<
typename T> II CPUCore<T>::sub_xhl() {
3154 SUB(RDMEM(getHL(), T::CC_CP_XHL_1));
return {1, T::CC_CP_XHL};
3156template<
typename T>
template<Reg16 IXY> II CPUCore<T>::sub_xix() {
3157 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_CP_XIX_1);
3158 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
3160 SUB(RDMEM(addr, T::CC_DD + T::CC_CP_XIX_2));
3161 return {2, T::CC_DD + T::CC_CP_XIX};
3165template<
typename T>
inline void CPUCore<T>::XOR(
byte reg) {
3168 if constexpr (T::IS_R800) {
3169 f |= table.
ZSP[getA()];
3170 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3172 f |= table.
ZSPXY[getA()];
3176template<
typename T> II CPUCore<T>::xor_a() {
3177 if constexpr (T::IS_R800) {
3178 word t = 0 * 256 + ZSP0;
3179 setAF(
t | (getF() & (X_FLAG | Y_FLAG)));
3181 setAF(0 * 256 + ZSPXY0);
3183 return {1, T::CC_CP_R};
3185template<
typename T>
template<Reg8 SRC,
int EE> II CPUCore<T>::xor_R() {
3186 XOR(get8<SRC>());
return {1, T::CC_CP_R + EE};
3188template<
typename T> II CPUCore<T>::xor_byte() {
3189 XOR(RDMEM_OPCODE<1>(T::CC_CP_N_1));
return {2, T::CC_CP_N};
3191template<
typename T> II CPUCore<T>::xor_xhl() {
3192 XOR(RDMEM(getHL(), T::CC_CP_XHL_1));
return {1, T::CC_CP_XHL};
3194template<
typename T>
template<Reg16 IXY> II CPUCore<T>::xor_xix() {
3195 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_CP_XIX_1);
3196 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
3198 XOR(RDMEM(addr, T::CC_DD + T::CC_CP_XIX_2));
3199 return {2, T::CC_DD + T::CC_CP_XIX};
3204template<
typename T>
inline byte CPUCore<T>::DEC(
byte reg) {
3206 byte f = ((reg & ~res & 0x80) >> 5) |
3207 (((res & 0x0F) + 1) & H_FLAG) |
3209 if constexpr (T::IS_R800) {
3210 f |=
byte(getF() & (C_FLAG | X_FLAG | Y_FLAG));
3213 f |=
byte(getF() & C_FLAG);
3214 f |= table.
ZSXY[res];
3219template<
typename T>
template<Reg8 REG,
int EE> II CPUCore<T>::dec_R() {
3220 set8<REG>(DEC(get8<REG>()));
return {1, T::CC_INC_R + EE};
3222template<
typename T>
template<
int EE>
inline void CPUCore<T>::DEC_X(
unsigned x) {
3223 byte val = DEC(RDMEM(x, T::CC_INC_XHL_1 + EE));
3224 WRMEM(x, val, T::CC_INC_XHL_2 + EE);
3226template<
typename T> II CPUCore<T>::dec_xhl() {
3228 return {1, T::CC_INC_XHL};
3230template<
typename T>
template<Reg16 IXY> II CPUCore<T>::dec_xix() {
3231 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_INC_XIX_1);
3232 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
3234 DEC_X<T::CC_DD + T::EE_INC_XIX>(addr);
3235 return {2, T::CC_INC_XHL + T::CC_DD + T::EE_INC_XIX};
3239template<
typename T>
inline byte CPUCore<T>::INC(
byte reg) {
3241 byte f = ((reg & -reg & 0x80) >> 5) |
3242 (((reg & 0x0F) - 1) & H_FLAG) |
3244 if constexpr (T::IS_R800) {
3245 f |=
byte(getF() & (C_FLAG | X_FLAG | Y_FLAG));
3248 f |=
byte(getF() & C_FLAG);
3249 f |= table.
ZSXY[reg];
3254template<
typename T>
template<Reg8 REG,
int EE> II CPUCore<T>::inc_R() {
3255 set8<REG>(INC(get8<REG>()));
return {1, T::CC_INC_R + EE};
3257template<
typename T>
template<
int EE>
inline void CPUCore<T>::INC_X(
unsigned x) {
3258 byte val = INC(RDMEM(x, T::CC_INC_XHL_1 + EE));
3259 WRMEM(x, val, T::CC_INC_XHL_2 + EE);
3261template<
typename T> II CPUCore<T>::inc_xhl() {
3263 return {1, T::CC_INC_XHL};
3265template<
typename T>
template<Reg16 IXY> II CPUCore<T>::inc_xix() {
3266 int8_t ofst = RDMEM_OPCODE<1>(T::CC_DD + T::CC_INC_XIX_1);
3267 unsigned addr = narrow_cast<word>(get16<IXY>() + ofst);
3269 INC_X<T::CC_DD + T::EE_INC_XIX>(addr);
3270 return {2, T::CC_INC_XHL + T::CC_DD + T::EE_INC_XIX};
3275template<
typename T>
template<Reg16 REG>
inline II CPUCore<T>::adc_hl_SS() {
3276 unsigned reg = get16<REG>();
3277 T::setMemPtr(getHL() + 1);
3278 unsigned res = getHL() + reg + ((getF() & C_FLAG) ? 1 : 0);
3279 byte f =
byte(res >> 16) |
3281 if constexpr (T::IS_R800) {
3282 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3285 f |=
byte(((getHL() ^ res ^ reg) >> 8) & H_FLAG);
3287 f |=
byte(((getHL() ^ res) & (reg ^ res) & 0x8000) >> 13);
3288 if constexpr (T::IS_R800) {
3289 f |= (res >> 8) & S_FLAG;
3291 f |= (res >> 8) & (S_FLAG | X_FLAG | Y_FLAG);
3294 f |=
byte(((getHL() ^ reg) >> 8) & H_FLAG);
3296 f |=
byte((getHL() & reg & 0x8000) >> 13);
3300 setHL(narrow_cast<word>(res));
3301 return {1, T::CC_ADC_HL_SS};
3303template<
typename T> II CPUCore<T>::adc_hl_hl() {
3304 T::setMemPtr(getHL() + 1);
3305 unsigned res = 2 * getHL() + ((getF() & C_FLAG) ? 1 : 0);
3306 byte f =
byte(res >> 16) |
3308 if constexpr (T::IS_R800) {
3309 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3313 f |=
byte(((getHL() ^ res) & 0x8000) >> 13);
3314 if constexpr (T::IS_R800) {
3315 f |=
byte((res >> 8) & (H_FLAG | S_FLAG));
3317 f |=
byte((res >> 8) & (H_FLAG | S_FLAG | X_FLAG | Y_FLAG));
3321 f |=
byte((getHL() & 0x8000) >> 13);
3325 setHL(narrow_cast<word>(res));
3326 return {1, T::CC_ADC_HL_SS};
3330template<
typename T>
template<Reg16 REG1, Reg16 REG2,
int EE> II CPUCore<T>::add_SS_TT() {
3331 unsigned reg1 = get16<REG1>();
3332 unsigned reg2 = get16<REG2>();
3333 T::setMemPtr(reg1 + 1);
3334 unsigned res = reg1 + reg2;
3335 byte f =
byte(((reg1 ^ res ^ reg2) >> 8) & H_FLAG) |
3338 if constexpr (T::IS_R800) {
3339 f |=
byte(getF() & (S_FLAG | Z_FLAG | V_FLAG | X_FLAG | Y_FLAG));
3341 f |=
byte(getF() & (S_FLAG | Z_FLAG | V_FLAG));
3342 f |=
byte((res >> 8) & (X_FLAG | Y_FLAG));
3345 set16<REG1>(narrow_cast<word>(res));
3346 return {1, T::CC_ADD_HL_SS + EE};
3348template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::add_SS_SS() {
3349 unsigned reg = get16<REG>();
3350 T::setMemPtr(reg + 1);
3351 unsigned res = 2 * reg;
3352 byte f =
byte(res >> 16) |
3354 if constexpr (T::IS_R800) {
3355 f |=
byte(getF() & (S_FLAG | Z_FLAG | V_FLAG | X_FLAG | Y_FLAG));
3356 f |=
byte((res >> 8) & H_FLAG);
3358 f |=
byte(getF() & (S_FLAG | Z_FLAG | V_FLAG));
3359 f |=
byte((res >> 8) & (H_FLAG | X_FLAG | Y_FLAG));
3362 set16<REG>(narrow_cast<word>(res));
3363 return {1, T::CC_ADD_HL_SS + EE};
3367template<
typename T>
template<Reg16 REG>
inline II CPUCore<T>::sbc_hl_SS() {
3368 unsigned reg = get16<REG>();
3369 T::setMemPtr(getHL() + 1);
3370 unsigned res = getHL() - reg - ((getF() & C_FLAG) ? 1 : 0);
3371 byte f = ((res & 0x10000) ? C_FLAG : 0) |
3373 if constexpr (T::IS_R800) {
3374 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3377 f |=
byte(((getHL() ^ res ^ reg) >> 8) & H_FLAG);
3379 f |=
byte(((reg ^ getHL()) & (getHL() ^ res) & 0x8000) >> 13);
3380 if constexpr (T::IS_R800) {
3381 f |=
byte((res >> 8) & S_FLAG);
3383 f |=
byte((res >> 8) & (S_FLAG | X_FLAG | Y_FLAG));
3386 f |=
byte(((getHL() ^ reg) >> 8) & H_FLAG);
3388 f |=
byte(((reg ^ getHL()) & getHL() & 0x8000) >> 13);
3392 setHL(narrow_cast<word>(res));
3393 return {1, T::CC_ADC_HL_SS};
3395template<
typename T> II CPUCore<T>::sbc_hl_hl() {
3396 T::setMemPtr(getHL() + 1);
3397 byte f = T::IS_R800 ? (getF() & (X_FLAG | Y_FLAG)) : 0;
3398 if (getF() & C_FLAG) {
3399 f |= C_FLAG | H_FLAG | S_FLAG | N_FLAG;
3400 if constexpr (!T::IS_R800) {
3401 f |= X_FLAG | Y_FLAG;
3405 f |= Z_FLAG | N_FLAG;
3409 return {1, T::CC_ADC_HL_SS};
3413template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::dec_SS() {
3414 set16<REG>(narrow_cast<word>(get16<REG>() - 1));
return {1, T::CC_INC_SS + EE};
3418template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::inc_SS() {
3419 set16<REG>(narrow_cast<word>(get16<REG>() + 1));
return {1, T::CC_INC_SS + EE};
3424template<
typename T>
template<
unsigned N, Reg8 REG> II CPUCore<T>::bit_N_R() {
3425 byte reg = get8<REG>();
3427 if constexpr (T::IS_R800) {
3429 f |=
byte(getF() & (S_FLAG | V_FLAG | C_FLAG | X_FLAG | Y_FLAG));
3431 f |= (reg & (1 << N)) ? 0 : Z_FLAG;
3433 f |= table.
ZSPH[reg & (1 << N)];
3434 f |=
byte(getF() & C_FLAG);
3435 f |=
byte(reg & (X_FLAG | Y_FLAG));
3438 return {1, T::CC_BIT_R};
3440template<
typename T>
template<
unsigned N>
inline II CPUCore<T>::bit_N_xhl() {
3441 byte m = RDMEM(getHL(), T::CC_BIT_XHL_1) & (1 << N);
3443 if constexpr (T::IS_R800) {
3444 f |=
byte(getF() & (S_FLAG | V_FLAG | C_FLAG | X_FLAG | Y_FLAG));
3446 f |= m ? 0 : Z_FLAG;
3449 f |=
byte(getF() & C_FLAG);
3450 f |=
byte((T::getMemPtr() >> 8) & (X_FLAG | Y_FLAG));
3453 return {1, T::CC_BIT_XHL};
3455template<
typename T>
template<
unsigned N>
inline II CPUCore<T>::bit_N_xix(
unsigned addr) {
3457 byte m = RDMEM(addr, T::CC_DD + T::CC_BIT_XIX_1) & (1 << N);
3459 if constexpr (T::IS_R800) {
3460 f |=
byte(getF() & (S_FLAG | V_FLAG | C_FLAG | X_FLAG | Y_FLAG));
3462 f |= m ? 0 : Z_FLAG;
3465 f |=
byte(getF() & C_FLAG);
3466 f |=
byte((addr >> 8) & (X_FLAG | Y_FLAG));
3469 return {3, T::CC_DD + T::CC_BIT_XIX};
3473static constexpr byte RES(
unsigned b,
byte reg) {
3474 return reg &
byte(~(1 << b));
3476template<
typename T>
template<
unsigned N, Reg8 REG> II CPUCore<T>::res_N_R() {
3477 set8<REG>(RES(N, get8<REG>()));
return {1, T::CC_SET_R};
3479template<
typename T>
template<
int EE>
inline byte CPUCore<T>::RES_X(
unsigned bit,
unsigned addr) {
3480 byte res = RES(bit, RDMEM(addr, T::CC_SET_XHL_1 + EE));
3481 WRMEM(addr, res, T::CC_SET_XHL_2 + EE);
3484template<
typename T>
template<
unsigned N> II CPUCore<T>::res_N_xhl() {
3485 RES_X<0>(N, getHL());
return {1, T::CC_SET_XHL};
3487template<
typename T>
template<
unsigned N, Reg8 REG> II CPUCore<T>::res_N_xix_R(
unsigned a) {
3489 set8<REG>(RES_X<T::CC_DD + T::EE_SET_XIX>(N, a));
3490 return {3, T::CC_DD + T::CC_SET_XIX};
3494static constexpr byte SET(
unsigned b,
byte reg) {
3495 return reg |
byte(1 << b);
3497template<
typename T>
template<
unsigned N, Reg8 REG> II CPUCore<T>::set_N_R() {
3498 set8<REG>(SET(N, get8<REG>()));
return {1, T::CC_SET_R};
3500template<
typename T>
template<
int EE>
inline byte CPUCore<T>::SET_X(
unsigned bit,
unsigned addr) {
3501 byte res = SET(bit, RDMEM(addr, T::CC_SET_XHL_1 + EE));
3502 WRMEM(addr, res, T::CC_SET_XHL_2 + EE);
3505template<
typename T>
template<
unsigned N> II CPUCore<T>::set_N_xhl() {
3506 SET_X<0>(N, getHL());
return {1, T::CC_SET_XHL};
3508template<
typename T>
template<
unsigned N, Reg8 REG> II CPUCore<T>::set_N_xix_R(
unsigned a) {
3510 set8<REG>(SET_X<T::CC_DD + T::EE_SET_XIX>(N, a));
3511 return {3, T::CC_DD + T::CC_SET_XIX};
3515template<
typename T>
inline byte CPUCore<T>::RL(
byte reg) {
3517 reg = narrow_cast<byte>((reg << 1) | ((getF() & C_FLAG) ? 0x01 : 0));
3518 byte f = c ? C_FLAG : 0;
3519 if constexpr (T::IS_R800) {
3520 f |= table.
ZSP[reg];
3521 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3523 f |= table.
ZSPXY[reg];
3528template<
typename T>
template<
int EE>
inline byte CPUCore<T>::RL_X(
unsigned x) {
3529 byte res = RL(RDMEM(x, T::CC_SET_XHL_1 + EE));
3530 WRMEM(x, res, T::CC_SET_XHL_2 + EE);
3533template<
typename T>
template<Reg8 REG> II CPUCore<T>::rl_R() {
3534 set8<REG>(RL(get8<REG>()));
return {1, T::CC_SET_R};
3536template<
typename T> II CPUCore<T>::rl_xhl() {
3537 RL_X<0>(getHL());
return {1, T::CC_SET_XHL};
3539template<
typename T>
template<Reg8 REG> II CPUCore<T>::rl_xix_R(
unsigned a) {
3541 set8<REG>(RL_X<T::CC_DD + T::EE_SET_XIX>(a));
3542 return {3, T::CC_DD + T::CC_SET_XIX};
3546template<
typename T>
inline byte CPUCore<T>::RLC(
byte reg) {
3548 reg = narrow_cast<byte>((reg << 1) | c);
3549 byte f = c ? C_FLAG : 0;
3550 if constexpr (T::IS_R800) {
3551 f |= table.
ZSP[reg];
3552 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3554 f |= table.
ZSPXY[reg];
3559template<
typename T>
template<
int EE>
inline byte CPUCore<T>::RLC_X(
unsigned x) {
3560 byte res = RLC(RDMEM(x, T::CC_SET_XHL_1 + EE));
3561 WRMEM(x, res, T::CC_SET_XHL_2 + EE);
3564template<
typename T>
template<Reg8 REG> II CPUCore<T>::rlc_R() {
3565 set8<REG>(RLC(get8<REG>()));
return {1, T::CC_SET_R};
3567template<
typename T> II CPUCore<T>::rlc_xhl() {
3568 RLC_X<0>(getHL());
return {1, T::CC_SET_XHL};
3570template<
typename T>
template<Reg8 REG> II CPUCore<T>::rlc_xix_R(
unsigned a) {
3572 set8<REG>(RLC_X<T::CC_DD + T::EE_SET_XIX>(a));
3573 return {3, T::CC_DD + T::CC_SET_XIX};
3577template<
typename T>
inline byte CPUCore<T>::RR(
byte reg) {
3579 reg = narrow_cast<byte>((reg >> 1) | ((getF() & C_FLAG) << 7));
3580 byte f = c ? C_FLAG : 0;
3581 if constexpr (T::IS_R800) {
3582 f |= table.
ZSP[reg];
3583 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3585 f |= table.
ZSPXY[reg];
3590template<
typename T>
template<
int EE>
inline byte CPUCore<T>::RR_X(
unsigned x) {
3591 byte res = RR(RDMEM(x, T::CC_SET_XHL_1 + EE));
3592 WRMEM(x, res, T::CC_SET_XHL_2 + EE);
3595template<
typename T>
template<Reg8 REG> II CPUCore<T>::rr_R() {
3596 set8<REG>(RR(get8<REG>()));
return {1, T::CC_SET_R};
3598template<
typename T> II CPUCore<T>::rr_xhl() {
3599 RR_X<0>(getHL());
return {1, T::CC_SET_XHL};
3601template<
typename T>
template<Reg8 REG> II CPUCore<T>::rr_xix_R(
unsigned a) {
3603 set8<REG>(RR_X<T::CC_DD + T::EE_SET_XIX>(a));
3604 return {3, T::CC_DD + T::CC_SET_XIX};
3608template<
typename T>
inline byte CPUCore<T>::RRC(
byte reg) {
3610 reg = narrow_cast<byte>((reg >> 1) | (c << 7));
3611 byte f = c ? C_FLAG : 0;
3612 if constexpr (T::IS_R800) {
3613 f |= table.
ZSP[reg];
3614 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3616 f |= table.
ZSPXY[reg];
3621template<
typename T>
template<
int EE>
inline byte CPUCore<T>::RRC_X(
unsigned x) {
3622 byte res = RRC(RDMEM(x, T::CC_SET_XHL_1 + EE));
3623 WRMEM(x, res, T::CC_SET_XHL_2 + EE);
3626template<
typename T>
template<Reg8 REG> II CPUCore<T>::rrc_R() {
3627 set8<REG>(RRC(get8<REG>()));
return {1, T::CC_SET_R};
3629template<
typename T> II CPUCore<T>::rrc_xhl() {
3630 RRC_X<0>(getHL());
return {1, T::CC_SET_XHL};
3632template<
typename T>
template<Reg8 REG> II CPUCore<T>::rrc_xix_R(
unsigned a) {
3634 set8<REG>(RRC_X<T::CC_DD + T::EE_SET_XIX>(a));
3635 return {3, T::CC_DD + T::CC_SET_XIX};
3639template<
typename T>
inline byte CPUCore<T>::SLA(
byte reg) {
3642 byte f = c ? C_FLAG : 0;
3643 if constexpr (T::IS_R800) {
3644 f |= table.
ZSP[reg];
3645 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3647 f |= table.
ZSPXY[reg];
3652template<
typename T>
template<
int EE>
inline byte CPUCore<T>::SLA_X(
unsigned x) {
3653 byte res = SLA(RDMEM(x, T::CC_SET_XHL_1 + EE));
3654 WRMEM(x, res, T::CC_SET_XHL_2 + EE);
3657template<
typename T>
template<Reg8 REG> II CPUCore<T>::sla_R() {
3658 set8<REG>(SLA(get8<REG>()));
return {1, T::CC_SET_R};
3660template<
typename T> II CPUCore<T>::sla_xhl() {
3661 SLA_X<0>(getHL());
return {1, T::CC_SET_XHL};
3663template<
typename T>
template<Reg8 REG> II CPUCore<T>::sla_xix_R(
unsigned a) {
3665 set8<REG>(SLA_X<T::CC_DD + T::EE_SET_XIX>(a));
3666 return {3, T::CC_DD + T::CC_SET_XIX};
3670template<
typename T>
inline byte CPUCore<T>::SLL(
byte reg) {
3671 assert(!T::IS_R800);
3673 reg = narrow_cast<byte>((reg << 1) | 1);
3674 byte f = c ? C_FLAG : 0;
3675 f |= table.
ZSPXY[reg];
3679template<
typename T>
template<
int EE>
inline byte CPUCore<T>::SLL_X(
unsigned x) {
3680 byte res = SLL(RDMEM(x, T::CC_SET_XHL_1 + EE));
3681 WRMEM(x, res, T::CC_SET_XHL_2 + EE);
3684template<
typename T>
template<Reg8 REG> II CPUCore<T>::sll_R() {
3685 set8<REG>(SLL(get8<REG>()));
return {1, T::CC_SET_R};
3687template<
typename T> II CPUCore<T>::sll_xhl() {
3688 SLL_X<0>(getHL());
return {1, T::CC_SET_XHL};
3690template<
typename T>
template<Reg8 REG> II CPUCore<T>::sll_xix_R(
unsigned a) {
3692 set8<REG>(SLL_X<T::CC_DD + T::EE_SET_XIX>(a));
3693 return {3, T::CC_DD + T::CC_SET_XIX};
3695template<
typename T> II CPUCore<T>::sll2() {
3697 byte f = (getF() & (X_FLAG | Y_FLAG)) |
3701 return {3, T::CC_DD + T::CC_SET_XIX};
3705template<
typename T>
inline byte CPUCore<T>::SRA(
byte reg) {
3707 reg = (reg >> 1) | (reg & 0x80);
3708 byte f = c ? C_FLAG : 0;
3709 if constexpr (T::IS_R800) {
3710 f |= table.
ZSP[reg];
3711 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3713 f |= table.
ZSPXY[reg];
3718template<
typename T>
template<
int EE>
inline byte CPUCore<T>::SRA_X(
unsigned x) {
3719 byte res = SRA(RDMEM(x, T::CC_SET_XHL_1 + EE));
3720 WRMEM(x, res, T::CC_SET_XHL_2 + EE);
3723template<
typename T>
template<Reg8 REG> II CPUCore<T>::sra_R() {
3724 set8<REG>(SRA(get8<REG>()));
return {1, T::CC_SET_R};
3726template<
typename T> II CPUCore<T>::sra_xhl() {
3727 SRA_X<0>(getHL());
return {1, T::CC_SET_XHL};
3729template<
typename T>
template<Reg8 REG> II CPUCore<T>::sra_xix_R(
unsigned a) {
3731 set8<REG>(SRA_X<T::CC_DD + T::EE_SET_XIX>(a));
3732 return {3, T::CC_DD + T::CC_SET_XIX};
3736template<
typename T>
inline byte CPUCore<T>::SRL(
byte reg) {
3739 byte f = c ? C_FLAG : 0;
3740 if constexpr (T::IS_R800) {
3741 f |= table.
ZSP[reg];
3742 f |=
byte(getF() & (X_FLAG | Y_FLAG));
3744 f |= table.
ZSPXY[reg];
3749template<
typename T>
template<
int EE>
inline byte CPUCore<T>::SRL_X(
unsigned x) {
3750 byte res = SRL(RDMEM(x, T::CC_SET_XHL_1 + EE));
3751 WRMEM(x, res, T::CC_SET_XHL_2 + EE);
3754template<
typename T>
template<Reg8 REG> II CPUCore<T>::srl_R() {
3755 set8<REG>(SRL(get8<REG>()));
return {1, T::CC_SET_R};
3757template<
typename T> II CPUCore<T>::srl_xhl() {
3758 SRL_X<0>(getHL());
return {1, T::CC_SET_XHL};
3760template<
typename T>
template<Reg8 REG> II CPUCore<T>::srl_xix_R(
unsigned a) {
3762 set8<REG>(SRL_X<T::CC_DD + T::EE_SET_XIX>(a));
3763 return {3, T::CC_DD + T::CC_SET_XIX};
3767template<
typename T> II CPUCore<T>::rla() {
3768 byte c = getF() & C_FLAG;
3769 byte f = (getA() & 0x80) ? C_FLAG : 0;
3770 if constexpr (T::IS_R800) {
3771 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | X_FLAG | Y_FLAG));
3773 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG));
3775 setA(narrow_cast<byte>((getA() << 1) | (c ? 1 : 0)));
3776 if constexpr (!T::IS_R800) {
3777 f |=
byte(getA() & (X_FLAG | Y_FLAG));
3780 return {1, T::CC_RLA};
3782template<
typename T> II CPUCore<T>::rlca() {
3783 setA(narrow_cast<byte>((getA() << 1) | (getA() >> 7)));
3785 if constexpr (T::IS_R800) {
3786 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | X_FLAG | Y_FLAG));
3787 f |=
byte(getA() & C_FLAG);
3789 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG));
3790 f |=
byte(getA() & (Y_FLAG | X_FLAG | C_FLAG));
3793 return {1, T::CC_RLA};
3795template<
typename T> II CPUCore<T>::rra() {
3796 auto c =
byte((getF() & C_FLAG) << 7);
3797 byte f = (getA() & 0x01) ? C_FLAG : 0;
3798 if constexpr (T::IS_R800) {
3799 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | X_FLAG | Y_FLAG));
3801 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG));
3803 setA((getA() >> 1) | c);
3804 if constexpr (!T::IS_R800) {
3805 f |=
byte(getA() & (X_FLAG | Y_FLAG));
3808 return {1, T::CC_RLA};
3810template<
typename T> II CPUCore<T>::rrca() {
3811 byte f = getA() & C_FLAG;
3812 if constexpr (T::IS_R800) {
3813 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | X_FLAG | Y_FLAG));
3815 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG));
3817 setA(narrow_cast<byte>((getA() >> 1) | (getA() << 7)));
3818 if constexpr (!T::IS_R800) {
3819 f |=
byte(getA() & (X_FLAG | Y_FLAG));
3822 return {1, T::CC_RLA};
3827template<
typename T> II CPUCore<T>::rld() {
3828 byte val = RDMEM(getHL(), T::CC_RLD_1);
3829 T::setMemPtr(getHL() + 1);
3830 WRMEM(getHL(), narrow_cast<byte>((val << 4) | (getA() & 0x0F)), T::CC_RLD_2);
3831 setA((getA() & 0xF0) | (val >> 4));
3833 if constexpr (T::IS_R800) {
3834 f |=
byte(getF() & (C_FLAG | X_FLAG | Y_FLAG));
3835 f |= table.
ZSP[getA()];
3837 f |=
byte(getF() & C_FLAG);
3838 f |= table.
ZSPXY[getA()];
3841 return {1, T::CC_RLD};
3845template<
typename T> II CPUCore<T>::rrd() {
3846 byte val = RDMEM(getHL(), T::CC_RLD_1);
3847 T::setMemPtr(getHL() + 1);
3848 WRMEM(getHL(), narrow_cast<byte>((val >> 4) | (getA() << 4)), T::CC_RLD_2);
3849 setA((getA() & 0xF0) | (val & 0x0F));
3851 if constexpr (T::IS_R800) {
3852 f |=
byte(getF() & (C_FLAG | X_FLAG | Y_FLAG));
3853 f |= table.
ZSP[getA()];
3855 f |=
byte(getF() & C_FLAG);
3856 f |= table.
ZSPXY[getA()];
3859 return {1, T::CC_RLD};
3864template<
typename T>
template<
int EE>
inline void CPUCore<T>::PUSH(
word reg) {
3866 WR_WORD_rev<true, true>(getSP(), reg, T::CC_PUSH_1 + EE);
3868template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::push_SS() {
3869 PUSH<EE>(get16<REG>());
return {1, T::CC_PUSH + EE};
3873template<
typename T>
template<
int EE>
inline word CPUCore<T>::POP() {
3874 word addr = getSP();
3876 if constexpr (T::IS_R800) {
3878 if constexpr (EE == 0) {
3886 return RD_WORD(addr, T::CC_POP_1 + EE);
3888template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::pop_SS() {
3889 set16<REG>(POP<EE>());
return {1, T::CC_POP + EE};
3894template<
typename T>
template<
typename COND> II CPUCore<T>::call(COND cond) {
3895 word addr = RD_WORD_PC<1>(T::CC_CALL_1);
3898 PUSH<T::EE_CALL>(getPC() + 3);
3900 if constexpr (T::IS_R800) {
3902 setSlowInstructions();
3904 return {0, T::CC_CALL_A};
3906 return {3, T::CC_CALL_B};
3912template<
typename T>
template<
unsigned ADDR> II CPUCore<T>::rst() {
3913 PUSH<0>(getPC() + 1);
3916 if constexpr (T::IS_R800) {
3918 setSlowInstructions();
3920 return {0, T::CC_RST};
3925template<
typename T>
template<
int EE,
typename COND>
inline II CPUCore<T>::RET(COND cond) {
3927 auto addr = POP<EE>();
3930 return {0, T::CC_RET_A + EE};
3932 return {1, T::CC_RET_B + EE};
3935template<
typename T>
template<
typename COND> II CPUCore<T>::ret(COND cond) {
3936 return RET<T::EE_RET_C>(cond);
3938template<
typename T> II CPUCore<T>::ret() {
3939 return RET<0>(CondTrue());
3941template<
typename T> II CPUCore<T>::retn() {
3943 setSlowInstructions();
3944 return RET<T::EE_RETN>(CondTrue());
3949template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::jp_SS() {
3950 setPC(get16<REG>()); T::R800ForcePageBreak();
return {0, T::CC_JP_HL + EE};
3954template<
typename T>
template<
typename COND> II CPUCore<T>::jp(COND cond) {
3955 word addr = RD_WORD_PC<1>(T::CC_JP_1);
3959 T::R800ForcePageBreak();
3960 return {0, T::CC_JP_A};
3962 return {3, T::CC_JP_B};
3967template<
typename T>
template<
typename COND> II CPUCore<T>::jr(COND cond) {
3968 int8_t ofst = RDMEM_OPCODE<1>(T::CC_JR_1);
3970 if (((getPC() + 2) & 0xFF) == 0) {
3998 T::R800ForcePageBreak();
4000 setPC(narrow_cast<word>(getPC() + 2 + ofst));
4001 T::setMemPtr(getPC());
4002 return {0, T::CC_JR_A};
4004 return {2, T::CC_JR_B};
4009template<
typename T> II CPUCore<T>::djnz() {
4010 byte b = getB() - 1;
4012 int8_t ofst = RDMEM_OPCODE<1>(T::CC_JR_1 + T::EE_DJNZ);
4014 if (((getPC() + 2) & 0xFF) == 0) {
4016 T::R800ForcePageBreak();
4018 setPC(narrow_cast<word>(getPC() + 2 + ofst));
4019 T::setMemPtr(getPC());
4020 return {0, T::CC_JR_A + T::EE_DJNZ};
4022 return {2, T::CC_JR_B + T::EE_DJNZ};
4027template<
typename T>
template<Reg16 REG,
int EE> II CPUCore<T>::ex_xsp_SS() {
4028 word res = RD_WORD_impl<true, false>(getSP(), T::CC_EX_SP_HL_1 + EE);
4030 WR_WORD_rev<false, true>(getSP(), get16<REG>(), T::CC_EX_SP_HL_2 + EE);
4032 return {1, T::CC_EX_SP_HL + EE};
4036template<
typename T>
template<Reg8 REG> II CPUCore<T>::in_R_c() {
4037 if constexpr (T::IS_R800) T::waitForEvenCycle(T::CC_IN_R_C_1);
4038 T::setMemPtr(getBC() + 1);
4039 byte res = READ_PORT(getBC(), T::CC_IN_R_C_1);
4041 if constexpr (T::IS_R800) {
4042 f |=
byte(getF() & (C_FLAG | X_FLAG | Y_FLAG));
4043 f |= table.
ZSP[res];
4045 f |=
byte(getF() & C_FLAG);
4046 f |= table.
ZSPXY[res];
4050 return {1, T::CC_IN_R_C};
4054template<
typename T> II CPUCore<T>::in_a_byte() {
4055 unsigned y = RDMEM_OPCODE<1>(T::CC_IN_A_N_1) + 256 * getA();
4056 T::setMemPtr(y + 1);
4057 if constexpr (T::IS_R800) T::waitForEvenCycle(T::CC_IN_A_N_2);
4058 setA(READ_PORT(narrow_cast<word>(y), T::CC_IN_A_N_2));
4059 return {2, T::CC_IN_A_N};
4063template<
typename T>
template<Reg8 REG> II CPUCore<T>::out_c_R() {
4064 if constexpr (T::IS_R800) T::waitForEvenCycle(T::CC_OUT_C_R_1);
4065 T::setMemPtr(getBC() + 1);
4066 WRITE_PORT(getBC(), get8<REG>(), T::CC_OUT_C_R_1);
4067 return {1, T::CC_OUT_C_R};
4069template<
typename T> II CPUCore<T>::out_c_0() {
4071 if constexpr (T::IS_R800) T::waitForEvenCycle(T::CC_OUT_C_R_1);
4072 T::setMemPtr(getBC() + 1);
4073 byte out_c_x = isCMOS ? 255 : 0;
4074 WRITE_PORT(getBC(), out_c_x, T::CC_OUT_C_R_1);
4075 return {1, T::CC_OUT_C_R};
4079template<
typename T> II CPUCore<T>::out_byte_a() {
4080 byte port = RDMEM_OPCODE<1>(T::CC_OUT_N_A_1);
4081 auto y = narrow_cast<word>((getA() << 8) | port);
4082 T::setMemPtr((getA() << 8) | ((port + 1) & 255));
4083 if constexpr (T::IS_R800) T::waitForEvenCycle(T::CC_OUT_N_A_2);
4084 WRITE_PORT(y, getA(), T::CC_OUT_N_A_2);
4085 return {2, T::CC_OUT_N_A};
4090template<
typename T>
inline II CPUCore<T>::BLOCK_CP(
int increase,
bool repeat) {
4091 T::setMemPtr(T::getMemPtr() + increase);
4092 byte val = RDMEM(getHL(), T::CC_CPI_1);
4093 byte res = getA() - val;
4094 setHL(narrow_cast<word>(getHL() + increase));
4096 byte f = ((getA() ^ val ^ res) & H_FLAG) |
4099 (getBC() ? V_FLAG : 0);
4100 if constexpr (T::IS_R800) {
4101 f |=
byte(getF() & (C_FLAG | X_FLAG | Y_FLAG));
4103 f |=
byte(getF() & C_FLAG);
4104 unsigned k = res - ((f & H_FLAG) >> 4);
4105 f |= (k << 4) & Y_FLAG;
4109 if (
repeat && getBC() && res) {
4111 T::setMemPtr(getPC() + 1);
4112 return {
word(-1), T::CC_CPIR};
4114 return {1, T::CC_CPI};
4117template<
typename T> II CPUCore<T>::cpd() {
return BLOCK_CP(-1,
false); }
4118template<
typename T> II CPUCore<T>::cpi() {
return BLOCK_CP( 1,
false); }
4119template<
typename T> II CPUCore<T>::cpdr() {
return BLOCK_CP(-1,
true ); }
4120template<
typename T> II CPUCore<T>::cpir() {
return BLOCK_CP( 1,
true ); }
4124template<
typename T>
inline II CPUCore<T>::BLOCK_LD(
int increase,
bool repeat) {
4125 byte val = RDMEM(getHL(), T::CC_LDI_1);
4126 WRMEM(getDE(), val, T::CC_LDI_2);
4127 setHL(narrow_cast<word>(getHL() + increase));
4128 setDE(narrow_cast<word>(getDE() + increase));
4130 byte f = getBC() ? V_FLAG : 0;
4131 if constexpr (T::IS_R800) {
4132 f |=
byte(getF() & (S_FLAG | Z_FLAG | C_FLAG | X_FLAG | Y_FLAG));
4134 f |=
byte(getF() & (S_FLAG | Z_FLAG | C_FLAG));
4135 f |=
byte(((getA() + val) << 4) & Y_FLAG);
4136 f |=
byte((getA() + val) & X_FLAG);
4141 T::setMemPtr(getPC() + 1);
4142 return {
word(-1), T::CC_LDIR};
4144 return {1, T::CC_LDI};
4147template<
typename T> II CPUCore<T>::ldd() {
return BLOCK_LD(-1,
false); }
4148template<
typename T> II CPUCore<T>::ldi() {
return BLOCK_LD( 1,
false); }
4149template<
typename T> II CPUCore<T>::lddr() {
return BLOCK_LD(-1,
true ); }
4150template<
typename T> II CPUCore<T>::ldir() {
return BLOCK_LD( 1,
true ); }
4154template<
typename T>
inline II CPUCore<T>::BLOCK_IN(
int increase,
bool repeat) {
4155 if constexpr (T::IS_R800) T::waitForEvenCycle(T::CC_INI_1);
4156 T::setMemPtr(getBC() + increase);
4157 setBC(getBC() - 0x100);
4158 byte val = READ_PORT(getBC(), T::CC_INI_1);
4159 WRMEM(getHL(), val, T::CC_INI_2);
4160 setHL(narrow_cast<word>(getHL() + increase));
4161 unsigned k = val + ((getC() + increase) & 0xFF);
4163 if constexpr (T::IS_R800) {
4164 setF((getF() & ~Z_FLAG) | (b ? 0 : Z_FLAG) | N_FLAG);
4166 setF(((val & S_FLAG) >> 6) |
4167 ((k & 0x100) ? (H_FLAG | C_FLAG) : 0) |
4169 (table.ZSPXY[(k & 0x07) ^ b] & P_FLAG));
4173 return {
word(-1), T::CC_INIR};
4175 return {1, T::CC_INI};
4178template<
typename T> II CPUCore<T>::ind() {
return BLOCK_IN(-1,
false); }
4179template<
typename T> II CPUCore<T>::ini() {
return BLOCK_IN( 1,
false); }
4180template<
typename T> II CPUCore<T>::indr() {
return BLOCK_IN(-1,
true ); }
4181template<
typename T> II CPUCore<T>::inir() {
return BLOCK_IN( 1,
true ); }
4185template<
typename T>
inline II CPUCore<T>::BLOCK_OUT(
int increase,
bool repeat) {
4186 byte val = RDMEM(getHL(), T::CC_OUTI_1);
4187 setHL(narrow_cast<word>(getHL() + increase));
4188 if constexpr (T::IS_R800) T::waitForEvenCycle(T::CC_OUTI_2);
4189 WRITE_PORT(getBC(), val, T::CC_OUTI_2);
4190 setBC(getBC() - 0x100);
4191 T::setMemPtr(getBC() + increase);
4192 unsigned k = val + getL();
4194 if constexpr (T::IS_R800) {
4195 setF((getF() & ~Z_FLAG) | (b ? 0 : Z_FLAG) | N_FLAG);
4197 setF(((val & S_FLAG) >> 6) |
4198 ((k & 0x100) ? (H_FLAG | C_FLAG) : 0) |
4200 (table.ZSPXY[(k & 0x07) ^ b] & P_FLAG));
4204 return {
word(-1), T::CC_OTIR};
4206 return {1, T::CC_OUTI};
4209template<
typename T> II CPUCore<T>::outd() {
return BLOCK_OUT(-1,
false); }
4210template<
typename T> II CPUCore<T>::outi() {
return BLOCK_OUT( 1,
false); }
4211template<
typename T> II CPUCore<T>::otdr() {
return BLOCK_OUT(-1,
true ); }
4212template<
typename T> II CPUCore<T>::otir() {
return BLOCK_OUT( 1,
true ); }
4216template<
typename T>
template<
int EE> II CPUCore<T>::nop() {
return {1, T::CC_NOP + EE}; }
4217template<
typename T> II CPUCore<T>::ccf() {
4219 if constexpr (T::IS_R800) {
4221 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | C_FLAG | X_FLAG | Y_FLAG | H_FLAG));
4223 f |=
byte((getF() & C_FLAG) << 4);
4227 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | C_FLAG | Y_FLAG));
4228 f |=
byte((getF() | getA()) & X_FLAG);
4230 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | C_FLAG));
4231 f |=
byte((getF() | getA()) & (X_FLAG | Y_FLAG));
4236 return {1, T::CC_CCF};
4238template<
typename T> II CPUCore<T>::cpl() {
4239 setA(getA() ^ 0xFF);
4240 byte f = H_FLAG | N_FLAG;
4241 if constexpr (T::IS_R800) {
4244 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | C_FLAG));
4245 f |=
byte(getA() & (X_FLAG | Y_FLAG));
4248 return {1, T::CC_CPL};
4250template<
typename T> II CPUCore<T>::daa() {
4254 if ((f & H_FLAG) || ((getA() & 0xf) > 9)) adjust += 6;
4255 if ((f & C_FLAG) || (getA() > 0x99)) adjust += 0x60;
4256 if (f & N_FLAG) a -= adjust;
else a += adjust;
4257 if constexpr (T::IS_R800) {
4258 f &= C_FLAG | N_FLAG | X_FLAG | Y_FLAG;
4261 f &= C_FLAG | N_FLAG;
4262 f |= table.
ZSPXY[a];
4264 f |=
byte((getA() > 0x99) | ((getA() ^ a) & H_FLAG));
4267 return {1, T::CC_DAA};
4269template<
typename T> II CPUCore<T>::neg() {
4271 unsigned a = getA();
4272 unsigned res = -signed(a);
4273 byte f = ((res & 0x100) ? C_FLAG : 0) |
4275 ((res ^ a) & H_FLAG) |
4276 ((a & res & 0x80) >> 5);
4277 if constexpr (T::IS_R800) {
4278 f |= table.
ZS[res & 0xFF];
4279 f |=
byte(getF() & (X_FLAG | Y_FLAG));
4281 f |= table.
ZSXY[res & 0xFF];
4284 setA(narrow_cast<byte>(res));
4285 return {1, T::CC_NEG};
4287template<
typename T> II CPUCore<T>::scf() {
4289 if constexpr (T::IS_R800) {
4290 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | X_FLAG | Y_FLAG));
4295 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG | Y_FLAG));
4296 f |=
byte((getF() | getA()) & X_FLAG);
4298 f |=
byte(getF() & (S_FLAG | Z_FLAG | P_FLAG));
4299 f |=
byte((getF() | getA()) & (X_FLAG | Y_FLAG));
4303 return {1, T::CC_SCF};
4306template<
typename T> II CPUCore<T>::ex_af_af() {
4307 auto t = getAF2(); setAF2(getAF()); setAF(
t);
4308 return {1, T::CC_EX};
4310template<
typename T> II CPUCore<T>::ex_de_hl() {
4311 auto t = getDE(); setDE(getHL()); setHL(
t);
4312 return {1, T::CC_EX};
4314template<
typename T> II CPUCore<T>::exx() {
4315 auto t1 = getBC2(); setBC2(getBC()); setBC(t1);
4316 auto t2 = getDE2(); setDE2(getDE()); setDE(t2);
4317 auto t3 = getHL2(); setHL2(getHL()); setHL(t3);
4318 return {1, T::CC_EX};
4321template<
typename T> II CPUCore<T>::di() {
4324 return {1, T::CC_DI};
4326template<
typename T> II CPUCore<T>::ei() {
4330 setSlowInstructions();
4331 return {1, T::CC_EI};
4333template<
typename T> II CPUCore<T>::halt() {
4335 setSlowInstructions();
4337 if (!(getIFF1() || getIFF2())) {
4338 diHaltCallback.execute();
4340 return {1, T::CC_HALT};
4342template<
typename T>
template<
unsigned N> II CPUCore<T>::im_N() {
4343 setIM(N);
return {1, T::CC_IM};
4347template<
typename T>
template<Reg8 REG> II CPUCore<T>::ld_a_IR() {
4349 byte f = getIFF2() ? V_FLAG : 0;
4350 if constexpr (T::IS_R800) {
4351 f |=
byte(getF() & (C_FLAG | X_FLAG | Y_FLAG));
4352 f |= table.
ZS[getA()];
4354 f |=
byte(getF() & C_FLAG);
4355 f |= table.
ZSXY[getA()];
4358 setSlowInstructions();
4361 return {1, T::CC_LD_A_I};
4365template<
typename T> II CPUCore<T>::ld_r_a() {
4374 if constexpr (T::IS_R800) val -= 1;
4376 return {1, T::CC_LD_A_I};
4378template<
typename T> II CPUCore<T>::ld_i_a() {
4380 return {1, T::CC_LD_A_I};
4384template<
typename T>
template<Reg8 REG> II CPUCore<T>::mulub_a_R() {
4391 setHL(
word(getA()) *
word(get8<REG>()));
4392 setF((getF() & (N_FLAG | H_FLAG | X_FLAG | Y_FLAG)) |
4394 (getHL() ? 0 : Z_FLAG) |
4395 ((getHL() & 0xFF00) ? C_FLAG : 0));
4396 return {1, T::CC_MULUB};
4400template<
typename T>
template<Reg16 REG> II CPUCore<T>::muluw_hl_SS() {
4407 uint32_t res = uint32_t(getHL()) * get16<REG>();
4408 setDE(narrow_cast<word>(res >> 16));
4409 setHL(narrow_cast<word>(res >> 0));
4410 setF((getF() & (N_FLAG | H_FLAG | X_FLAG | Y_FLAG)) |
4412 (res ? 0 : Z_FLAG) |
4413 ((res & 0xFFFF0000) ? C_FLAG : 0));
4414 return {1, T::CC_MULUW};
4424template<
typename T>
template<
typename Archive>
4427 T::serialize(ar, version);
4428 ar.serialize(
"regs",
static_cast<CPURegs&
>(*
this));
4429 if (ar.versionBelow(version, 2)) {
4431 ar.serialize(
"memptr", mPtr);
4435 if (ar.versionBelow(version, 5)) {
4444 ar.serialize(
"nmiEdge", nmiEdge);
4453 if constexpr (T::IS_R800) {
4454 if (ar.versionBelow(version, 4)) {
4455 motherboard.getMSXCliComm().printWarning(
4456 "Loading an old savestate: the timing of the R800 "
4457 "emulation has changed. This may cause synchronization "
4458 "problems in replay.");