27static constexpr auto sectorInfo = [] {
29 using Info = AmdFlash::SectorInfo;
30 std::array<Info, 8 + 127> result = {};
31 std::fill(result.begin(), result.begin() + 8,
Info{ 8 * 1024, false});
32 std::fill(result.begin() + 8, result.end(),
Info{64 * 1024, false});
39 , flash(getName() +
" flash", sectorInfo, 0x207e,
40 AmdFlash::Addressing::BITS_12, config)
41 , ram(config, getName() +
" ram",
"ram", 2048 * 1024)
42 , eeprom(getName() +
" eeprom",
44 , scc(getName() +
" scc", config, getCurrentTime(),
SCC::SCC_Compatible)
47 , ym2413(getName() +
" ym2413", config)
56 configRegs[0x35] = 0xf0;
72 writeSndLVL(0x1b, time);
73 writePSGCtrl(0x1b, time);
85 configRegs[0x00] = 0x30;
86 for (
int i : {0x01, 0x02, 0x03}) configRegs[i] = 0;
87 configRegs[0x05] = shadowConfigRegs[0x05] = 0;
89 configRegs[0x06] = shadowConfigRegs[0x06] = 0xF8;
90 configRegs[0x07] = shadowConfigRegs[0x07] = 0x50;
91 configRegs[0x08] = shadowConfigRegs[0x08] = 0x00;
92 configRegs[0x09] = shadowConfigRegs[0x09] = 0x85;
93 configRegs[0x0a] = shadowConfigRegs[0x0a] = 0x03;
94 configRegs[0x0b] = shadowConfigRegs[0x0b] = 0x40;
96 for (
int i : {0x0f, 0x15, 0x1b}) {
97 configRegs[i] = shadowConfigRegs[i] = 0;
100 configRegs[0x1e] = shadowConfigRegs[0x1e] = 0xff;
101 configRegs[0x20] = 0x02;
102 configRegs[0x28] = 0b11'10'01'00;
106 writeCfgEEPR(0, time);
119 ideSelectedDevice = 0;
120 ideSoftReset =
false;
121 ideDevices[0]->reset(time);
122 ideDevices[1]->reset(time);
140 if (!delayedConfig())
return;
142 if ((!delayedConfig4000() && (address == 0x0000) && (
getCPU().isM1Cycle(address))) ||
143 ( delayedConfig4000() && (address <= 0x4000) && (address < 0x4010))) {
145 for (
auto i :
xrange(0x05, 0x1f)) {
146 configRegs[i] = shadowConfigRegs[i];
151Carnivore2::SubDevice Carnivore2::getSubDevice(
word address)
const
155 if (slotExpanded()) {
156 auto page = narrow<byte>(address >> 14);
157 byte selectedSubSlot = (subSlotReg >> (2 * page)) & 0x03;
158 if (subSlotEnabled(selectedSubSlot)) {
159 subSlot = selectedSubSlot;
163 if (subSlotEnabled(i)) {
170 using enum SubDevice;
171 if (subSlot == (configRegs[0x28] & 0b00'00'00'11) >> 0) {
173 }
else if (subSlot == (configRegs[0x28] & 0b00'00'11'00) >> 2) {
175 }
else if (subSlot == (configRegs[0x28] & 0b00'11'00'00) >> 4) {
177 }
else if (subSlot == (configRegs[0x28] & 0b11'00'00'00) >> 6) {
186 if (slotExpanded() && (address == 0xffff)) {
187 return subSlotReg ^ 0xff;
189 switch (getSubDevice(address)) {
190 using enum SubDevice;
191 case MultiMapper:
return readMultiMapperSlot(address, time);
192 case IDE:
return readIDESlot(address, time);
193 case MemoryMapper:
return readMemoryMapperSlot(address);
194 case FmPac:
return readFmPacSlot(address);
195 default:
return 0xff;
201 if (slotExpanded() && (address == 0xffff)) {
202 return subSlotReg ^ 0xff;
204 switch (getSubDevice(address)) {
205 using enum SubDevice;
206 case MultiMapper:
return peekMultiMapperSlot(address, time);
207 case IDE:
return peekIDESlot(address, time);
208 case MemoryMapper:
return peekMemoryMapperSlot(address);
209 case FmPac:
return peekFmPacSlot(address);
210 default:
return 0xff;
216 if (slotExpanded() && (address == 0xffff)) {
221 switch (getSubDevice(address)) {
222 using enum SubDevice;
224 writeMultiMapperSlot(address, value, time);
227 writeIDESlot(address, value, time);
230 writeMemoryMapperSlot(address, value);
233 writeFmPacSlot(address, value, time);
241unsigned Carnivore2::getDirectFlashAddr()
const
243 return (configRegs[0x01] << 0) |
244 (configRegs[0x02] << 8) |
245 (configRegs[0x03] << 16);
248byte Carnivore2::peekConfigRegister(
word address, EmuTime::param time)
const
251 if ((0x05 <= address) && (address <= 0x1e)) {
254 return shadowConfigRegs[address];
257 case 0x04:
return flash.
peek(getDirectFlashAddr());
258 case 0x1f:
return configRegs[0x00];
259 case 0x23:
return byte(configRegs[address] |
261 case 0x2C:
return '2';
262 case 0x2D:
return '5';
263 case 0x2E:
return '0';
264 default:
return configRegs[address];
269byte Carnivore2::readConfigRegister(
word address, EmuTime::param time)
const
272 if (address == 0x04) {
273 return flash.
read(getDirectFlashAddr());
275 return peekConfigRegister(address, time);
279static constexpr float volumeLevel(
byte volume)
281 constexpr std::array<byte, 8> tab = {5, 6, 7, 8, 10, 12, 14, 16};
282 return narrow<float>(tab[volume & 7]) * (1.0f / 16.0f);
285void Carnivore2::writeSndLVL(
byte value, EmuTime::param time)
287 configRegs[0x22] = value;
292void Carnivore2::writeCfgEEPR(
byte value, EmuTime::param time)
294 configRegs[0x23] = value & 0x0e;
300void Carnivore2::writePSGCtrl(
byte value, EmuTime::param time)
303 if ((value ^ configRegs[0x24]) & 0x80) {
304 byte ioBase = (configRegs[0x30] & 0x01) ? 0x10 : 0xa0;
313 configRegs[0x24] = value;
317void Carnivore2::writePSGAlt(
byte value)
319 if ((value ^ configRegs[0x30]) & 0x01) {
320 if (configRegs[0x24] & 0x80) {
321 byte ioBaseOld = (configRegs[0x30] & 0x01) ? 0x10 : 0xa0;
322 byte ioBaseNew = (value & 0x01) ? 0x10 : 0xa0;
329 configRegs[0x30] = value;
332void Carnivore2::writePFXN(
byte value)
334 byte oldPort = idControlPort();
335 configRegs[0x35] = 0xf0 | (value & 0b11);
336 if (
auto newPort = idControlPort(); newPort != oldPort) {
345[[nodiscard]]
static bool bitPairsUnique(uint8_t x)
348 for (
int i = 0; i < 4; ++i) {
349 seen |= 1 << (x & 3);
352 return seen == 0b1111;
355void Carnivore2::writeConfigRegister(
word address,
byte value, EmuTime::param time)
358 if ((0x05 <= address) && (address <= 0x1e)) {
360 if (address == 0x05) value &= 0x7f;
361 if ((address == 0x1e) && ((value & 0x8f) == 0x0f))
return;
363 shadowConfigRegs[address] = value;
364 if (!delayedConfig()) configRegs[address] = value;
367 case 0x03: configRegs[address] = value & 0x7f;
break;
368 case 0x04: flash.
write(getDirectFlashAddr(), value);
break;
369 case 0x1f: configRegs[0x00] = value;
break;
370 case 0x20: configRegs[address] = value & 0x07;
break;
371 case 0x22: writeSndLVL(value, time);
break;
372 case 0x23: writeCfgEEPR(value, time);
break;
373 case 0x24: writePSGCtrl(value, time);
break;
374 case 0x30: writePSGAlt(value);
break;
375 case 0x35: writePFXN(value);
break;
377 if (!bitPairsUnique(value)) {
379 "Illegal value of ", value,
380 "written to SLM_cfg register");
383 default: configRegs[address] = value;
break;
388bool Carnivore2::isConfigReg(
word address)
const
390 if (configRegs[0x00] & 0x80)
return false;
391 unsigned base = ((configRegs[0x00] & 0x60) << 9) | 0xF80;
392 return (base <= address) && (address < (base + 0x40));
395std::pair<unsigned, byte> Carnivore2::decodeMultiMapper(
word address)
const
398 for (
auto i :
xrange(4)) {
399 auto base = subspan<6>(configRegs, (i * 6) + 6);
401 if (mult & 8)
continue;
403 byte sizeCode = mult & 7;
404 if (sizeCode < 3)
continue;
407 bool mirroringDisabled = mult & 0x40;
408 static constexpr std::array checkMasks = {
409 std::array<byte, 8>{0x00, 0x00, 0x00, 0x30, 0x60, 0xc0, 0x80, 0x00},
410 std::array<byte, 8>{0x00, 0x00, 0x00, 0xf0, 0xe0, 0xc0, 0x80, 0x00},
412 byte checkMask = checkMasks[mirroringDisabled][sizeCode];
413 if (((address >> 8) & checkMask) != (base[5] & checkMask))
continue;
416 byte bank = base[2] & base[4];
417 unsigned size = 512 << sizeCode;
418 unsigned addr = (bank *
size) | (address & (size - 1));
419 addr += configRegs[0x05] * 0x10000;
423 return {unsigned(-1),
byte(-1)};
426bool Carnivore2::sccAccess(
word address)
const
428 if (!sccEnabled())
return false;
429 if (sccMode & 0x20) {
431 return (0xb800 <= address) && (address < 0xc000) &&
432 ((sccBank[3] & 0x80) == 0x80);
435 return (0x9800 <= address) && (address < 0xa000) &&
436 ((sccBank[2] & 0x3f) == 0x3f);
440byte Carnivore2::readMultiMapperSlot(
word address, EmuTime::param time)
442 if (isConfigReg(address)) {
443 return readConfigRegister(address, time);
445 if (sccAccess(address)) {
446 return scc.
readMem(narrow_cast<uint8_t>(address & 0xff), time);
449 auto [addr, mult] = decodeMultiMapper(address);
450 if (addr ==
unsigned(-1))
return 0xff;
453 return ram[addr & 0x1fffff];
455 return flash.
read(addr);
459byte Carnivore2::peekMultiMapperSlot(
word address, EmuTime::param time)
const
461 if (isConfigReg(address)) {
462 return peekConfigRegister(address, time);
465 auto [addr, mult] = decodeMultiMapper(address);
466 if (addr ==
unsigned(-1))
return 0xff;
469 return ram[addr & 0x1fffff];
471 return flash.
peek(addr);
475void Carnivore2::writeMultiMapperSlot(
word address,
byte value, EmuTime::param time)
477 if (isConfigReg(address)) {
479 return writeConfigRegister(address, value, time);
483 for (
auto i :
xrange(4)) {
484 auto base = subspan<6>(configRegs, (i * 6) + 6);
489 if (((address >> 8) & mask) == (addr & mask)) {
491 configRegs[(i * 6) + 6 + 2] = value;
492 shadowConfigRegs[(i * 6) + 6 + 2] = value;
497 auto [addr, mult] = decodeMultiMapper(address);
498 if ((addr !=
unsigned(-1)) && (mult & 0x10)) {
500 ram[addr & 0x1fffff] = value;
502 flash.
write(addr, value);
506 if (sccEnabled() && ((address | 1) == 0xbfff)) {
511 if (((sccMode & 0x10) == 0x00) &&
512 ((address & 0x1800) == 0x1000)) {
513 auto region = narrow<byte>((address >> 13) - 2);
514 sccBank[region] = value;
515 }
else if (sccAccess(address)) {
516 scc.
writeMem(narrow_cast<uint8_t>(address & 0xff), value, time);
520byte Carnivore2::readIDESlot(
word address, EmuTime::param time)
523 if (ideRegsEnabled() && ((address & 0xfe00) == 0x7c00)) {
525 switch (address & 1) {
527 auto tmp = ideReadData(time);
528 ideRead = narrow_cast<byte>(tmp >> 8);
529 return narrow_cast<byte>(tmp & 0xff);
535 if (ideRegsEnabled() && ((address & 0xff00) == 0x7e00)) {
537 return ideReadReg(address & 0xf, time);
539 if ((0x4000 <= address) && (address < 0x8000)) {
541 unsigned addr = (address & 0x3fff) + (ideBank() * 0x4000) + 0x10000;
542 if (readBIOSfromRAM()) {
545 return flash.
read(addr);
551byte Carnivore2::peekIDESlot(
word address, EmuTime::param )
const
553 if (ideRegsEnabled() && ((address & 0xfe00) == 0x7c00)) {
557 if (ideRegsEnabled() && ((address & 0xff00) == 0x7e00)) {
561 if ((0x4000 <= address) && (address < 0x8000)) {
563 unsigned addr = (address & 0x3fff) + (ideBank() * 0x4000) + 0x10000;
564 if (readBIOSfromRAM()) {
567 return flash.
peek(addr);
573void Carnivore2::writeIDESlot(
word address,
byte value, EmuTime::param time)
576 if (address == 0x4104) {
577 ideControlReg = value;
579 }
else if (ideRegsEnabled() && ((address & 0xfe00) == 0x7c00)) {
581 switch (address & 1) {
586 auto tmp =
word((value << 8) | ideWrite);
587 ideWriteData(tmp, time);
592 }
else if (ideRegsEnabled() && ((address & 0xff00) == 0x7e00)) {
594 ideWriteReg(address & 0xf, value, time);
598word Carnivore2::ideReadData(EmuTime::param time)
600 return ideDevices[ideSelectedDevice]->readData(time);
603void Carnivore2::ideWriteData(
word value, EmuTime::param time)
605 ideDevices[ideSelectedDevice]->writeData(value, time);
608byte Carnivore2::ideReadReg(
byte reg, EmuTime::param time)
610 if (reg == 14) reg = 7;
620 return narrow_cast<byte>(ideReadData(time) & 0xff);
622 auto result = ideDevices[ideSelectedDevice]->readReg(reg, time);
624 result = (result & 0xef) | (ideSelectedDevice ? 0x10 : 0x00);
631void Carnivore2::ideWriteReg(
byte reg,
byte value, EmuTime::param time)
634 if ((reg == 14) && !(value & 0x04)) {
636 ideSoftReset =
false;
641 ideWriteData(narrow_cast<word>((value << 8) | value), time);
643 if ((reg == 14) && (value & 0x04)) {
646 ideDevices[0]->reset(time);
647 ideDevices[1]->reset(time);
650 ideSelectedDevice = (value & 0x10) ? 1 : 0;
652 ideDevices[ideSelectedDevice]->writeReg(reg, value, time);
658bool Carnivore2::isMemMapControl(
word address)
const
660 return (port3C & 0x80) &&
661 (( (port3C & 0x08) && ((address & 0xc000) == 0x4000)) ||
662 (!(port3C & 0x08) && ((address & 0xc000) == 0x8000)));
665unsigned Carnivore2::getMemoryMapperAddress(
word address)
const
667 return (address & 0x3fff) +
668 0x4000 * memMapRegs[address >> 14] +
672bool Carnivore2::isMemoryMapperWriteProtected(
word address)
const
674 auto page = address >> 14;
675 return (port3C & (1 << page)) != 0;
678byte Carnivore2::peekMemoryMapperSlot(
word address)
const
680 if (isMemMapControl(address)) {
681 switch (address & 0xff) {
684 case 0xfc:
case 0xfd:
case 0xfe:
case 0xff:
685 return memMapRegs[address & 0x03];
688 return ram[getMemoryMapperAddress(address)];
691byte Carnivore2::readMemoryMapperSlot(
word address)
const
693 return peekMemoryMapperSlot(address);
696void Carnivore2::writeMemoryMapperSlot(
word address,
byte value)
698 if (isMemMapControl(address)) {
699 switch (address & 0xff) {
701 value |= (value & 0x02) << 6;
704 case 0xfc:
case 0xfd:
case 0xfe:
case 0xff:
705 memMapRegs[address & 0x03] = value & 0x3f;
709 if (!isMemoryMapperWriteProtected(address)) {
710 ram[getMemoryMapperAddress(address)] = value;
714byte Carnivore2::readFmPacSlot(
word address)
716 if (address == 0x7ff6) {
718 }
else if (address == 0x7ff7) {
720 }
else if ((0x4000 <= address) && (address < 0x8000)) {
721 if (fmPacSramEnabled()) {
722 if (address < 0x5ffe) {
723 return ram[(address & 0x1fff) | 0xfe000];
724 }
else if (address == 0x5ffe) {
726 }
else if (address == 0x5fff) {
732 unsigned addr = (address & 0x3fff) + (0x4000 * fmPacBank) + 0x30000;
733 if (readBIOSfromRAM()) {
736 return flash.
read(addr);
743byte Carnivore2::peekFmPacSlot(
word address)
const
745 if (address == 0x7ff6) {
747 }
else if (address == 0x7ff7) {
749 }
else if ((0x4000 <= address) && (address < 0x8000)) {
750 if (fmPacSramEnabled()) {
751 if (address < 0x5ffe) {
752 return ram[(address & 0x1fff) | 0xfe000];
753 }
else if (address == 0x5ffe) {
755 }
else if (address == 0x5fff) {
761 unsigned addr = (address & 0x3fff) + (0x4000 * fmPacBank) + 0x30000;
762 if (readBIOSfromRAM()) {
765 return flash.
peek(addr);
772void Carnivore2::writeFmPacSlot(
word address,
byte value, EmuTime::param time)
774 if ((0x4000 <= address) && (address < 0x5ffe)) {
775 if (fmPacSramEnabled()) {
776 ram[(address & 0x1fff) | 0xfe000] = value;
778 }
else if (address == 0x5ffe) {
780 }
else if (address == 0x5fff) {
782 }
else if (address ==
one_of(0x7ff4, 0x7ff5)) {
783 ym2413.
writePort(address & 1, value, time);
784 }
else if (address == 0x7ff6) {
785 fmPacEnable = value & 0x11;
786 }
else if (address == 0x7ff7) {
787 fmPacBank = value & 0x03;
793 return peekIO(port, time);
799 if (memMapReadEnabled() && ((port & 0xfc) == 0xfc)) {
802 }
else if ((port & 0xff) == idControlPort() && PF0_RV != 0) {
805 }
else if (PF0_RV == 2) {
815 if (((port & 0xff) == 0xa0) || ((port & 0xff) == 0x10)) {
816 psgLatch = value & 0x0f;
817 }
else if ((port & 0xff) == 0xa1 || (port & 0xff) == 0x11) {
819 }
else if (((port & 0xfe) == 0x7c) &&
820 (fmPacPortEnabled1() || fmPacPortEnabled2())) {
823 }
else if (((port & 0xff) == 0x3c) && writePort3cEnabled()) {
825 port3C = (port3C & 0x7F) | (value & 0x80);
827 }
else if ((port & 0xfc) == 0xfc) {
829 memMapRegs[port & 0x03] = value & 0x3f;
831 }
else if ((port & 0xff) == idControlPort()) {
834 }
else if (value ==
'S') {
836 }
else if (value ==
'H') {
837 configRegs[0x00] |= 1;
838 }
else if (value ==
'R') {
839 configRegs[0x00] &= ~1;
840 }
else if (
'0' <= value && value <=
'3') {
841 configRegs[0x00] &= ~(0b11 << 5);
842 configRegs[0x00] |=
byte((value -
'0') << 5);
843 }
else if (value ==
'A') {
844 shadowConfigRegs[0x1e] &= ~1;
845 }
else if (value ==
'M') {
846 shadowConfigRegs[0x1e] |= 1;
856 return memMapRegs[page];
862template<
typename Archive>
865 ar.template serializeBase<MSXDevice>(*
this);
866 ar.serialize(
"flash", flash,
869 "configRegs", configRegs,
870 "shadowConfigRegs", shadowConfigRegs,
871 "subSlotReg", subSlotReg,
877 if (ar.versionAtLeast(version, 3)) {
878 ar.serialize(
"psg", psg,
879 "psgLatch", psgLatch,
886 ar.serializePolymorphic(
"master", *ideDevices[0]);
887 ar.serializePolymorphic(
"slave", *ideDevices[1]);
888 ar.serialize(
"ideSoftReset", ideSoftReset,
889 "ideSelectedDevice", ideSelectedDevice,
890 "ideControlReg", ideControlReg,
892 "ideWrite", ideWrite,
894 "memMapRegs", memMapRegs,
897 "fmPacEnable", fmPacEnable,
898 "fmPacBank", fmPacBank,
899 "fmPac5ffe", fmPac5ffe,
900 "fmPac5fff", fmPac5fff);
902 if constexpr (Archive::IS_LOADER) {
904 writeSndLVL (configRegs[0x22], time);
905 writeCfgEEPR(configRegs[0x23], time);
907 auto backup24 = configRegs[0x24];
908 configRegs[0x24] = 0;
909 writePSGCtrl(backup24, time);
910 auto backup35 = configRegs[0x35];
911 configRegs[0x35] = 0xf0;
#define REGISTER_MSXDEVICE(CLASS, NAME)
void reset(EmuTime::param time)
void writeRegister(unsigned reg, uint8_t value, EmuTime::param time)
void write(size_t address, uint8_t value)
uint8_t peek(size_t address) const
uint8_t read(size_t address) const
byte peekIO(word port, EmuTime::param time) const override
Read a byte from a given IO port.
void reset(EmuTime::param time) override
This method is called on reset.
void writeMem(word address, byte value, EmuTime::param time) override
Write a given byte to a given location at a certain time to this device.
void serialize(Archive &ar, unsigned version)
byte readIO(word port, EmuTime::param time) override
Read a byte from an IO port at a certain time from this device.
void globalRead(word address, EmuTime::param time) override
Global reads.
void powerUp(EmuTime::param time) override
This method is called when MSX is powered up.
byte readMem(word address, EmuTime::param time) override
Read a byte from a location at a certain time from this device.
Carnivore2(const DeviceConfig &config)
void writeIO(word port, byte value, EmuTime::param time) override
Write a byte to a given IO port at a certain time to this device.
byte peekMem(word address, EmuTime::param time) const override
Read a byte from a given memory location.
byte getSelectedSegment(byte page) const override
void printWarning(std::string_view message)
const XMLElement * findChild(std::string_view name) const
void write_CS(bool value, EmuTime::param time)
void write_CLK(bool value, EmuTime::param time)
bool read_DO(EmuTime::param time) const
void write_DI(bool value, EmuTime::param time)
void register_IO_Out(byte port, MSXDevice *device)
Devices can register their Out ports.
void register_IO_In(byte port, MSXDevice *device)
Devices can register their In ports.
void unregister_IO_In(byte port, MSXDevice *device)
void unregister_IO_Out(byte port, MSXDevice *device)
An MSXDevice is an emulated hardware component connected to the bus of the emulated MSX.
void invalidateDeviceRWCache()
Calls MSXCPUInterface::invalidateXXCache() for the specific (part of) the slot that this device is lo...
byte getPrimarySlot() const
EmuTime::param getCurrentTime() const
MSXCPUInterface & getCPUInterface() const
MSXCliComm & getCliComm() const
void setChipMode(ChipMode newMode)
void powerUp(EmuTime::param time)
uint8_t readMem(uint8_t address, EmuTime::param time)
void reset(EmuTime::param time)
void writeMem(uint8_t address, uint8_t value, EmuTime::param time)
void setSoftwareVolume(float volume, EmuTime::param time)
Change the 'software volume' of this sound device.
void writePort(bool port, byte value, EmuTime::param time)
void reset(EmuTime::param time)
std::unique_ptr< IDEDevice > create(const DeviceConfig &config)
This file implemented 3 utility functions:
uint8_t byte
8 bit unsigned integer
AmdFlash::SectorInfo Info
uint16_t word
16 bit unsigned integer
constexpr void iota(ForwardIt first, ForwardIt last, T value)
size_t size(std::string_view utf8)
#define INSTANTIATE_SERIALIZE_METHODS(CLASS)
constexpr auto xrange(T e)