openMSX
YM2151.cc
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1 /*****************************************************************************
2 *
3 * Yamaha YM2151 driver (version 2.150 final beta)
4 *
5 ******************************************************************************/
6 
7 #include "YM2151.hh"
8 #include "DeviceConfig.hh"
9 #include "Math.hh"
10 #include "cstd.hh"
11 #include "ranges.hh"
12 #include "serialize.hh"
13 #include <cmath>
14 #include <cstring>
15 
16 namespace openmsx {
17 
18 // TODO void ym2151WritePortCallback(void* ref, unsigned port, byte value);
19 
20 constexpr int FREQ_SH = 16; // 16.16 fixed point (frequency calculations)
21 
22 constexpr int FREQ_MASK = (1 << FREQ_SH) - 1;
23 
24 constexpr int ENV_BITS = 10;
25 constexpr int ENV_LEN = 1 << ENV_BITS;
26 constexpr float ENV_STEP = 128.0f / ENV_LEN;
27 
28 constexpr int MAX_ATT_INDEX = ENV_LEN - 1; // 1023
29 constexpr int MIN_ATT_INDEX = 0;
30 
31 constexpr unsigned EG_ATT = 4;
32 constexpr unsigned EG_DEC = 3;
33 constexpr unsigned EG_SUS = 2;
34 constexpr unsigned EG_REL = 1;
35 constexpr unsigned EG_OFF = 0;
36 
37 constexpr int SIN_BITS = 10;
38 constexpr int SIN_LEN = 1 << SIN_BITS;
39 constexpr int SIN_MASK = SIN_LEN - 1;
40 
41 constexpr int TL_RES_LEN = 256; // 8 bits addressing (real chip)
42 
43 // TL_TAB_LEN is calculated as:
44 // 13 - sinus amplitude bits (Y axis)
45 // 2 - sinus sign bit (Y axis)
46 // TL_RES_LEN - sinus resolution (X axis)
47 constexpr unsigned TL_TAB_LEN = 13 * 2 * TL_RES_LEN;
48 static int tl_tab[TL_TAB_LEN];
49 
50 constexpr unsigned ENV_QUIET = TL_TAB_LEN >> 3;
51 
52 // sin waveform table in 'decibel' scale
53 static unsigned sin_tab[SIN_LEN];
54 
55 // translate from D1L to volume index (16 D1L levels)
56 static unsigned d1l_tab[16];
57 
58 
59 constexpr unsigned RATE_STEPS = 8;
60 constexpr byte eg_inc[19 * RATE_STEPS] = {
61 
62 //cycle:0 1 2 3 4 5 6 7
63 
64 /* 0 */ 0,1, 0,1, 0,1, 0,1, // rates 00..11 0 (increment by 0 or 1)
65 /* 1 */ 0,1, 0,1, 1,1, 0,1, // rates 00..11 1
66 /* 2 */ 0,1, 1,1, 0,1, 1,1, // rates 00..11 2
67 /* 3 */ 0,1, 1,1, 1,1, 1,1, // rates 00..11 3
68 
69 /* 4 */ 1,1, 1,1, 1,1, 1,1, // rate 12 0 (increment by 1)
70 /* 5 */ 1,1, 1,2, 1,1, 1,2, // rate 12 1
71 /* 6 */ 1,2, 1,2, 1,2, 1,2, // rate 12 2
72 /* 7 */ 1,2, 2,2, 1,2, 2,2, // rate 12 3
73 
74 /* 8 */ 2,2, 2,2, 2,2, 2,2, // rate 13 0 (increment by 2)
75 /* 9 */ 2,2, 2,4, 2,2, 2,4, // rate 13 1
76 /*10 */ 2,4, 2,4, 2,4, 2,4, // rate 13 2
77 /*11 */ 2,4, 4,4, 2,4, 4,4, // rate 13 3
78 
79 /*12 */ 4,4, 4,4, 4,4, 4,4, // rate 14 0 (increment by 4)
80 /*13 */ 4,4, 4,8, 4,4, 4,8, // rate 14 1
81 /*14 */ 4,8, 4,8, 4,8, 4,8, // rate 14 2
82 /*15 */ 4,8, 8,8, 4,8, 8,8, // rate 14 3
83 
84 /*16 */ 8,8, 8,8, 8,8, 8,8, // rates 15 0, 15 1, 15 2, 15 3 (increment by 8)
85 /*17 */ 16,16,16,16,16,16,16,16, // rates 15 2, 15 3 for attack
86 /*18 */ 0,0, 0,0, 0,0, 0,0, // infinity rates for attack and decay(s)
87 };
88 
89 
90 static constexpr byte O(int a) { return a * RATE_STEPS; }
91 // note that there is no O(17) in this table - it's directly in the code
92 constexpr byte eg_rate_select[32 + 64 + 32] = {
93 // Envelope Generator rates (32 + 64 rates + 32 RKS)
94 // 32 dummy (infinite time) rates
95 O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
96 O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
97 O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
98 O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
99 
100 // rates 00-11
101 O( 0),O( 1),O( 2),O( 3),
102 O( 0),O( 1),O( 2),O( 3),
103 O( 0),O( 1),O( 2),O( 3),
104 O( 0),O( 1),O( 2),O( 3),
105 O( 0),O( 1),O( 2),O( 3),
106 O( 0),O( 1),O( 2),O( 3),
107 O( 0),O( 1),O( 2),O( 3),
108 O( 0),O( 1),O( 2),O( 3),
109 O( 0),O( 1),O( 2),O( 3),
110 O( 0),O( 1),O( 2),O( 3),
111 O( 0),O( 1),O( 2),O( 3),
112 O( 0),O( 1),O( 2),O( 3),
113 
114 // rate 12
115 O( 4),O( 5),O( 6),O( 7),
116 
117 // rate 13
118 O( 8),O( 9),O(10),O(11),
119 
120 // rate 14
121 O(12),O(13),O(14),O(15),
122 
123 // rate 15
124 O(16),O(16),O(16),O(16),
125 
126 // 32 dummy rates (same as 15 3)
127 O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16),
128 O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16),
129 O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16),
130 O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16)
131 };
132 
133 // rate 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
134 // shift 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0, 0, 0
135 // mask 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0, 0, 0
136 constexpr byte eg_rate_shift[32 + 64 + 32] = {
137 // Envelope Generator counter shifts (32 + 64 rates + 32 RKS)
138 // 32 infinite time rates
139  0, 0, 0, 0, 0, 0, 0, 0,
140  0, 0, 0, 0, 0, 0, 0, 0,
141  0, 0, 0, 0, 0, 0, 0, 0,
142  0, 0, 0, 0, 0, 0, 0, 0,
143 
144 // rates 00-11
145  11, 11, 11, 11,
146  10, 10, 10, 10,
147  9, 9, 9, 9,
148  8, 8, 8, 8,
149  7, 7, 7, 7,
150  6, 6, 6, 6,
151  5, 5, 5, 5,
152  4, 4, 4, 4,
153  3, 3, 3, 3,
154  2, 2, 2, 2,
155  1, 1, 1, 1,
156  0, 0, 0, 0,
157 
158 // rate 12
159  0, 0, 0, 0,
160 
161 // rate 13
162  0, 0, 0, 0,
163 
164 // rate 14
165  0, 0, 0, 0,
166 
167 // rate 15
168  0, 0, 0, 0,
169 
170 // 32 dummy rates (same as 15 3)
171  0, 0, 0, 0, 0, 0, 0, 0,
172  0, 0, 0, 0, 0, 0, 0, 0,
173  0, 0, 0, 0, 0, 0, 0, 0,
174  0, 0, 0, 0, 0, 0, 0, 0
175 };
176 
177 // DT2 defines offset in cents from base note
178 //
179 // This table defines offset in frequency-deltas table.
180 // User's Manual page 22
181 //
182 // Values below were calculated using formula: value = orig.val / 1.5625
183 //
184 // DT2=0 DT2=1 DT2=2 DT2=3
185 // 0 600 781 950
186 constexpr unsigned dt2_tab[4] = { 0, 384, 500, 608 };
187 
188 // DT1 defines offset in Hertz from base note
189 // This table is converted while initialization...
190 // Detune table shown in YM2151 User's Manual is wrong (verified on the real chip)
191 constexpr byte dt1_tab[4 * 32] = {
192 // DT1 = 0
193  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
194  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
195 
196 // DT1 = 1
197  0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2,
198  2, 3, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 8, 8, 8, 8,
199 
200 // DT1 = 2
201  1, 1, 1, 1, 2, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5,
202  5, 6, 6, 7, 8, 8, 9,10,11,12,13,14,16,16,16,16,
203 
204 // DT1 = 3
205  2, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7,
206  8, 8, 9,10,11,12,13,14,16,17,19,20,22,22,22,22
207 };
208 
209 constexpr word phaseinc_rom[768] = {
210 1299,1300,1301,1302,1303,1304,1305,1306,1308,1309,1310,1311,1313,1314,1315,1316,
211 1318,1319,1320,1321,1322,1323,1324,1325,1327,1328,1329,1330,1332,1333,1334,1335,
212 1337,1338,1339,1340,1341,1342,1343,1344,1346,1347,1348,1349,1351,1352,1353,1354,
213 1356,1357,1358,1359,1361,1362,1363,1364,1366,1367,1368,1369,1371,1372,1373,1374,
214 1376,1377,1378,1379,1381,1382,1383,1384,1386,1387,1388,1389,1391,1392,1393,1394,
215 1396,1397,1398,1399,1401,1402,1403,1404,1406,1407,1408,1409,1411,1412,1413,1414,
216 1416,1417,1418,1419,1421,1422,1423,1424,1426,1427,1429,1430,1431,1432,1434,1435,
217 1437,1438,1439,1440,1442,1443,1444,1445,1447,1448,1449,1450,1452,1453,1454,1455,
218 1458,1459,1460,1461,1463,1464,1465,1466,1468,1469,1471,1472,1473,1474,1476,1477,
219 1479,1480,1481,1482,1484,1485,1486,1487,1489,1490,1492,1493,1494,1495,1497,1498,
220 1501,1502,1503,1504,1506,1507,1509,1510,1512,1513,1514,1515,1517,1518,1520,1521,
221 1523,1524,1525,1526,1528,1529,1531,1532,1534,1535,1536,1537,1539,1540,1542,1543,
222 1545,1546,1547,1548,1550,1551,1553,1554,1556,1557,1558,1559,1561,1562,1564,1565,
223 1567,1568,1569,1570,1572,1573,1575,1576,1578,1579,1580,1581,1583,1584,1586,1587,
224 1590,1591,1592,1593,1595,1596,1598,1599,1601,1602,1604,1605,1607,1608,1609,1610,
225 1613,1614,1615,1616,1618,1619,1621,1622,1624,1625,1627,1628,1630,1631,1632,1633,
226 1637,1638,1639,1640,1642,1643,1645,1646,1648,1649,1651,1652,1654,1655,1656,1657,
227 1660,1661,1663,1664,1666,1667,1669,1670,1672,1673,1675,1676,1678,1679,1681,1682,
228 1685,1686,1688,1689,1691,1692,1694,1695,1697,1698,1700,1701,1703,1704,1706,1707,
229 1709,1710,1712,1713,1715,1716,1718,1719,1721,1722,1724,1725,1727,1728,1730,1731,
230 1734,1735,1737,1738,1740,1741,1743,1744,1746,1748,1749,1751,1752,1754,1755,1757,
231 1759,1760,1762,1763,1765,1766,1768,1769,1771,1773,1774,1776,1777,1779,1780,1782,
232 1785,1786,1788,1789,1791,1793,1794,1796,1798,1799,1801,1802,1804,1806,1807,1809,
233 1811,1812,1814,1815,1817,1819,1820,1822,1824,1825,1827,1828,1830,1832,1833,1835,
234 1837,1838,1840,1841,1843,1845,1846,1848,1850,1851,1853,1854,1856,1858,1859,1861,
235 1864,1865,1867,1868,1870,1872,1873,1875,1877,1879,1880,1882,1884,1885,1887,1888,
236 1891,1892,1894,1895,1897,1899,1900,1902,1904,1906,1907,1909,1911,1912,1914,1915,
237 1918,1919,1921,1923,1925,1926,1928,1930,1932,1933,1935,1937,1939,1940,1942,1944,
238 1946,1947,1949,1951,1953,1954,1956,1958,1960,1961,1963,1965,1967,1968,1970,1972,
239 1975,1976,1978,1980,1982,1983,1985,1987,1989,1990,1992,1994,1996,1997,1999,2001,
240 2003,2004,2006,2008,2010,2011,2013,2015,2017,2019,2021,2022,2024,2026,2028,2029,
241 2032,2033,2035,2037,2039,2041,2043,2044,2047,2048,2050,2052,2054,2056,2058,2059,
242 2062,2063,2065,2067,2069,2071,2073,2074,2077,2078,2080,2082,2084,2086,2088,2089,
243 2092,2093,2095,2097,2099,2101,2103,2104,2107,2108,2110,2112,2114,2116,2118,2119,
244 2122,2123,2125,2127,2129,2131,2133,2134,2137,2139,2141,2142,2145,2146,2148,2150,
245 2153,2154,2156,2158,2160,2162,2164,2165,2168,2170,2172,2173,2176,2177,2179,2181,
246 2185,2186,2188,2190,2192,2194,2196,2197,2200,2202,2204,2205,2208,2209,2211,2213,
247 2216,2218,2220,2222,2223,2226,2227,2230,2232,2234,2236,2238,2239,2242,2243,2246,
248 2249,2251,2253,2255,2256,2259,2260,2263,2265,2267,2269,2271,2272,2275,2276,2279,
249 2281,2283,2285,2287,2288,2291,2292,2295,2297,2299,2301,2303,2304,2307,2308,2311,
250 2315,2317,2319,2321,2322,2325,2326,2329,2331,2333,2335,2337,2338,2341,2342,2345,
251 2348,2350,2352,2354,2355,2358,2359,2362,2364,2366,2368,2370,2371,2374,2375,2378,
252 2382,2384,2386,2388,2389,2392,2393,2396,2398,2400,2402,2404,2407,2410,2411,2414,
253 2417,2419,2421,2423,2424,2427,2428,2431,2433,2435,2437,2439,2442,2445,2446,2449,
254 2452,2454,2456,2458,2459,2462,2463,2466,2468,2470,2472,2474,2477,2480,2481,2484,
255 2488,2490,2492,2494,2495,2498,2499,2502,2504,2506,2508,2510,2513,2516,2517,2520,
256 2524,2526,2528,2530,2531,2534,2535,2538,2540,2542,2544,2546,2549,2552,2553,2556,
257 2561,2563,2565,2567,2568,2571,2572,2575,2577,2579,2581,2583,2586,2589,2590,2593
258 };
259 
260 // Noise LFO waveform.
261 //
262 // Here are just 256 samples out of much longer data.
263 //
264 // It does NOT repeat every 256 samples on real chip and I wasnt able to find
265 // the point where it repeats (even in strings as long as 131072 samples).
266 //
267 // I only put it here because its better than nothing and perhaps
268 // someone might be able to figure out the real algorithm.
269 //
270 // Note that (due to the way the LFO output is calculated) it is quite
271 // possible that two values: 0x80 and 0x00 might be wrong in this table.
272 // To be exact:
273 // some 0x80 could be 0x81 as well as some 0x00 could be 0x01.
274 constexpr byte lfo_noise_waveform[256] = {
275 0xFF,0xEE,0xD3,0x80,0x58,0xDA,0x7F,0x94,0x9E,0xE3,0xFA,0x00,0x4D,0xFA,0xFF,0x6A,
276 0x7A,0xDE,0x49,0xF6,0x00,0x33,0xBB,0x63,0x91,0x60,0x51,0xFF,0x00,0xD8,0x7F,0xDE,
277 0xDC,0x73,0x21,0x85,0xB2,0x9C,0x5D,0x24,0xCD,0x91,0x9E,0x76,0x7F,0x20,0xFB,0xF3,
278 0x00,0xA6,0x3E,0x42,0x27,0x69,0xAE,0x33,0x45,0x44,0x11,0x41,0x72,0x73,0xDF,0xA2,
279 
280 0x32,0xBD,0x7E,0xA8,0x13,0xEB,0xD3,0x15,0xDD,0xFB,0xC9,0x9D,0x61,0x2F,0xBE,0x9D,
281 0x23,0x65,0x51,0x6A,0x84,0xF9,0xC9,0xD7,0x23,0xBF,0x65,0x19,0xDC,0x03,0xF3,0x24,
282 0x33,0xB6,0x1E,0x57,0x5C,0xAC,0x25,0x89,0x4D,0xC5,0x9C,0x99,0x15,0x07,0xCF,0xBA,
283 0xC5,0x9B,0x15,0x4D,0x8D,0x2A,0x1E,0x1F,0xEA,0x2B,0x2F,0x64,0xA9,0x50,0x3D,0xAB,
284 
285 0x50,0x77,0xE9,0xC0,0xAC,0x6D,0x3F,0xCA,0xCF,0x71,0x7D,0x80,0xA6,0xFD,0xFF,0xB5,
286 0xBD,0x6F,0x24,0x7B,0x00,0x99,0x5D,0xB1,0x48,0xB0,0x28,0x7F,0x80,0xEC,0xBF,0x6F,
287 0x6E,0x39,0x90,0x42,0xD9,0x4E,0x2E,0x12,0x66,0xC8,0xCF,0x3B,0x3F,0x10,0x7D,0x79,
288 0x00,0xD3,0x1F,0x21,0x93,0x34,0xD7,0x19,0x22,0xA2,0x08,0x20,0xB9,0xB9,0xEF,0x51,
289 
290 0x99,0xDE,0xBF,0xD4,0x09,0x75,0xE9,0x8A,0xEE,0xFD,0xE4,0x4E,0x30,0x17,0xDF,0xCE,
291 0x11,0xB2,0x28,0x35,0xC2,0x7C,0x64,0xEB,0x91,0x5F,0x32,0x0C,0x6E,0x00,0xF9,0x92,
292 0x19,0xDB,0x8F,0xAB,0xAE,0xD6,0x12,0xC4,0x26,0x62,0xCE,0xCC,0x0A,0x03,0xE7,0xDD,
293 0xE2,0x4D,0x8A,0xA6,0x46,0x95,0x0F,0x8F,0xF5,0x15,0x97,0x32,0xD4,0x28,0x1E,0x55
294 };
295 
296 void YM2151::initTables()
297 {
298  for (int x = 0; x < TL_RES_LEN; ++x) {
299  float m = (1 << 16) / exp2f((x + 1) * (ENV_STEP / 4.0f) / 8.0f);
300  m = floorf(m);
301 
302  // we never reach (1 << 16) here due to the (x + 1)
303  // result fits within 16 bits at maximum
304 
305  int n = int(m); // 16 bits here
306  n >>= 4; // 12 bits here
307  if (n & 1) { // round to closest
308  n = (n >> 1) + 1;
309  } else {
310  n = n >> 1;
311  }
312  // 11 bits here (rounded)
313  n <<= 2; // 13 bits here (as in real chip)
314  tl_tab[x * 2 + 0] = n;
315  tl_tab[x * 2 + 1] = -tl_tab[x * 2 + 0];
316 
317  for (int i = 1; i < 13; ++i) {
318  tl_tab[x * 2 + 0 + i * 2 * TL_RES_LEN] = tl_tab[x * 2 + 0] >> i;
319  tl_tab[x * 2 + 1 + i * 2 * TL_RES_LEN] = -tl_tab[x * 2 + 0 + i * 2 * TL_RES_LEN];
320  }
321  }
322 
323  static const float LOG2 = log(2.0);
324  for (int i = 0; i < SIN_LEN; ++i) {
325  // non-standard sinus
326  float m = sinf((i * 2 + 1) * M_PI / SIN_LEN); // verified on the real chip
327 
328  // we never reach zero here due to (i * 2 + 1)
329  float o = -8.0f * logf(std::abs(m)) / LOG2; // convert to decibels
330  o = o / (ENV_STEP / 4);
331 
332  int n = int(2.0f * o);
333  if (n & 1) { // round to closest
334  n = (n >> 1) + 1;
335  } else {
336  n = n >> 1;
337  }
338  sin_tab[i] = n * 2 + (m >= 0.0f ? 0 : 1);
339  }
340 
341  // calculate d1l_tab table
342  for (int i = 0; i < 16; ++i) {
343  // every 3 'dB' except for all bits = 1 = 45+48 'dB'
344  d1l_tab[i] = unsigned((i != 15 ? i : i + 16) * (4.0f / ENV_STEP));
345  }
346 }
347 
348 void YM2151::initChipTables()
349 {
350  // this loop calculates Hertz values for notes from c-0 to b-7
351  // including 64 'cents' (100/64 that is 1.5625 of real cent) per note
352  // i*100/64/1200 is equal to i/768
353 
354  // real chip works with 10 bits fixed point values (10.10)
355  // -10 because phaseinc_rom table values are already in 10.10 format
356  float mult = 1 << (FREQ_SH - 10);
357 
358  for (int i = 0; i < 768; ++i) {
359  float phaseinc = phaseinc_rom[i]; // real chip phase increment
360 
361  // octave 2 - reference octave
362  // adjust to X.10 fixed point
363  freq[768 + 2 * 768 + i] = int(phaseinc * mult) & 0xffffffc0;
364  // octave 0 and octave 1
365  for (int j = 0; j < 2; ++j) {
366  // adjust to X.10 fixed point
367  freq[768 + j * 768 + i] = (freq[768 + 2 * 768 + i] >> (2 - j)) & 0xffffffc0;
368  }
369  // octave 3 to 7
370  for (int j = 3; j < 8; ++j) {
371  freq[768 + j * 768 + i] = freq[768 + 2 * 768 + i] << (j - 2);
372  }
373  }
374 
375  // octave -1 (all equal to: oct 0, _KC_00_, _KF_00_)
376  for (int i = 0; i < 768; ++i) {
377  freq[0 * 768 + i] = freq[1 * 768 + 0];
378  }
379 
380  // octave 8 and 9 (all equal to: oct 7, _KC_14_, _KF_63_)
381  for (int j = 8; j < 10; ++j) {
382  for (int i = 0; i < 768; ++i) {
383  freq[768 + j * 768 + i] = freq[768 + 8 * 768 - 1];
384  }
385  }
386 
387  mult = 1 << FREQ_SH;
388  for (int j = 0; j < 4; ++j) {
389  for (int i = 0; i < 32; ++i) {
390 
391  // calculate phase increment
392  float phaseinc = float(dt1_tab[j * 32 + i]) / (1 << 20) * (SIN_LEN);
393 
394  // positive and negative values
395  dt1_freq[(j + 0) * 32 + i] = int(phaseinc * mult);
396  dt1_freq[(j + 4) * 32 + i] = -dt1_freq[(j + 0) * 32 + i];
397  }
398  }
399 
400  timer_A_val = 0;
401 
402  // calculate noise periods table
403  // this table tells how many cycles/samples it takes before noise is recalculated.
404  // 2/2 means every cycle/sample, 2/5 means 2 out of 5 cycles/samples, etc.
405  for (int i = 0; i < 32; ++i) {
406  noise_tab[i] = 32 - (i != 31 ? i : 30); // rate 30 and 31 are the same
407  }
408 }
409 
410 void YM2151::keyOn(YM2151Operator* op, unsigned keySet) {
411  if (!op->key) {
412  op->phase = 0; /* clear phase */
413  op->state = EG_ATT; /* KEY ON = attack */
414  op->volume += (~op->volume *
415  (eg_inc[op->eg_sel_ar + ((eg_cnt >> op->eg_sh_ar)&7)])
416  ) >>4;
417  if (op->volume <= MIN_ATT_INDEX) {
418  op->volume = MIN_ATT_INDEX;
419  op->state = EG_DEC;
420  }
421  }
422  op->key |= keySet;
423 }
424 
425 void YM2151::keyOff(YM2151Operator* op, unsigned keyClear) {
426  if (op->key) {
427  op->key &= keyClear;
428  if (!op->key) {
429  if (op->state > EG_REL) {
430  op->state = EG_REL; /* KEY OFF = release */
431  }
432  }
433  }
434 }
435 
436 void YM2151::envelopeKONKOFF(YM2151Operator* op, int v)
437 {
438  if (v & 0x08) { // M1
439  keyOn (op + 0, 1);
440  } else {
441  keyOff(op + 0,unsigned(~1));
442  }
443  if (v & 0x20) { // M2
444  keyOn (op + 1, 1);
445  } else {
446  keyOff(op + 1,unsigned(~1));
447  }
448  if (v & 0x10) { // C1
449  keyOn (op + 2, 1);
450  } else {
451  keyOff(op + 2,unsigned(~1));
452  }
453  if (v & 0x40) { // C2
454  keyOn (op + 3, 1);
455  } else {
456  keyOff(op + 3,unsigned(~1));
457  }
458 }
459 
460 void YM2151::setConnect(YM2151Operator* om1, int cha, int v)
461 {
462  YM2151Operator* om2 = om1 + 1;
463  YM2151Operator* oc1 = om1 + 2;
464 
465  // set connect algorithm
466  // MEM is simply one sample delay
467  switch (v & 7) {
468  case 0:
469  // M1---C1---MEM---M2---C2---OUT
470  om1->connect = &c1;
471  oc1->connect = &mem;
472  om2->connect = &c2;
473  om1->mem_connect = &m2;
474  break;
475 
476  case 1:
477  // M1------+-MEM---M2---C2---OUT
478  // C1-+
479  om1->connect = &mem;
480  oc1->connect = &mem;
481  om2->connect = &c2;
482  om1->mem_connect = &m2;
483  break;
484 
485  case 2:
486  // M1-----------------+-C2---OUT
487  // C1---MEM---M2-+
488  om1->connect = &c2;
489  oc1->connect = &mem;
490  om2->connect = &c2;
491  om1->mem_connect = &m2;
492  break;
493 
494  case 3:
495  // M1---C1---MEM------+-C2---OUT
496  // M2-+
497  om1->connect = &c1;
498  oc1->connect = &mem;
499  om2->connect = &c2;
500  om1->mem_connect = &c2;
501  break;
502 
503  case 4:
504  // M1---C1-+-OUT
505  // M2---C2-+
506  // MEM: not used
507  om1->connect = &c1;
508  oc1->connect = &chanout[cha];
509  om2->connect = &c2;
510  om1->mem_connect = &mem; // store it anywhere where it will not be used
511  break;
512 
513  case 5:
514  // +----C1----+
515  // M1-+-MEM---M2-+-OUT
516  // +----C2----+
517  om1->connect = nullptr; // special mark
518  oc1->connect = &chanout[cha];
519  om2->connect = &chanout[cha];
520  om1->mem_connect = &m2;
521  break;
522 
523  case 6:
524  // M1---C1-+
525  // M2-+-OUT
526  // C2-+
527  // MEM: not used
528  om1->connect = &c1;
529  oc1->connect = &chanout[cha];
530  om2->connect = &chanout[cha];
531  om1->mem_connect = &mem; // store it anywhere where it will not be used
532  break;
533 
534  case 7:
535  // M1-+
536  // C1-+-OUT
537  // M2-+
538  // C2-+
539  // MEM: not used
540  om1->connect = &chanout[cha];
541  oc1->connect = &chanout[cha];
542  om2->connect = &chanout[cha];
543  om1->mem_connect = &mem; // store it anywhere where it will not be used
544  break;
545  }
546 }
547 
548 void YM2151::refreshEG(YM2151Operator* op)
549 {
550  unsigned kc = op->kc;
551 
552  // v = 32 + 2*RATE + RKS = max 126
553  unsigned v = kc >> op->ks;
554  if ((op->ar + v) < 32 + 62) {
555  op->eg_sh_ar = eg_rate_shift [op->ar + v];
556  op->eg_sel_ar = eg_rate_select[op->ar + v];
557  } else {
558  op->eg_sh_ar = 0;
559  op->eg_sel_ar = 17 * RATE_STEPS;
560  }
561  op->eg_sh_d1r = eg_rate_shift [op->d1r + v];
562  op->eg_sel_d1r = eg_rate_select[op->d1r + v];
563  op->eg_sh_d2r = eg_rate_shift [op->d2r + v];
564  op->eg_sel_d2r = eg_rate_select[op->d2r + v];
565  op->eg_sh_rr = eg_rate_shift [op->rr + v];
566  op->eg_sel_rr = eg_rate_select[op->rr + v];
567 
568  op += 1;
569  v = kc >> op->ks;
570  if ((op->ar + v) < 32 + 62) {
571  op->eg_sh_ar = eg_rate_shift [op->ar + v];
572  op->eg_sel_ar = eg_rate_select[op->ar + v];
573  } else {
574  op->eg_sh_ar = 0;
575  op->eg_sel_ar = 17 * RATE_STEPS;
576  }
577  op->eg_sh_d1r = eg_rate_shift [op->d1r + v];
578  op->eg_sel_d1r = eg_rate_select[op->d1r + v];
579  op->eg_sh_d2r = eg_rate_shift [op->d2r + v];
580  op->eg_sel_d2r = eg_rate_select[op->d2r + v];
581  op->eg_sh_rr = eg_rate_shift [op->rr + v];
582  op->eg_sel_rr = eg_rate_select[op->rr + v];
583 
584  op += 1;
585  v = kc >> op->ks;
586  if ((op->ar + v) < 32 + 62) {
587  op->eg_sh_ar = eg_rate_shift [op->ar + v];
588  op->eg_sel_ar = eg_rate_select[op->ar + v];
589  } else {
590  op->eg_sh_ar = 0;
591  op->eg_sel_ar = 17 * RATE_STEPS;
592  }
593  op->eg_sh_d1r = eg_rate_shift [op->d1r + v];
594  op->eg_sel_d1r = eg_rate_select[op->d1r + v];
595  op->eg_sh_d2r = eg_rate_shift [op->d2r + v];
596  op->eg_sel_d2r = eg_rate_select[op->d2r + v];
597  op->eg_sh_rr = eg_rate_shift [op->rr + v];
598  op->eg_sel_rr = eg_rate_select[op->rr + v];
599 
600  op += 1;
601  v = kc >> op->ks;
602  if ((op->ar + v) < 32 + 62) {
603  op->eg_sh_ar = eg_rate_shift [op->ar + v];
604  op->eg_sel_ar = eg_rate_select[op->ar + v];
605  } else {
606  op->eg_sh_ar = 0;
607  op->eg_sel_ar = 17 * RATE_STEPS;
608  }
609  op->eg_sh_d1r = eg_rate_shift [op->d1r + v];
610  op->eg_sel_d1r = eg_rate_select[op->d1r + v];
611  op->eg_sh_d2r = eg_rate_shift [op->d2r + v];
612  op->eg_sel_d2r = eg_rate_select[op->d2r + v];
613  op->eg_sh_rr = eg_rate_shift [op->rr + v];
614  op->eg_sel_rr = eg_rate_select[op->rr + v];
615 }
616 
617 void YM2151::writeReg(byte r, byte v, EmuTime::param time)
618 {
619  updateStream(time);
620 
621  YM2151Operator* op = &oper[(r & 0x07) * 4 + ((r & 0x18) >> 3)];
622 
623  regs[r] = v;
624  switch (r & 0xe0) {
625  case 0x00:
626  switch (r) {
627  case 0x01: // LFO reset(bit 1), Test Register (other bits)
628  test = v;
629  if (v & 2) lfo_phase = 0;
630  break;
631 
632  case 0x08:
633  envelopeKONKOFF(&oper[(v & 7) * 4], v);
634  break;
635 
636  case 0x0f: // noise mode enable, noise period
637  noise = v;
638  noise_f = noise_tab[v & 0x1f];
639  noise_p = 0;
640  break;
641 
642  case 0x10:
643  timer_A_val &= 0x03;
644  timer_A_val |= v << 2;
645  timer1->setValue(timer_A_val);
646  break;
647 
648  case 0x11:
649  timer_A_val &= 0x03fc;
650  timer_A_val |= v & 3;
651  timer1->setValue(timer_A_val);
652  break;
653 
654  case 0x12:
655  timer2->setValue(v);
656  break;
657 
658  case 0x14: // CSM, irq flag reset, irq enable, timer start/stop
659  irq_enable = v; // bit 3-timer B, bit 2-timer A, bit 7 - CSM
660  if (v & 0x10) { // reset timer A irq flag
661  resetStatus(1);
662  }
663  if (v & 0x20) { // reset timer B irq flag
664  resetStatus(2);
665  }
666  timer1->setStart((v & 4) != 0, time);
667  timer2->setStart((v & 8) != 0, time);
668  break;
669 
670  case 0x18: // LFO frequency
671  lfo_overflow = (1 << ((15 - (v >> 4)) + 3));
672  lfo_counter_add = 0x10 + (v & 0x0f);
673  break;
674 
675  case 0x19: // PMD (bit 7==1) or AMD (bit 7==0)
676  if (v & 0x80) {
677  pmd = v & 0x7f;
678  } else {
679  amd = v & 0x7f;
680  }
681  break;
682 
683  case 0x1b: // CT2, CT1, LFO waveform
684  ct = v >> 6;
685  lfo_wsel = v & 3;
686  // TODO ym2151WritePortCallback(0 , ct);
687  break;
688 
689  default:
690  break;
691  }
692  break;
693 
694  case 0x20:
695  op = &oper[(r & 7) * 4];
696  switch (r & 0x18) {
697  case 0x00: // RL enable, Feedback, Connection
698  op->fb_shift = ((v >> 3) & 7) ? ((v >> 3) & 7) + 6 : 0;
699  pan[(r & 7) * 2 + 0] = (v & 0x40) ? ~0 : 0;
700  pan[(r & 7) * 2 + 1] = (v & 0x80) ? ~0 : 0;
701  setConnect(op, r & 7, v & 7);
702  break;
703 
704  case 0x08: // Key Code
705  v &= 0x7f;
706  if (v != op->kc) {
707  unsigned kc_channel = (v - (v>>2))*64;
708  kc_channel += 768;
709  kc_channel |= (op->kc_i & 63);
710 
711  (op + 0)->kc = v;
712  (op + 0)->kc_i = kc_channel;
713  (op + 1)->kc = v;
714  (op + 1)->kc_i = kc_channel;
715  (op + 2)->kc = v;
716  (op + 2)->kc_i = kc_channel;
717  (op + 3)->kc = v;
718  (op + 3)->kc_i = kc_channel;
719 
720  unsigned kc = v>>2;
721  (op + 0)->dt1 = dt1_freq[(op + 0)->dt1_i + kc];
722  (op + 0)->freq = ((freq[kc_channel + (op + 0)->dt2] + (op + 0)->dt1) * (op + 0)->mul) >> 1;
723 
724  (op + 1)->dt1 = dt1_freq[(op + 1)->dt1_i + kc];
725  (op + 1)->freq = ((freq[kc_channel + (op + 1)->dt2] + (op + 1)->dt1) * (op + 1)->mul) >> 1;
726 
727  (op + 2)->dt1 = dt1_freq[(op + 2)->dt1_i + kc];
728  (op + 2)->freq = ((freq[kc_channel + (op + 2)->dt2] + (op + 2)->dt1) * (op + 2)->mul) >> 1;
729 
730  (op + 3)->dt1 = dt1_freq[(op + 3)->dt1_i + kc];
731  (op + 3)->freq = ((freq[kc_channel + (op + 3)->dt2] + (op + 3)->dt1) * (op + 3)->mul) >> 1;
732 
733  refreshEG( op );
734  }
735  break;
736 
737  case 0x10: // Key Fraction
738  v >>= 2;
739  if (v != (op->kc_i & 63)) {
740  unsigned kc_channel = v;
741  kc_channel |= (op->kc_i & ~63);
742 
743  (op + 0)->kc_i = kc_channel;
744  (op + 1)->kc_i = kc_channel;
745  (op + 2)->kc_i = kc_channel;
746  (op + 3)->kc_i = kc_channel;
747 
748  (op + 0)->freq = ((freq[kc_channel + (op + 0)->dt2] + (op + 0)->dt1) * (op + 0)->mul) >> 1;
749  (op + 1)->freq = ((freq[kc_channel + (op + 1)->dt2] + (op + 1)->dt1) * (op + 1)->mul) >> 1;
750  (op + 2)->freq = ((freq[kc_channel + (op + 2)->dt2] + (op + 2)->dt1) * (op + 2)->mul) >> 1;
751  (op + 3)->freq = ((freq[kc_channel + (op + 3)->dt2] + (op + 3)->dt1) * (op + 3)->mul) >> 1;
752  }
753  break;
754 
755  case 0x18: // PMS, AMS
756  op->pms = (v >> 4) & 7;
757  op->ams = (v & 3);
758  break;
759  }
760  break;
761 
762  case 0x40: { // DT1, MUL
763  unsigned olddt1_i = op->dt1_i;
764  unsigned oldmul = op->mul;
765 
766  op->dt1_i = (v & 0x70) << 1;
767  op->mul = (v & 0x0f) ? (v & 0x0f) << 1 : 1;
768 
769  if (olddt1_i != op->dt1_i) {
770  op->dt1 = dt1_freq[ op->dt1_i + (op->kc>>2) ];
771  }
772  if ((olddt1_i != op->dt1_i) || (oldmul != op->mul)) {
773  op->freq = ((freq[op->kc_i + op->dt2] + op->dt1) * op->mul) >> 1;
774  }
775  break;
776  }
777  case 0x60: // TL
778  op->tl = (v & 0x7f) << (ENV_BITS - 7); // 7bit TL
779  break;
780 
781  case 0x80: { // KS, AR
782  unsigned oldks = op->ks;
783  unsigned oldar = op->ar;
784  op->ks = 5 - (v >> 6);
785  op->ar = (v & 0x1f) ? 32 + ((v & 0x1f) << 1) : 0;
786 
787  if ((op->ar != oldar) || (op->ks != oldks)) {
788  if ((op->ar + (op->kc >> op->ks)) < 32 + 62) {
789  op->eg_sh_ar = eg_rate_shift [op->ar + (op->kc>>op->ks)];
790  op->eg_sel_ar = eg_rate_select[op->ar + (op->kc>>op->ks)];
791  } else {
792  op->eg_sh_ar = 0;
793  op->eg_sel_ar = 17 * RATE_STEPS;
794  }
795  }
796  if (op->ks != oldks) {
797  op->eg_sh_d1r = eg_rate_shift [op->d1r + (op->kc >> op->ks)];
798  op->eg_sel_d1r = eg_rate_select[op->d1r + (op->kc >> op->ks)];
799  op->eg_sh_d2r = eg_rate_shift [op->d2r + (op->kc >> op->ks)];
800  op->eg_sel_d2r = eg_rate_select[op->d2r + (op->kc >> op->ks)];
801  op->eg_sh_rr = eg_rate_shift [op->rr + (op->kc >> op->ks)];
802  op->eg_sel_rr = eg_rate_select[op->rr + (op->kc >> op->ks)];
803  }
804  break;
805  }
806  case 0xa0: // LFO AM enable, D1R
807  op->AMmask = (v & 0x80) ? ~0 : 0;
808  op->d1r = (v & 0x1f) ? 32 + ((v & 0x1f) << 1) : 0;
809  op->eg_sh_d1r = eg_rate_shift [op->d1r + (op->kc >> op->ks)];
810  op->eg_sel_d1r = eg_rate_select[op->d1r + (op->kc >> op->ks)];
811  break;
812 
813  case 0xc0: { // DT2, D2R
814  unsigned olddt2 = op->dt2;
815  op->dt2 = dt2_tab[v >> 6];
816  if (op->dt2 != olddt2) {
817  op->freq = ((freq[op->kc_i + op->dt2] + op->dt1) * op->mul) >> 1;
818  }
819  op->d2r = (v & 0x1f) ? 32 + ((v & 0x1f) << 1) : 0;
820  op->eg_sh_d2r = eg_rate_shift [op->d2r + (op->kc >> op->ks)];
821  op->eg_sel_d2r = eg_rate_select[op->d2r + (op->kc >> op->ks)];
822  break;
823  }
824  case 0xe0: // D1L, RR
825  op->d1l = d1l_tab[v >> 4];
826  op->rr = 34 + ((v & 0x0f) << 2);
827  op->eg_sh_rr = eg_rate_shift [op->rr + (op->kc >> op->ks)];
828  op->eg_sel_rr = eg_rate_select[op->rr + (op->kc >> op->ks)];
829  break;
830  }
831 }
832 
833 constexpr auto INPUT_RATE = unsigned(cstd::round(3579545 / 64.0));
834 
835 YM2151::YM2151(const std::string& name_, const std::string& desc,
836  const DeviceConfig& config, EmuTime::param time)
837  : ResampledSoundDevice(config.getMotherBoard(), name_, desc, 8, INPUT_RATE, true)
838  , irq(config.getMotherBoard(), getName() + ".IRQ")
839  , timer1(EmuTimer::createOPM_1(config.getScheduler(), *this))
840  , timer2(EmuTimer::createOPM_2(config.getScheduler(), *this))
841 {
842  // Avoid UMR on savestate
843  // TODO Registers 0x20-0xFF are cleared on reset.
844  // Should we do the same for registers 0x00-0x1F?
845  memset(regs, 0, sizeof(regs));
846 
847  initTables();
848  initChipTables();
849 
850  reset(time);
851 
852  registerSound(config);
853 }
854 
855 YM2151::~YM2151()
856 {
857  unregisterSound();
858 }
859 
860 bool YM2151::checkMuteHelper()
861 {
862  return ranges::all_of(oper, [](auto& op) { return op.state == EG_OFF; });
863 }
864 
865 void YM2151::reset(EmuTime::param time)
866 {
867  // initialize hardware registers
868  for (auto& op : oper) {
869  memset(&op, '\0', sizeof(op));
870  op.volume = MAX_ATT_INDEX;
871  op.kc_i = 768; // min kc_i value
872  }
873 
874  eg_timer = 0;
875  eg_cnt = 0;
876 
877  lfo_timer = 0;
878  lfo_counter = 0;
879  lfo_phase = 0;
880  lfo_wsel = 0;
881  pmd = 0;
882  amd = 0;
883  lfa = 0;
884  lfp = 0;
885 
886  test = 0;
887 
888  irq_enable = 0;
889  timer1->setStart(false, time);
890  timer2->setStart(false, time);
891 
892  noise = 0;
893  noise_rng = 0;
894  noise_p = 0;
895  noise_f = noise_tab[0];
896 
897  csm_req = 0;
898  status = 0;
899 
900  writeReg(0x1b, 0, time); // only because of CT1, CT2 output pins
901  writeReg(0x18, 0, time); // set LFO frequency
902  for (int i = 0x20; i < 0x100; ++i) { // set the operators
903  writeReg(i, 0, time);
904  }
905 
906  irq.reset();
907 }
908 
909 int YM2151::opCalc(YM2151Operator* OP, unsigned env, int pm)
910 {
911  unsigned p = (env << 3) + sin_tab[(int((OP->phase & ~FREQ_MASK) + (pm << 15)) >> FREQ_SH) & SIN_MASK];
912  if (p >= TL_TAB_LEN) {
913  return 0;
914  }
915  return tl_tab[p];
916 }
917 
918 int YM2151::opCalc1(YM2151Operator* OP, unsigned env, int pm)
919 {
920  int i = (OP->phase & ~FREQ_MASK) + pm;
921  unsigned p = (env << 3) + sin_tab[(i >> FREQ_SH) & SIN_MASK];
922  if (p >= TL_TAB_LEN) {
923  return 0;
924  }
925  return tl_tab[p];
926 }
927 
928 unsigned YM2151::volumeCalc(YM2151Operator* OP, unsigned AM)
929 {
930  return OP->tl + unsigned(OP->volume) + (AM & OP->AMmask);
931 }
932 
933 void YM2151::chanCalc(unsigned chan)
934 {
935  m2 = c1 = c2 = mem = 0;
936  YM2151Operator* op = &oper[chan*4]; // M1
937  *op->mem_connect = op->mem_value; // restore delayed sample (MEM) value to m2 or c2
938 
939  unsigned AM = 0;
940  if (op->ams) {
941  AM = lfa << (op->ams-1);
942  }
943  unsigned env = volumeCalc(op, AM);
944  {
945  int out = op->fb_out_prev + op->fb_out_curr;
946  op->fb_out_prev = op->fb_out_curr;
947 
948  if (!op->connect) {
949  // algorithm 5
950  mem = c1 = c2 = op->fb_out_prev;
951  } else {
952  *op->connect = op->fb_out_prev;
953  }
954  op->fb_out_curr = 0;
955  if (env < ENV_QUIET) {
956  if (!op->fb_shift) {
957  out = 0;
958  }
959  op->fb_out_curr = opCalc1(op, env, (out << op->fb_shift));
960  }
961  }
962 
963  env = volumeCalc(op + 1, AM); // M2
964  if (env < ENV_QUIET) {
965  *(op + 1)->connect += opCalc(op + 1, env, m2);
966  }
967  env = volumeCalc(op + 2, AM); // C1
968  if (env < ENV_QUIET) {
969  *(op + 2)->connect += opCalc(op + 2, env, c1);
970  }
971  env = volumeCalc(op + 3, AM); // C2
972  if (env < ENV_QUIET) {
973  chanout[chan] += opCalc(op + 3, env, c2);
974  }
975  // M1
976  op->mem_value = mem;
977 }
978 
979 void YM2151::chan7Calc()
980 {
981  m2 = c1 = c2 = mem = 0;
982  YM2151Operator* op = &oper[7 * 4]; // M1
983 
984  *op->mem_connect = op->mem_value; // restore delayed sample (MEM) value to m2 or c2
985 
986  unsigned AM = 0;
987  if (op->ams) {
988  AM = lfa << (op->ams - 1);
989  }
990  unsigned env = volumeCalc(op, AM);
991  {
992  int out = op->fb_out_prev + op->fb_out_curr;
993  op->fb_out_prev = op->fb_out_curr;
994 
995  if (!op->connect) {
996  // algorithm 5
997  mem = c1 = c2 = op->fb_out_prev;
998  } else {
999  // other algorithms
1000  *op->connect = op->fb_out_prev;
1001  }
1002  op->fb_out_curr = 0;
1003  if (env < ENV_QUIET) {
1004  if (!op->fb_shift) {
1005  out = 0;
1006  }
1007  op->fb_out_curr = opCalc1(op, env, (out << op->fb_shift));
1008  }
1009  }
1010 
1011  env = volumeCalc(op + 1, AM); // M2
1012  if (env < ENV_QUIET) {
1013  *(op + 1)->connect += opCalc(op + 1, env, m2);
1014  }
1015  env = volumeCalc(op + 2, AM); // C1
1016  if (env < ENV_QUIET) {
1017  *(op + 2)->connect += opCalc(op + 2, env, c1);
1018  }
1019  env = volumeCalc(op + 3, AM); // C2
1020  if (noise & 0x80) {
1021  unsigned noiseout = 0;
1022  if (env < 0x3ff) {
1023  noiseout = (env ^ 0x3ff) * 2; // range of the YM2151 noise output is -2044 to 2040
1024  }
1025  chanout[7] += (noise_rng & 0x10000) ? noiseout : unsigned(-int(noiseout)); // bit 16 -> output
1026  } else {
1027  if (env < ENV_QUIET) {
1028  chanout[7] += opCalc(op + 3, env, c2);
1029  }
1030  }
1031  // M1
1032  op->mem_value = mem;
1033 }
1034 
1035 /*
1036 The 'rate' is calculated from following formula (example on decay rate):
1037  rks = notecode after key scaling (a value from 0 to 31)
1038  DR = value written to the chip register
1039  rate = 2*DR + rks; (max rate = 2*31+31 = 93)
1040 Four MSBs of the 'rate' above are the 'main' rate (from 00 to 15)
1041 Two LSBs of the 'rate' above are the value 'x' (the shape type).
1042 (eg. '11 2' means that 'rate' is 11*4+2=46)
1043 
1044 NOTE: A 'sample' in the description below is actually 3 output samples,
1045 thats because the Envelope Generator clock is equal to internal_clock/3.
1046 
1047 Single '-' (minus) character in the diagrams below represents one sample
1048 on the output; this is for rates 11 x (11 0, 11 1, 11 2 and 11 3)
1049 
1050 these 'main' rates:
1051 00 x: single '-' = 2048 samples; (ie. level can change every 2048 samples)
1052 01 x: single '-' = 1024 samples;
1053 02 x: single '-' = 512 samples;
1054 03 x: single '-' = 256 samples;
1055 04 x: single '-' = 128 samples;
1056 05 x: single '-' = 64 samples;
1057 06 x: single '-' = 32 samples;
1058 07 x: single '-' = 16 samples;
1059 08 x: single '-' = 8 samples;
1060 09 x: single '-' = 4 samples;
1061 10 x: single '-' = 2 samples;
1062 11 x: single '-' = 1 sample; (ie. level can change every 1 sample)
1063 
1064 Shapes for rates 11 x look like this:
1065 rate: step:
1066 11 0 01234567
1067 
1068 level:
1069 0 --
1070 1 --
1071 2 --
1072 3 --
1073 
1074 rate: step:
1075 11 1 01234567
1076 
1077 level:
1078 0 --
1079 1 --
1080 2 -
1081 3 -
1082 4 --
1083 
1084 rate: step:
1085 11 2 01234567
1086 
1087 level:
1088 0 --
1089 1 -
1090 2 -
1091 3 --
1092 4 -
1093 5 -
1094 
1095 rate: step:
1096 11 3 01234567
1097 
1098 level:
1099 0 --
1100 1 -
1101 2 -
1102 3 -
1103 4 -
1104 5 -
1105 6 -
1106 
1107 
1108 For rates 12 x, 13 x, 14 x and 15 x output level changes on every
1109 sample - this means that the waveform looks like this: (but the level
1110 changes by different values on different steps)
1111 12 3 01234567
1112 
1113 0 -
1114 2 -
1115 4 -
1116 8 -
1117 10 -
1118 12 -
1119 14 -
1120 18 -
1121 20 -
1122 
1123 Notes about the timing:
1124 ----------------------
1125 
1126 1. Synchronism
1127 
1128 Output level of each two (or more) voices running at the same 'main' rate
1129 (eg 11 0 and 11 1 in the diagram below) will always be changing in sync,
1130 even if there're started with some delay.
1131 
1132 Note that, in the diagram below, the decay phase in channel 0 starts at
1133 sample #2, while in channel 1 it starts at sample #6. Anyway, both channels
1134 will always change their levels at exactly the same (following) samples.
1135 
1136 (S - start point of this channel, A-attack phase, D-decay phase):
1137 
1138 step:
1139 01234567012345670123456
1140 
1141 channel 0:
1142  --
1143  | --
1144  | -
1145  | -
1146  | --
1147  | --
1148 | --
1149 | -
1150 | -
1151 | --
1152 AADDDDDDDDDDDDDDDD
1153 S
1154 
1155 01234567012345670123456
1156 channel 1:
1157  -
1158  | -
1159  | --
1160  | --
1161  | --
1162  | -
1163  | -
1164  | --
1165  | --
1166  | --
1167  AADDDDDDDDDDDDDDDD
1168  S
1169 01234567012345670123456
1170 
1171 
1172 2. Shifted (delayed) synchronism
1173 
1174 Output of each two (or more) voices running at different 'main' rate
1175 (9 1, 10 1 and 11 1 in the diagrams below) will always be changing
1176 in 'delayed-sync' (even if there're started with some delay as in "1.")
1177 
1178 Note that the shapes are delayed by exactly one sample per one 'main' rate
1179 increment. (Normally one would expect them to start at the same samples.)
1180 
1181 See diagram below (* - start point of the shape).
1182 
1183 cycle:
1184 0123456701234567012345670123456701234567012345670123456701234567
1185 
1186 rate 09 1
1187 *-------
1188  --------
1189  ----
1190  ----
1191  --------
1192  *-------
1193  | --------
1194  | ----
1195  | ----
1196  | --------
1197 rate 10 1 |
1198 -- |
1199  *--- |
1200  ---- |
1201  -- |
1202  -- |
1203  ---- |
1204  *--- |
1205  | ---- |
1206  | -- | | <- one step (two samples) delay between 9 1 and 10 1
1207  | -- | |
1208  | ----|
1209  | *---
1210  | ----
1211  | --
1212  | --
1213  | ----
1214 rate 11 1 |
1215 - |
1216  -- |
1217  *- |
1218  -- |
1219  - |
1220  - |
1221  -- |
1222  *- |
1223  -- |
1224  - || <- one step (one sample) delay between 10 1 and 11 1
1225  - ||
1226  --|
1227  *-
1228  --
1229  -
1230  -
1231  --
1232  *-
1233  --
1234  -
1235  -
1236  --
1237 */
1238 
1239 void YM2151::advanceEG()
1240 {
1241  if (eg_timer++ != 3) {
1242  // envelope generator timer overlfows every 3 samples (on real chip)
1243  return;
1244  }
1245  eg_timer = 0;
1246  eg_cnt++;
1247 
1248  // envelope generator
1249  for (auto& op : oper) {
1250  switch (op.state) {
1251  case EG_ATT: // attack phase
1252  if (!(eg_cnt & ((1 << op.eg_sh_ar) - 1))) {
1253  op.volume += (~op.volume *
1254  (eg_inc[op.eg_sel_ar + ((eg_cnt >> op.eg_sh_ar) & 7)])
1255  ) >> 4;
1256  if (op.volume <= MIN_ATT_INDEX) {
1257  op.volume = MIN_ATT_INDEX;
1258  op.state = EG_DEC;
1259  }
1260  }
1261  break;
1262 
1263  case EG_DEC: // decay phase
1264  if (!(eg_cnt & ((1 << op.eg_sh_d1r) - 1))) {
1265  op.volume += eg_inc[op.eg_sel_d1r + ((eg_cnt >> op.eg_sh_d1r) & 7)];
1266  if (unsigned(op.volume) >= op.d1l) {
1267  op.state = EG_SUS;
1268  }
1269  }
1270  break;
1271 
1272  case EG_SUS: // sustain phase
1273  if (!(eg_cnt & ((1 << op.eg_sh_d2r) - 1))) {
1274  op.volume += eg_inc[op.eg_sel_d2r + ((eg_cnt >> op.eg_sh_d2r) & 7)];
1275  if (op.volume >= MAX_ATT_INDEX) {
1276  op.volume = MAX_ATT_INDEX;
1277  op.state = EG_OFF;
1278  }
1279  }
1280  break;
1281 
1282  case EG_REL: // release phase
1283  if (!(eg_cnt & ((1 << op.eg_sh_rr) - 1))) {
1284  op.volume += eg_inc[op.eg_sel_rr + ((eg_cnt >> op.eg_sh_rr) & 7)];
1285  if (op.volume >= MAX_ATT_INDEX) {
1286  op.volume = MAX_ATT_INDEX;
1287  op.state = EG_OFF;
1288  }
1289  }
1290  break;
1291  }
1292  }
1293 }
1294 
1295 void YM2151::advance()
1296 {
1297  // LFO
1298  if (test & 2) {
1299  lfo_phase = 0;
1300  } else {
1301  if (lfo_timer++ >= lfo_overflow) {
1302  lfo_timer = 0;
1303  lfo_counter += lfo_counter_add;
1304  lfo_phase += (lfo_counter >> 4);
1305  lfo_phase &= 255;
1306  lfo_counter &= 15;
1307  }
1308  }
1309 
1310  unsigned i = lfo_phase;
1311  // calculate LFO AM and PM waveform value (all verified on real chip,
1312  // except for noise algorithm which is impossible to analyse)
1313  int a, p;
1314  switch (lfo_wsel) {
1315  case 0:
1316  // saw
1317  // AM: 255 down to 0
1318  // PM: 0 to 127, -127 to 0 (at PMD=127: LFP = 0 to 126, -126 to 0)
1319  a = 255 - i;
1320  if (i < 128) {
1321  p = i;
1322  } else {
1323  p = i - 255;
1324  }
1325  break;
1326  case 1:
1327  // square
1328  // AM: 255, 0
1329  // PM: 128,-128 (LFP = exactly +PMD, -PMD)
1330  if (i < 128) {
1331  a = 255;
1332  p = 128;
1333  } else {
1334  a = 0;
1335  p = -128;
1336  }
1337  break;
1338  case 2:
1339  // triangle
1340  // AM: 255 down to 1 step -2; 0 up to 254 step +2
1341  // PM: 0 to 126 step +2, 127 to 1 step -2,
1342  // 0 to -126 step -2, -127 to -1 step +2
1343  if (i < 128) {
1344  a = 255 - (i * 2);
1345  } else {
1346  a = (i * 2) - 256;
1347  }
1348  if (i < 64) { // i = 0..63
1349  p = i * 2; // 0 to 126 step +2
1350  } else if (i < 128) { // i = 64..127
1351  p = 255 - i * 2; // 127 to 1 step -2
1352  } else if (i < 192) { // i = 128..191
1353  p = 256 - i*2; // 0 to -126 step -2
1354  } else { // i = 192..255
1355  p = i*2 - 511; // -127 to -1 step +2
1356  }
1357  break;
1358  case 3:
1359  default: // keep the compiler happy
1360  // Random. The real algorithm is unknown !!!
1361  // We just use a snapshot of data from real chip
1362 
1363  // AM: range 0 to 255
1364  // PM: range -128 to 127
1365  a = lfo_noise_waveform[i];
1366  p = a - 128;
1367  break;
1368  }
1369  lfa = a * amd / 128;
1370  lfp = p * pmd / 128;
1371 
1372  // The Noise Generator of the YM2151 is 17-bit shift register.
1373  // Input to the bit16 is negated (bit0 XOR bit3) (EXNOR).
1374  // Output of the register is negated (bit0 XOR bit3).
1375  // Simply use bit16 as the noise output.
1376 
1377  // noise changes depending on the index in noise_tab (noise_f = noise_tab[x])
1378  // noise_tab contains how many cycles/samples (x2) the noise should change.
1379  // so, when it contains 29, noise should change every 14.5 cycles (2 out of 29).
1380  // if you read this code well, you'll see that is what happens here :)
1381  noise_p -= 2;
1382  if (noise_p < 0) {
1383  noise_p += noise_f;
1384  unsigned j = ((noise_rng ^ (noise_rng >> 3)) & 1) ^ 1;
1385  noise_rng = (j << 16) | (noise_rng >> 1);
1386  }
1387 
1388  // phase generator
1389  YM2151Operator* op = &oper[0]; // CH 0 M1
1390  i = 8;
1391  do {
1392  // only when phase modulation from LFO is enabled for this channel
1393  if (op->pms) {
1394  int mod_ind = lfp; // -128..+127 (8bits signed)
1395  if (op->pms < 6) {
1396  mod_ind >>= (6 - op->pms);
1397  } else {
1398  mod_ind <<= (op->pms - 5);
1399  }
1400  if (mod_ind) {
1401  unsigned kc_channel = op->kc_i + mod_ind;
1402  (op + 0)->phase += ((freq[kc_channel + (op + 0)->dt2] + (op + 0)->dt1) * (op + 0)->mul) >> 1;
1403  (op + 1)->phase += ((freq[kc_channel + (op + 1)->dt2] + (op + 1)->dt1) * (op + 1)->mul) >> 1;
1404  (op + 2)->phase += ((freq[kc_channel + (op + 2)->dt2] + (op + 2)->dt1) * (op + 2)->mul) >> 1;
1405  (op + 3)->phase += ((freq[kc_channel + (op + 3)->dt2] + (op + 3)->dt1) * (op + 3)->mul) >> 1;
1406  } else { // phase modulation from LFO is equal to zero
1407  (op + 0)->phase += (op + 0)->freq;
1408  (op + 1)->phase += (op + 1)->freq;
1409  (op + 2)->phase += (op + 2)->freq;
1410  (op + 3)->phase += (op + 3)->freq;
1411  }
1412  } else { // phase modulation from LFO is disabled
1413  (op + 0)->phase += (op + 0)->freq;
1414  (op + 1)->phase += (op + 1)->freq;
1415  (op + 2)->phase += (op + 2)->freq;
1416  (op + 3)->phase += (op + 3)->freq;
1417  }
1418  op += 4;
1419  i--;
1420  } while (i);
1421 
1422  // CSM is calculated *after* the phase generator calculations (verified
1423  // on real chip)
1424  // CSM keyon line seems to be ORed with the KO line inside of the chip.
1425  // The result is that it only works when KO (register 0x08) is off, ie. 0
1426  //
1427  // Interesting effect is that when timer A is set to 1023, the KEY ON happens
1428  // on every sample, so there is no KEY OFF at all - the result is that
1429  // the sound played is the same as after normal KEY ON.
1430  if (csm_req) { // CSM KEYON/KEYOFF seqeunce request
1431  if (csm_req == 2) { // KEY ON
1432  op = &oper[0]; // CH 0 M1
1433  i = 32;
1434  do {
1435  keyOn(op, 2);
1436  op++;
1437  i--;
1438  } while (i);
1439  csm_req = 1;
1440  } else { // KEY OFF
1441  op = &oper[0]; // CH 0 M1
1442  i = 32;
1443  do {
1444  keyOff(op,unsigned(~2));
1445  op++;
1446  i--;
1447  } while (i);
1448  csm_req = 0;
1449  }
1450  }
1451 }
1452 
1453 void YM2151::generateChannels(float** bufs, unsigned num)
1454 {
1455  if (checkMuteHelper()) {
1456  // TODO update internal state, even if muted
1457  for (int i = 0; i < 8; ++i) {
1458  bufs[i] = nullptr;
1459  }
1460  return;
1461  }
1462 
1463  for (unsigned i = 0; i < num; ++i) {
1464  advanceEG();
1465 
1466  for (int j = 0; j < 8-1; ++j) {
1467  chanout[j] = 0;
1468  chanCalc(j);
1469  }
1470  chanout[7] = 0;
1471  chan7Calc(); // special case for channel 7
1472 
1473  for (int j = 0; j < 8; ++j) {
1474  bufs[j][2 * i + 0] += int(chanout[j] & pan[2 * j + 0]);
1475  bufs[j][2 * i + 1] += int(chanout[j] & pan[2 * j + 1]);
1476  }
1477  advance();
1478  }
1479 }
1480 
1481 void YM2151::callback(byte flag)
1482 {
1483  if (flag & 0x20) { // Timer 1
1484  if (irq_enable & 0x04) {
1485  setStatus(1);
1486  }
1487  if (irq_enable & 0x80) {
1488  csm_req = 2; // request KEY ON / KEY OFF sequence
1489  }
1490  }
1491  if (flag & 0x40) { // Timer 2
1492  if (irq_enable & 0x08) {
1493  setStatus(2);
1494  }
1495  }
1496 }
1497 
1498 byte YM2151::readStatus() const
1499 {
1500  return status;
1501 }
1502 
1503 void YM2151::setStatus(byte flags)
1504 {
1505  status |= flags;
1506  if (status) {
1507  irq.set();
1508  }
1509 }
1510 
1511 void YM2151::resetStatus(byte flags)
1512 {
1513  status &= ~flags;
1514  if (!status) {
1515  irq.reset();
1516  }
1517 }
1518 
1519 
1520 template<typename Archive>
1521 void YM2151::YM2151Operator::serialize(Archive& a, unsigned /*version*/)
1522 {
1523  //int* connect; // recalculated from regs[0x20-0x27]
1524  //int* mem_connect; // recalculated from regs[0x20-0x27]
1525  a.serialize("phase", phase,
1526  "freq", freq,
1527  "dt1", dt1,
1528  "mul", mul,
1529  "dt1_i", dt1_i,
1530  "dt2", dt2,
1531  "mem_value", mem_value,
1532  //"fb_shift", fb_shift, // recalculated from regs[0x20-0x27]
1533  "fb_out_curr", fb_out_curr,
1534  "fb_out_prev", fb_out_prev,
1535  "kc", kc,
1536  "kc_i", kc_i,
1537  "pms", pms,
1538  "ams", ams,
1539  "AMmask", AMmask,
1540  "state", state,
1541  "tl", tl,
1542  "volume", volume,
1543  "d1l", d1l,
1544  "key", key,
1545  "ks", ks,
1546  "ar", ar,
1547  "d1r", d1r,
1548  "d2r", d2r,
1549  "rr", rr,
1550  "eg_sh_ar", eg_sh_ar,
1551  "eg_sel_ar", eg_sel_ar,
1552  "eg_sh_d1r", eg_sh_d1r,
1553  "eg_sel_d1r", eg_sel_d1r,
1554  "eg_sh_d2r", eg_sh_d2r,
1555  "eg_sel_d2r", eg_sel_d2r,
1556  "eg_sh_rr", eg_sh_rr,
1557  "eg_sel_rr", eg_sel_rr);
1558 };
1559 
1560 template<typename Archive>
1561 void YM2151::serialize(Archive& a, unsigned /*version*/)
1562 {
1563  a.serialize("irq", irq,
1564  "timer1", *timer1,
1565  "timer2", *timer2,
1566  "operators", oper,
1567  //"pan", pan, // recalculated from regs[0x20-0x27]
1568  "eg_cnt", eg_cnt,
1569  "eg_timer", eg_timer,
1570  "lfo_phase", lfo_phase,
1571  "lfo_timer", lfo_timer,
1572  "lfo_overflow", lfo_overflow,
1573  "lfo_counter", lfo_counter,
1574  "lfo_counter_add", lfo_counter_add,
1575  "lfa", lfa,
1576  "lfp", lfp,
1577  "noise", noise,
1578  "noise_rng", noise_rng,
1579  "noise_p", noise_p,
1580  "noise_f", noise_f,
1581  "csm_req", csm_req,
1582  "irq_enable", irq_enable,
1583  "status", status,
1584  "chanout", chanout,
1585  "m2", m2,
1586  "c1", c1,
1587  "c2", c2,
1588  "mem", mem,
1589  "timer_A_val", timer_A_val,
1590  "lfo_wsel", lfo_wsel,
1591  "amd", amd,
1592  "pmd", pmd,
1593  "test", test,
1594  "ct", ct);
1595  a.serialize_blob("registers", regs, sizeof(regs));
1596 
1597  if (a.isLoader()) {
1598  // TODO restore more state from registers
1599  EmuTime::param time = timer1->getCurrentTime();
1600  for (int r = 0x20; r < 0x28; ++r) {
1601  writeReg(r , regs[r], time);
1602  }
1603  }
1604 }
1605 INSTANTIATE_SERIALIZE_METHODS(YM2151);
1606 
1607 } // namespace openmsx
openmsx::eg_inc
constexpr byte eg_inc[19 *RATE_STEPS]
Definition: YM2151.cc:62
openmsx::eg_rate_shift
constexpr byte eg_rate_shift[32+64+32]
Definition: YM2151.cc:138
openmsx::SIN_LEN
constexpr int SIN_LEN
Definition: YM2151.cc:40
openmsx::ResampledSoundDevice
Definition: ResampledSoundDevice.hh:15
openmsx::lfo_noise_waveform
constexpr byte lfo_noise_waveform[256]
Definition: YM2151.cc:276
cstd::round
constexpr double round(double x)
Definition: cstd.hh:318
serialize.hh
openmsx::tl
constexpr TlTab tl
Definition: YMF262.cc:397
cstd.hh
openmsx::YM2151
YM2151
Definition: YM2151.cc:1607
openmsx::RATE_STEPS
constexpr unsigned RATE_STEPS
Definition: YM2151.cc:61
openmsx::dt2_tab
constexpr unsigned dt2_tab[4]
Definition: YM2151.cc:188
ranges.hh
openmsx::YM2151::serialize
void serialize(Archive &ar, unsigned version)
Definition: YM2151.cc:1563
openmsx::FREQ_SH
constexpr int FREQ_SH
Definition: YM2151.cc:22
ranges::all_of
bool all_of(InputRange &&range, UnaryPredicate pred)
Definition: ranges.hh:119
openmsx::ENV_STEP
constexpr float ENV_STEP
Definition: YM2151.cc:28
openmsx::YM2151::YM2151
YM2151(const std::string &name, const std::string &desc, const DeviceConfig &config, EmuTime::param time)
Definition: YM2151.cc:837
openmsx::TL_TAB_LEN
constexpr unsigned TL_TAB_LEN
Definition: YM2151.cc:49
openmsx::SIN_BITS
constexpr int SIN_BITS
Definition: YM2151.cc:39
M_PI
#define M_PI
Definition: Math.hh:27
openmsx::EG_OFF
constexpr unsigned EG_OFF
Definition: YM2151.cc:37
openmsx::dt1_tab
constexpr byte dt1_tab[4 *32]
Definition: YM2151.cc:193
openmsx::EG_ATT
constexpr unsigned EG_ATT
Definition: YM2151.cc:33
openmsx::Keys::getName
string getName(KeyCode keyCode)
Translate key code to key name.
Definition: Keys.cc:589
openmsx::YM2151::writeReg
void writeReg(byte r, byte v, EmuTime::param time)
Definition: YM2151.cc:619
openmsx::ENV_QUIET
constexpr unsigned ENV_QUIET
Definition: YM2151.cc:52
openmsx::YM2151::readStatus
byte readStatus() const
Definition: YM2151.cc:1500
openmsx::phaseinc_rom
constexpr word phaseinc_rom[768]
Definition: YM2151.cc:211
INSTANTIATE_SERIALIZE_METHODS
#define INSTANTIATE_SERIALIZE_METHODS(CLASS)
Definition: serialize.hh:981
cstd::log
constexpr double log(double x)
Definition: cstd.hh:279
openmsx::TL_RES_LEN
constexpr int TL_RES_LEN
Definition: YM2151.cc:43
openmsx::EmuTimer
Definition: EmuTimer.hh:21
openmsx::YM2151::~YM2151
~YM2151()
Definition: YM2151.cc:857
openmsx::MIN_ATT_INDEX
constexpr int MIN_ATT_INDEX
Definition: YM2151.cc:31
openmsx::SoundDevice::unregisterSound
void unregisterSound()
Unregisters this sound device with the Mixer.
Definition: SoundDevice.cc:131
openmsx::MAX_ATT_INDEX
constexpr int MAX_ATT_INDEX
Definition: YM2151.cc:30
openmsx::IntHelper::reset
void reset()
Reset the interrupt request on the bus.
Definition: IRQHelper.hh:96
openmsx::pm
constexpr PmTable pm
Definition: Y8950.cc:280
openmsx::EG_SUS
constexpr unsigned EG_SUS
Definition: YM2151.cc:35
openmsx::x
constexpr KeyMatrixPosition x
Keyboard bindings.
Definition: Keyboard.cc:1377
openmsx::IntHelper::set
void set()
Set the interrupt request on the bus.
Definition: IRQHelper.hh:87
openmsx::word
uint16_t word
16 bit unsigned integer
Definition: openmsx.hh:29
openmsx::eg_rate_select
constexpr byte eg_rate_select[32+64+32]
Definition: YM2151.cc:94
openmsx::YM2151::reset
void reset(EmuTime::param time)
Definition: YM2151.cc:867
openmsx::FREQ_MASK
constexpr int FREQ_MASK
Definition: YM2151.cc:24
openmsx::ENV_LEN
constexpr int ENV_LEN
Definition: YM2151.cc:27
openmsx::EG_REL
constexpr unsigned EG_REL
Definition: YM2151.cc:36
openmsx::EG_DEC
constexpr unsigned EG_DEC
Definition: YM2151.cc:34
YM2151.hh
openmsx::INPUT_RATE
constexpr auto INPUT_RATE
Definition: SCC.cc:113
openmsx::ENV_BITS
constexpr int ENV_BITS
Definition: YM2151.cc:26
DeviceConfig.hh
Math.hh
openmsx::serialize
void serialize(Archive &ar, T &t, unsigned version)
Definition: serialize_core.hh:40
openmsx
Thanks to enen for testing this on a real cartridge:
Definition: Autofire.cc:5
openmsx::SoundDevice::updateStream
void updateStream(EmuTime::param time)
Definition: SoundDevice.cc:136
openmsx::SIN_MASK
constexpr int SIN_MASK
Definition: YM2151.cc:41
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