14 : ram(config, name, description,
size)
15 , msxcpu(config.getMotherBoard().getCPU())
16 , umrCallback(config.getGlobalSettings().getUMRCallBackSetting())
30 if (!completely_initialized_cacheline[line]) [[unlikely]] {
41 ? &ram[addr] :
nullptr;
47 ?
const_cast<byte*
>(&ram[addr]) :
nullptr;
55 for (
auto i :
xrange(num)) {
56 if (!completely_initialized_cacheline[first + i]) {
60 return const_cast<byte*
>(&ram[addr]);
66 if (!completely_initialized_cacheline[line]) [[unlikely]] {
68 if (uninitialized[line].none()) [[unlikely]] {
69 completely_initialized_cacheline[line] =
true;
90 void CheckedRam::init()
96 completely_initialized_cacheline.assign(lines,
true);
100 completely_initialized_cacheline.assign(lines,
false);
102 std::bitset<CacheLine::SIZE> allTrue;
104 uninitialized.assign(lines, allTrue);
109 void CheckedRam::update(
const Setting&
setting) noexcept
111 assert(&
setting == &umrCallback.getSetting());
const byte * getReadCacheLine(unsigned addr) const
byte * getRWCacheLines(unsigned addr, unsigned size) const
void write(unsigned addr, byte value)
CheckedRam(const DeviceConfig &config, const std::string &name, static_string_view description, unsigned size)
byte * getWriteCacheLine(unsigned addr) const
void invalidateAllSlotsRWCache(word start, unsigned size)
Invalidate the CPU its cache for the interval [start, start + size) For example MSXMemoryMapper and M...
const std::string & getName() const
void detach(Observer< T > &observer)
void attach(Observer< T > &observer)
TclObject getValue() const
StringSetting & getSetting() const
This file implemented 3 utility functions:
size_t size(std::string_view utf8)
constexpr auto xrange(T e)